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* Made llvm-cfi-verify not execute unit tests on non-x86 builds.Mitch Phillips2017-10-235-26/+77
| | | | | | | | | | | | | | Patched out from D38427. Reviewers: vlad.tsyrklevich Reviewed By: vlad.tsyrklevich Subscribers: llvm-commits, kcc, pcc, mgorny Differential Revision: https://reviews.llvm.org/D39197 llvm-svn: 316375
* Don't crash when we see unallocatable registers in clobbersGeorge Burgess IV2017-10-234-15/+52
| | | | | | | | | | | | | | This fixes a bug where we'd crash given code like the test-case from https://bugs.llvm.org/show_bug.cgi?id=30792 . Instead, we let the offending clobber silently slide through. This doesn't fully fix said bug, since the assembler will still complain the moment it sees a crypto/fp/vector op, and we still don't diagnose calls that require vector regs. Differential Revision: https://reviews.llvm.org/D39030 llvm-svn: 316374
* Graph builder implementation.Mitch Phillips2017-10-237-7/+986
| | | | | | | | | | | | | | | | | | Implement a localised graph builder for indirect control flow instructions. Main interface is through GraphBuilder::buildFlowGraph, which will build a flow graph around an indirect CF instruction. Various modifications to FileVerifier are also made to const-expose some members needed for machine code analysis done by the graph builder. Reviewers: vlad.tsyrklevich Reviewed By: vlad.tsyrklevich Subscribers: llvm-commits, kcc, pcc Differential Revision: https://reviews.llvm.org/D38427 llvm-svn: 316372
* Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"Stefan Pintilie2017-10-232-181/+0
| | | | | | | | | Revert commit r316366. Previous commit causes p8-scalar_vector_conversions.ll to fail. This reverts commit 990e764ad8a2eec206ce5dda6aefab059ccd4e92. llvm-svn: 316371
* lld::COFF: better behavior when using as a libraryRui Ueyama2017-10-237-14/+19
| | | | | | | | | | | | | | | Previously, the COFF driver would call exit(0) when called as a library. Now it takes `ExitEarly` option, and if it is false, it doesn't exit. So it is now more library-friendly. Furthermore, link() calls freeArena() before returning, to clean up resources. Based on an Andrew Kelley's patch. Differential Revision: https://reviews.llvm.org/D39202 llvm-svn: 316370
* [GVNSink] Fix failing GVNSink tests in the reverse iteration botMandeep Singh Grang2017-10-231-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The elts of ActivePreds which is defined as a SmallPtrSet are copied into Blocks using std::copy. This makes the resultant order of Blocks non-deterministic. We cannot simply sort Blocks as they need to match the corresponding Values. So a better approach is to define ActivePreds as SmallSetVector. This fixes the following failures in http://lab.llvm.org:8011/builders/reverse-iteration: LLVM :: Transforms/GVNSink/indirect-call.ll LLVM :: Transforms/GVNSink/sink-common-code.ll LLVM :: Transforms/GVNSink/struct.ll Reviewers: dberlin, jmolloy, bkramer, efriedma Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39025 llvm-svn: 316369
* Logging: Disable logging after fork()Pavel Labath2017-10-236-7/+24
| | | | | | | | | | | | | | | | | | | | | | | Summary: We had a bug where if we had forked (in the ProcessLauncherPosixFork) while another thread was writing a log message, we would deadlock. This happened because the fork child inherited the locked log rwmutex, which would never get unlocked. This meant the child got stuck trying to disable all log channels. The bug existed for a while but only started being apparent after D37930, which started using ThreadLauncher (which uses logging) instead of std::thread (which does not) for launching TaskPool threads. The fix is to use pthread_atfork to disable logging in the forked child. Reviewers: zturner, eugene, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D38938 llvm-svn: 316368
* [Hexagon] Return the correct chain edge for i1 function callsKrzysztof Parzyszek2017-10-232-1/+25
| | | | | | | | | | | | | | | | | In HexagonISelLowering, there is code to handle the case when a function returns an i1 type. In this case, we need to generate extra nodes to copy the result from R0 to a predicate register. The code was returning the wrong value for the chain edge which caused an assert "Wrong topological sorting" when converting the instructions to MIs. This patch fixes the problem by returning the chain for the final copy. Patch by Brendon Cahoon. llvm-svn: 316367
* [PowerPC] Try to simplify a Swap if it feeds a SplatStefan Pintilie2017-10-232-0/+181
| | | | | | | | | If we have the situation where a Swap feeds a Splat we can sometimes change the index on the Splat and then remove the Swap instruction. Differential Revision: https://reviews.llvm.org/D39009 llvm-svn: 316366
* LLD: Fix large integer implicitly truncated to unsigned type gcc warningKonstantin Zhuravlyov2017-10-231-1/+1
| | | | | | | | This fixes gcc warning. Change by Brian Sumner llvm-svn: 316365
* Abstract rwlocks into a class, provide a SRW lock implementation for windowsMartin Storsjo2017-10-234-30/+97
| | | | | | | | | | | | | | This requires _WIN32_WINNT >= 0x0600. If someone wants to spend effort on supporting earlier versions, one can easily add another fallback implementation based on critical sections, or try to load SRW lock functions dynamically. This makes sure that the FDE cache is thread safe on windows. Differential Revision: https://reviews.llvm.org/D38704 llvm-svn: 316364
* [Hexagon] Add extra pattern for S4_addaddiKrzysztof Parzyszek2017-10-232-0/+15
| | | | | | One combination was missing: add(add(x,y),c). llvm-svn: 316363
* [OpenMP] Avoid VLAs for some reductions on array sectionsJonas Hahnfeld2017-10-235-111/+416
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases the compiler can deduce the length of an array section as constants. With this information, VLAs can be avoided in place of a constant sized array or even a scalar value if the length is 1. Example: int a[4], b[2]; pragma omp parallel reduction(+: a[1:2], b[1:1]) { } For chained array sections, this optimization is restricted to cases where all array sections except the last have a constant length 1. This trivially guarantees that there are no holes in the memory region that needs to be privatized. Example: int c[3][4]; pragma omp parallel reduction(+: c[1:1][1:2]) { } This relands commit r316229 that I reverted in r316235 because it failed on some bots. During investigation I found that this was because Clang and GCC evaluate the two arguments to emplace_back() in ReductionCodeGen::emitSharedLValue() in a different order, hence leading to a different order of generated instructions in the final LLVM IR. Fix this by passing in the arguments from temporary variables that are evaluated in a defined order. Differential Revision: https://reviews.llvm.org/D39136 llvm-svn: 316362
* Fix FormatVariadicTest with GCCJonas Hahnfeld2017-10-231-1/+3
| | | | | | Looks like GCC didn't like the original specialization, try within namespace. llvm-svn: 316361
* [globalisel][tablegen] Import stores and allow GISel to automatically ↵Daniel Sanders2017-10-238-9/+171
| | | | | | | | | | | | | | | | | substitute zero regs like WZR/XZR/$zero. This patch enables the import of stores. Unfortunately, doing so by itself, loses an optimization where storing 0 to memory makes use of WZR/XZR. To mitigate this, this patch also introduces a new feature that allows register operands to nominate a zero register. When this is done, GlobalISel will substitute (G_CONSTANT 0) with the nominated register automatically. This is currently configured to only apply to the stores. Applying it to GPR32/GPR64 register classes in general will be done after review see (https://reviews.llvm.org/D39150). llvm-svn: 316360
* Accidently merged an incomplete upstream patch in ↵Mitch Phillips2017-10-234-10/+7
| | | | | | 10e6ee563a6b5ca498f27972ca6dbe6c308f1ac2 - reverting the changes. llvm-svn: 316359
* Patch inMitch Phillips2017-10-234-7/+10
| | | | llvm-svn: 316358
* [wasm] readSection: Avoid reading past eof (fixes oss-fuzz #3219)Vedant Kumar2017-10-233-3/+7
| | | | | | | | | | | | | A wasm file crafted with a bogus section size can trigger an ASan issue in the DWARFObjInMemory constructor. Nip the problem in the bud when we read the wasm section. Found by OSS-Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3219 Differential Revision: https://reviews.llvm.org/D38777 llvm-svn: 316357
* [Sanitizers] Add total primary allocator RSS to allocator report.Alex Shlyapnikov2017-10-231-8/+14
| | | | | | | | | | | | Summary: . Reviewers: cryptoad Subscribers: llvm-commits, kubamracek Differential Revision: https://reviews.llvm.org/D39131 llvm-svn: 316356
* [lldbtest] Simplify removing an unneeded else. NFCI.Davide Italiano2017-10-231-2/+1
| | | | llvm-svn: 316355
* [X86][SSE] Regenerate PACKSS tests on 32 + 64-bit targetsSimon Pilgrim2017-10-231-74/+67
| | | | llvm-svn: 316354
* CodeGen: Fix invalid bitcast in partial initialization of automatic arrary ↵Yaxun Liu2017-10-232-1/+9
| | | | | | | | variable Differential Revision: https://reviews.llvm.org/D39184 llvm-svn: 316353
* Updated 'Getting Started' to use valid git links (added trailing slashes)Mitch Phillips2017-10-231-33/+33
| | | | | | | | | | | | Reviewers: pcc, asl, tonic Reviewed By: pcc Subscribers: llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D38516 llvm-svn: 316352
* [PassManager] add test to show the new PM uses -latesimplifycfg early; NFCSanjay Patel2017-10-231-0/+95
| | | | llvm-svn: 316351
* [globalisel] Add very brief docs summarizing the ISel part of the LLVMDev ↵Daniel Sanders2017-10-231-5/+69
| | | | | | | | tutorial. Also added links to the talks available. llvm-svn: 316350
* AMDGPU: Cleanup local atomic node namesMatt Arsenault2017-10-234-62/+51
| | | | llvm-svn: 316349
* Revert "[Compiler-rt][MIPS] Fix cross build for XRAY."Evgeniy Stepanov2017-10-231-8/+2
| | | | | | | | | | | | | Breaks build: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/4677/steps/build%20with%20ninja/logs/stdio In file included from compiler-rt/lib/xray/xray_fdr_logging.cc:34: In file included from compiler-rt/lib/xray/xray_fdr_logging_impl.h:36: In file included from compiler-rt/lib/xray/xray_flags.h:18: compiler-rt/lib/xray/../sanitizer_common/sanitizer_flag_parser.h:23:7: error: '__sanitizer::FlagHandlerBase' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor] class FlagHandlerBase { llvm-svn: 316348
* [Sanitizers] New sanitizer API to purge allocator quarantine.Alex Shlyapnikov2017-10-239-26/+89
| | | | | | | | | | | | | | | | Summary: Purging allocator quarantine and returning memory to OS might be desired between fuzzer iterations since, most likely, the quarantine is not going to catch bugs in the code under fuzz, but reducing RSS might significantly prolong the fuzzing session. Reviewers: cryptoad Subscribers: kubamracek, llvm-commits Differential Revision: https://reviews.llvm.org/D39153 llvm-svn: 316347
* AMDGPU: Fix default range in non-kernel functionsMatt Arsenault2017-10-233-4/+46
| | | | | | | | | The range should be assumed to be the hardware maximum if a workitem intrinsic is used in a callable function which does not know the restricted limit of the calling kernel. llvm-svn: 316346
* [X86] Fix disassembler table generation to prevent instructions tagged with ↵Craig Topper2017-10-233-16/+20
| | | | | | 'PS' being inherited into PD/XS/XD attribute entries. llvm-svn: 316345
* [ASTMatchers] Expose forEachOverriden in dynamic AST matchers.Benjamin Kramer2017-10-231-0/+1
| | | | llvm-svn: 316344
* Fix misguided error message in debug mode. No functional change. Fixes PR#34966Marshall Clow2017-10-231-1/+1
| | | | llvm-svn: 316343
* [scudo] Add a shared runtimeKostya Kortchinsky2017-10-233-9/+47
| | | | | | | | | | | | | | | | | Summary: Up to now, the Scudo cmake target only provided a static library that had to be linked to an executable to benefit from the hardened allocator. This introduces a shared library as well, that can be LD_PRELOAD'ed. Reviewers: alekseyshl Reviewed By: alekseyshl Subscribers: srhines, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D38980 llvm-svn: 316342
* [MachineOutliner] NFC: Rename getters/setters to fit coding styleJessica Paquette2017-10-231-13/+13
| | | | | | | Rename endIdx, startIdx, and length to getEndIdx, getStartIdx, and getLength in Candidate. llvm-svn: 316341
* [X86] Change VMPTRST to use PS instead of TB to match VMPTRLD.Craig Topper2017-10-231-1/+1
| | | | llvm-svn: 316340
* [X86] Change RDRAND to use PS instead of TB.Craig Topper2017-10-231-3/+3
| | | | | | Should be no functional change for now. A future disassembler change will prevent disassembling with 0xf2/0xf3. llvm-svn: 316339
* Pull X86 "CPUKind" checking into .cpp file. [NFC]Erich Keane2017-10-232-71/+73
| | | | | | | | Preparing to do a refactor of CPU/feature checking, this patch pulls the one CPU implementation from the .h file to the .cpp file. llvm-svn: 316338
* [X86] Change XRSTOR to use PS instead of TB to match XSAVE.Craig Topper2017-10-231-2/+2
| | | | | | I don't think this changes anything functionally yet, but I plan to fix the disassembler to use this to disable matching certain instructions with 0xf3/0xf2/0x66 prefixes. llvm-svn: 316337
* [X86][SSE] Remove AssertZext stage from PEXTRW/PEXTRB lowering. NFCI.Simon Pilgrim2017-10-233-33/+30
| | | | | | | | Remove AssertZext and instead add PEXTRW/PEXTRB support to computeKnownBitsForTargetNode to simplify instruction selection. Differential Revision: https://reviews.llvm.org/D39169 llvm-svn: 316336
* clang-cl: Expose --version.Nico Weber2017-10-232-1/+3
| | | | | | | | This is for consistency with lld-link, see https://reviews.llvm.org/D38972 Also give --version a help text so it shows up in --help / /? output (for both clang-cl and regular clang). llvm-svn: 316335
* Update DPPD/DPPS instruction scheduling on btver2.Andrew V. Tischenko2017-10-233-6/+52
| | | | | | Differential Revision: https://reviews.llvm.org/D39046 llvm-svn: 316334
* [X86] Add PTWRITE instruction for assembler and disassembler.Craig Topper2017-10-235-2/+55
| | | | llvm-svn: 316333
* [X86] Add RDPID instruction for assembler and disassembler.Craig Topper2017-10-236-3/+26
| | | | llvm-svn: 316332
* [DAGCombine] Permit combining of shuffles of equivalent splat BUILD_VECTORsSimon Pilgrim2017-10-232-9/+17
| | | | | | | | | | combineShuffleOfScalars is very conservative about shuffled BUILD_VECTORs that can be combined together. This patch adds one additional case - if both BUILD_VECTORs represent splats of the same scalar value but with different UNDEF elements, then we should create a single splat BUILD_VECTOR, sharing only the UNDEF elements defined by the shuffle mask. Differential Revision: https://reviews.llvm.org/D38696 llvm-svn: 316331
* Support formatting formatv_objects.Sam McCall2017-10-233-4/+39
| | | | | | | | | | | | | | | | Summary: Support formatting formatv_objects. While here, fix documentation about member-formatters, and attempted perfect-forwarding (I think). Reviewers: zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38997 llvm-svn: 316330
* Add the --version option.Rui Ueyama2017-10-233-0/+14
| | | | | | Differential Revision: https://reviews.llvm.org/D38972 llvm-svn: 316329
* [X86][SSE] Regenerate bitcast-and-setcc testsSimon Pilgrim2017-10-233-93/+93
| | | | | | Avoid the retl/retq changes in an upcoming patch llvm-svn: 316328
* [clangd] Allow to pass code completion opts to ClangdServer.Ilya Biryukov2017-10-236-42/+306
| | | | | | | | | | | | Reviewers: bkramer, krasimir, sammccall Reviewed By: krasimir Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D38731 llvm-svn: 316327
* [X86][AVX2] Regenerate AVX2 intrinsics tests on 32 + 64-bit targetsSimon Pilgrim2017-10-233-2122/+1620
| | | | llvm-svn: 316326
* [X86][AVX] Regenerate AVX intrinsics tests on 32 + 64-bit targetsSimon Pilgrim2017-10-233-562/+460
| | | | llvm-svn: 316325
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