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* [globalisel][legalizerinfo] Introduce dedicated extending loads and add ↵Daniel Sanders2018-04-289-6/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lowerings for them Summary: Previously, a extending load was represented at (G_*EXT (G_LOAD x)). This had a few drawbacks: * G_LOAD had to be legal for all sizes you could extend from, even if registers didn't naturally hold those sizes. * All sizes you could extend from had to be allocatable just in case the extend went missing (e.g. by optimization). * At minimum, G_*EXT and G_TRUNC had to be legal for these sizes. As we improve optimization of extends and truncates, this legality requirement would spread without considerable care w.r.t when certain combines were permitted. * The SelectionDAG importer required some ugly and fragile pattern rewriting to translate patterns into this style. This patch begins changing the representation to: * (G_[SZ]EXTLOAD x) * (G_LOAD x) any-extends when MMO.getSize() * 8 < ResultTy.getSizeInBits() which resolves these issues by allowing targets to work entirely in their native register sizes, and by having a more direct translation from SelectionDAG patterns. This patch introduces the new generic instructions and new variation on G_LOAD and adds lowering for them to convert back to the existing representations. Depends on D45466 Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, aemerson, javed.absar Reviewed By: aemerson Subscribers: aemerson, kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D45540 llvm-svn: 331115
* [LLVM-C] Miscellaneous Cleanups in DIBuilder BindingsRobert Widmann2018-04-282-49/+94
| | | | | | | | | | | | | | | | Summary: * rL328953 does not include bindings for LLVMDIBuilderCreateClassType and LLVMDIBuilderCreateBitFieldMemberType despite declaring their prototypes. Provide these bindings now. * Switch to more precise types with specific numeric limits matching the DIBuilder's C++ API. Reviewers: harlanhaskins, whitequark, deadalnix Reviewed By: whitequark Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46168 llvm-svn: 331114
* Update to latest version of the isl c++ bindingsTobias Grosser2018-04-281-1871/+4047
| | | | | | | The delta to the previous version is rather small, but a change in brace placement makes this a rather noisy commit. llvm-svn: 331113
* [InstCombine] Canonicalize variable mask in masked mergeRoman Lebedev2018-04-283-93/+95
| | | | | | | | | | | | | | | | | | | Summary: Masked merge has a pattern of: `((x ^ y) & M) ^ y`. But, there is no difference between `((x ^ y) & M) ^ y` and `((x ^ y) & ~M) ^ x`, We should canonicalize the pattern to non-inverted mask. https://rise4fun.com/Alive/Yol Reviewers: spatel, craig.topper Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45664 llvm-svn: 331112
* [InstCombine][NFC] Add tests for variable mask canonicalization in masked mergeRoman Lebedev2018-04-282-0/+770
| | | | | | | | | | | Summary: Masked merge has a pattern of: `((x ^ y) & M) ^ y`. But, there is no difference between `((x ^ y) & M) ^ y` and `((x ^ y) & ~M) ^ x`, We should canonicalize the pattern to non-inverted mask. Differential Revision: https://reviews.llvm.org/D45663 llvm-svn: 331111
* [X86] Remove unnecessary shift/rotate folded InstRW overrides.Simon Pilgrim2018-04-284-24/+3
| | | | llvm-svn: 331110
* [llvm-mca][X86] Add double shift resource tests to all relevant modelsSimon Pilgrim2018-04-288-8/+608
| | | | llvm-svn: 331109
* [llvm-mca][X86] Add shift/rotate resource tests to all relevant modelsSimon Pilgrim2018-04-288-0/+4386
| | | | | | I intend to add further instruction tests to the resources-x86_64.s test file as required, but this initial commit is to help remove a load of unnecessary InstRW overrides in a future patch llvm-svn: 331108
* [X86][SSE] Stop hard coding some instruction scheduler classes.Simon Pilgrim2018-04-281-49/+58
| | | | | | Make these arguments to the multiclass to allow easier specialization. llvm-svn: 331107
* [X86][HW] Cleanup Haswell model. NFCI.Simon Pilgrim2018-04-281-9/+3
| | | | | | | | Moved LAHF/SAHF to instrs instead of instregex. Removed some unnecessary instregex entries. llvm-svn: 331106
* [X86] Remove mayLoad flag from BNDMK/BNDCL/BNDCN/BNDCU.Craig Topper2018-04-281-4/+1
| | | | | | The instruction documentation specifically says that these instruction don't access memory. llvm-svn: 331105
* [X86] Change memory operand of BNDMK/BNDCL/BNDCU/BNDCN/BNDST to anymem.Craig Topper2018-04-281-5/+5
| | | | | | These instruction don't use their memory operands as normal memory operands. They're just used as addresses. They don't have a size because they aren't directly representing a load or store. llvm-svn: 331104
* [SCEV] Touch the unsused stats variables for product build.Serguei Katkov2018-04-281-0/+3
| | | | | | This is a fix by elimination compiler warnings considered as errors. llvm-svn: 331103
* [X86] Remove REX.W from 64-bit mode BND instructions.Craig Topper2018-04-282-11/+11
| | | | | | As far as I can tell from the docs, the instructions are automatically 64-bit in 64-bit mode. We don't need REX.W. llvm-svn: 331102
* [X86] Rename BNDMOV instructions and hide redundant instruction encoding ↵Craig Topper2018-04-283-21/+22
| | | | | | | | | | | | from the assembler. Favor the 0x1a encoding for register/register move to match gas. The instructions used RM and MR in their name along with rr/rm/mr at the end. To make more consistent with other instructions remove the RM/MR and use rr/rm/mr/rr_REV. Hide the _REV encoding from the assembler but leave it for the disassembler. llvm-svn: 331101
* [NFC] Add some tests that demonstrate unrecognized three-way comparison patternsMax Kazantsev2018-04-281-0/+499
| | | | llvm-svn: 331100
* [SCEV] Reduce the number of invocation to non trivial getExact functionSerguei Katkov2018-04-281-2/+5
| | | | | | | | | | | | | | | | | The invocation of getExact in ScalarEvolution::getBackedgeTakenInfo is used only for getting statistic and for assert. Even if statistics is disabled, the code related to it will be eliminated the invocation to getExact itself will not be eliminated because it may have side-effects like creation of new SCEVs. So do invocation only when we collect statistics or executes asserts. Reviewers: mkazantsev, sanjoy, javed.absar Reviewed By: javed.absar Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46178 llvm-svn: 331099
* [ItaniumMangle] Undeduced auto type shouldn't be substitutable.Erik Pilkington2018-04-282-14/+22
| | | | | | | | | We still support the old mangling if we're trying to be ABI-compatible with Clang 6.0, though. Differential revision: https://reviews.llvm.org/D45451 llvm-svn: 331098
* Migrate from std::pointer_to_unary_function as it is removed in C++17Fangrui Song2018-04-281-4/+2
| | | | llvm-svn: 331097
* [analyzer] CStringChecker: Add support for BSD strlcpy() and strlcat().Artem Dergachev2018-04-271-2/+39
| | | | | | | | Patch by David Carlier! Differential Revision: https://reviews.llvm.org/D45177 llvm-svn: 331096
* [MachineOutliner] Add defs to calls + don't track liveness on outlined functionsJessica Paquette2018-04-274-8/+39
| | | | | | | | | | | | | This commit makes it so that if you outline a def of some register, then the call instruction created by the outliner actually reflects that the register is defined by the call. It also makes it so that outlined functions don't have the TracksLiveness property. Outlined calls shouldn't break liveness assumptions that someone might make. This also un-XFAILs the noredzone test, and updates the calls test. llvm-svn: 331095
* [LoopGuardWidening] Make PostDomTree optionalPhilip Reames2018-04-272-15/+56
| | | | | | | | The effect of doing so is not disrupting the LoopPassManager when mixing this pass with other loop passes. This should help locality of access substaintially and avoids the cost of computing PostDom. The assumption here is that the full GuardWidening (which does use PostDom) is run as a canonicalization before loop opts and that this version is just catching cases exposed by other loop passes. (i.e. LoopPredication, IndVarSimplify, LoopUnswitch, etc..) llvm-svn: 331094
* Fix diag-format test to not care about what cl.exe is on pathReid Kleckner2018-04-271-1/+1
| | | | llvm-svn: 331093
* [DAGCombiner] Fix a case of 1 in non-splat vector pow2 divisorHeejin Ahn2018-04-273-1369/+3652
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: D42479 (rL329525) enabled SDIV combine for pow2 non-splat vector dividers. But when there is a 1 in a vector, the instruction sequence to be generated involves shifting a value by the number of its bit widths, which is undefined (https://github.com/llvm-mirror/llvm/blob/c64f4dbfe31e509f9c1092b951e524b056245af8/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L6000-L6006). Especially, in architectures that do not support vector instructions, each of element in a vector will be computed separately using scalar operations, and then the resulting value will be undef for '1' values in a vector. (All 1's vector is fine; only vectors mixed with 1 and others will be affected.) Reviewers: RKSimon, jgravelle-google Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D46161 llvm-svn: 331092
* [X86] Make the STTNI flag intrinsics use the flags from pcmpestrm/pcmpistrm ↵Craig Topper2018-04-277-217/+588
| | | | | | | | | | | | | | | | | | | | | | | if the mask instrinsics are also used in the same basic block. Summary: Previously the flag intrinsics always used the index instructions even if a mask instruction also exists. To fix fix this I've created a single ISD node type that returns index, mask, and flags. The SelectionDAG CSE process will merge all flavors of intrinsics with the same inputs to a s ingle node. Then during isel we just have to look at which results are used to know what instruction to generate. If both mask and index are used we'll need to emit two instructions. But for all other cases we can emit a single instruction. Since I had to do manual isel anyway, I've removed the pseudo instructions and custom inserter code that was working around tablegen limitations with multiple implicit defs. I've also renamed the recently added sse42.ll test case to sttni.ll since it focuses on that subset of the sse4.2 instructions. Reviewers: chandlerc, RKSimon, spatel Reviewed By: chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46202 llvm-svn: 331091
* Fix a bug that prevents global variables from having a DW_OP_deref.Adrian Prantl2018-04-274-3/+51
| | | | | | | | | | | | | | For local variables the first DW_OP_deref is consumed by turning the location kind into a memeory location, but that only makes sense for values that are in a register to begin with, which cannot happen for global variables that are attached to a symbol. rdar://problem/39741860 This reapplies r330970 after fixing an uncovered bug in r331086 and working around the situation caused by it. llvm-svn: 331090
* [analyzer] ObjCAutoreleaseWrite: Support a few more APIs and fix warning text.Artem Dergachev2018-04-272-16/+75
| | | | | | API list and improved warning text composed by Devin Coughlin. llvm-svn: 331089
* [FastISel] Actually enable local value sinking by defaultReid Kleckner2018-04-271-4/+2
| | | | llvm-svn: 331088
* [FastISel] Fix local value sinking algorithmic complexityReid Kleckner2018-04-272-4/+18
| | | | | | | | | | Now local value sinking only scans and numbers instructions added between the current flush point and the last flush point. This ensures that ISel is overall linear in the size of the BB. Fixes PR37010 and re-enables local value sinking by default. llvm-svn: 331087
* Fix a bug in GlobalOpt's handling of DIExpressions.Adrian Prantl2018-04-275-20/+20
| | | | | | | | | This patch adds support for fragment expressions TryToShrinkGlobalToBoolean() which were previously just dropped. Thanks to Reid Kleckner for providing me a reproducer! llvm-svn: 331086
* [PatternMatch] Stabilize the matching order of commutative matchersRoman Lebedev2018-04-277-54/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Currently, we 1. match `LHS` matcher to the `first` operand of binary operator, 2. and then match `RHS` matcher to the `second` operand of binary operator. If that does not match, we swap the `LHS` and `RHS` matchers: 1. match `RHS` matcher to the `first` operand of binary operator, 2. and then match `LHS` matcher to the `second` operand of binary operator. This works ok. But it complicates writing of commutative matchers, where one would like to match (`m_Value()`) the value on one side, and use (`m_Specific()`) it on the other side. This is additionally complicated by the fact that `m_Specific()` stores the `Value *`, not `Value **`, so it won't work at all out of the box. The last problem is trivially solved by adding a new `m_c_Specific()` that stores the `Value **`, not `Value *`. I'm choosing to add a new matcher, not change the existing one because i guess all the current users are ok with existing behavior, and this additional pointer indirection may have performance drawbacks. Also, i'm storing pointer, not reference, because for some mysterious-to-me reason it did not work with the reference. The first one appears trivial, too. Currently, we 1. match `LHS` matcher to the `first` operand of binary operator, 2. and then match `RHS` matcher to the `second` operand of binary operator. If that does not match, we swap the ~~`LHS` and `RHS` matchers~~ **operands**: 1. match ~~`RHS`~~ **`LHS`** matcher to the ~~`first`~~ **`second`** operand of binary operator, 2. and then match ~~`LHS`~~ **`RHS`** matcher to the ~~`second`~ **`first`** operand of binary operator. Surprisingly, `$ ninja check-llvm` still passes with this. But i expect the bots will disagree.. The motivational unittest is included. I'd like to use this in D45664. Reviewers: spatel, craig.topper, arsenm, RKSimon Reviewed By: craig.topper Subscribers: xbolva00, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D45828 llvm-svn: 331085
* [X86] Merge some x87 instruction instregex single matches. NFCI.Simon Pilgrim2018-04-276-241/+83
| | | | llvm-svn: 331084
* [Reassociate] add a test with debug info; NFCSanjay Patel2018-04-271-4/+77
| | | | | | | | | As suggested in D45842 (although still not sure if we're going to advance that), we must invalidate references to instructions that have been recycled (operands were changed, so result is different). llvm-svn: 331083
* Fix build bots after r331049 broke them.Greg Clayton2018-04-271-10/+10
| | | | llvm-svn: 331082
* Attempt to fix remaining build failures after r331071 by changing the tuple ↵Daniel Sanders2018-04-272-7/+18
| | | | | | | | | | to a struct Some of the bots were failing in a different way to the others. These were unable to compare tuples. Fix this by changing to a struct, thereby avoiding the quirks of tuples. llvm-svn: 331081
* [LICM] Reduce nesting with an early return [NFC]Philip Reames2018-04-271-48/+50
| | | | llvm-svn: 331080
* [MustExecute/LICM] Special case first instruction in throwing headerPhilip Reames2018-04-272-5/+45
| | | | | | | | | | | We currently have a hard to solve analysis problem around the order of instructions within a potentially throwing block. We can't cheaply determine whether a given instruction is before the first potential throw in the block. While we're working on that in the background, special case the first instruction within the header. why this particular special case? Well, headers are guaranteed to execute if the loop does, and it turns out we tend to produce this form in practice. In a follow on patch, I tend to extend LICM with an alternate approach which works for any instruction in the header before the first throw, but this is the best I can come up with other users of the analysis (such as store promotion.) Note: I can't show the difference in the analysis result since we're ORing in the expensive instruction walk used by SCEV. Using the full walk is not suitable for a general solution. llvm-svn: 331079
* ELFObjectWriter: Allow one unique symver per symbolVlad Tsyrklevich2018-04-273-0/+16
| | | | | | | | | | | | | | | | | Summary: Only allow a single unique .symver alias per symbol. This matches the behavior of gas. I noticed that we ignored multiple mismatched symver directives looking at https://reviews.llvm.org/D45798 Reviewers: pcc, tejohnson, espindola Reviewed By: pcc Subscribers: emaste, arichardson, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D45845 llvm-svn: 331078
* Revert r329698 (and r329702).Nico Weber2018-04-272-5/+37
| | | | | | | | | Speculative. ClangMoveTests started failing on http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/9958 after this change. I can't reproduce on my machine, let's see if it was due to this change. llvm-svn: 331077
* [LV] Common duplicate vector load/store address calculation (NFC)Daniel Neilson2018-04-271-32/+18
| | | | | | | | Summary: Commoning some obviously copy/paste code in InnerLoopVectorizer::vectorizeMemoryInstruction llvm-svn: 331076
* Don't create a temporary DenseMap for each input .eh_frame.Rafael Espindola2018-04-272-1/+5
| | | | | | | | | | These maps are small, but we are creating an destroying one for each input .eh_frame. This patch reduces the total memory allocation from 765.54MB to 749.19MB. The peak is still the same: 563.7MB. llvm-svn: 331075
* Attempt to fix build failure after r331071 using std::make_tupleDaniel Sanders2018-04-271-2/+3
| | | | llvm-svn: 331074
* [debugserver] Fix the G packet handling.Frederic Riss2018-04-272-1/+12
| | | | | | Of course r331004 needed a counterpart on the write side. llvm-svn: 331073
* [PostRASink] extend the live-in check for all aliased registersJun Bum Lim2018-04-272-11/+46
| | | | | | | | Extend the live-in check for all aliased registers so that we can allow sinking Copy instructions when only implicit def is in successor's live-in. llvm-svn: 331072
* [globalisel][legalizerinfo] Add support for legalization based on the ↵Daniel Sanders2018-04-2710-47/+144
| | | | | | | | | | | | | | | | | | | | | | MachineMemOperand Summary: Currently only the memory size is supported but others can be added as needed. narrowScalar for G_LOAD and G_STORE now correctly update the MachineMemOperand and will refuse to legalize atomics since those need more careful expansions to maintain atomicity. Reviewers: ab, aditya_nandakumar, bogner, rtereshin, aemerson, javed.absar Reviewed By: aemerson Subscribers: aemerson, rovka, kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D45466 llvm-svn: 331071
* [llvm-objcopy] Add --weaken-symbol (-W) optionPaul Semel2018-04-273-0/+88
| | | | llvm-svn: 331070
* s/LLVM_ON_WIN32/_WIN32/, clangNico Weber2018-04-2718-34/+34
| | | | | | | | | | | LLVM_ON_WIN32 is set exactly with MSVC and MinGW (but not Cygwin) in HandleLLVMOptions.cmake, which is where _WIN32 defined too. Just use the default macro instead of a reinvented one. See thread "Replacing LLVM_ON_WIN32 with just _WIN32" on llvm-dev and cfe-dev. No intended behavior change. llvm-svn: 331069
* [llvm-objcopy] Add --globalize-symbol optionPaul Semel2018-04-273-3/+86
| | | | llvm-svn: 331068
* [clang-format/ObjC] Use getIdentifierInfo() instead of tok::identifierBen Hamilton2018-04-272-5/+33
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Previously, we checked tokens for `tok::identifier` to see if they were identifiers inside an Objective-C selector. However, this missed C++ keywords like `new` and `delete`. To fix this, this diff uses `getIdentifierInfo()` to find identifiers or keywords inside Objective-C selectors. Test Plan: New tests added. Ran tests with: % make -j16 FormatTests && ./tools/clang/unittests/Format/FormatTests Reviewers: djasper, jolesiak Reviewed By: djasper Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D46143 llvm-svn: 331067
* [CodeGen] Use RegUnits to track register aliases (NFC)Jun Bum Lim2018-04-275-104/+112
| | | | | | | | | | | | | | Summary: Use RegUnits to track register aliases in PostRASink and AArch64LoadStoreOptimizer. Reviewers: thegameg, mcrosier, gberry, qcolombet, sebpop, MatzeB, t.p.northover, javed.absar Reviewed By: thegameg, sebpop Subscribers: javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45695 llvm-svn: 331066
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