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| author | Craig Topper <craig.topper@intel.com> | 2018-04-28 06:58:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-28 06:58:26 +0000 |
| commit | 6d6b2b95037000142c8106cac2508975ff147dfd (patch) | |
| tree | 292aaeabf3676c99986ab937dac6ae7a359fa9f2 | |
| parent | f4c681eb65118bfcec029909e1776769cb9a2542 (diff) | |
| download | bcm5719-llvm-6d6b2b95037000142c8106cac2508975ff147dfd.tar.gz bcm5719-llvm-6d6b2b95037000142c8106cac2508975ff147dfd.zip | |
[X86] Change memory operand of BNDMK/BNDCL/BNDCU/BNDCN/BNDST to anymem.
These instruction don't use their memory operands as normal memory operands. They're just used as addresses. They don't have a size because they aren't directly representing a load or store.
llvm-svn: 331104
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMPX.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrMPX.td b/llvm/lib/Target/X86/X86InstrMPX.td index 15129c370c8..146b9f2b86d 100644 --- a/llvm/lib/Target/X86/X86InstrMPX.td +++ b/llvm/lib/Target/X86/X86InstrMPX.td @@ -18,10 +18,10 @@ let SchedRW = [WriteSystem] in { multiclass mpx_bound_make<bits<8> opc, string OpcodeStr> { let mayLoad = 1 in { - def 32rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i32mem:$src), + def 32rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins anymem:$src), OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, Requires<[HasMPX, Not64BitMode]>; - def 64rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), + def 64rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins anymem:$src), OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, Requires<[HasMPX, In64BitMode]>; } @@ -31,10 +31,10 @@ defm BNDMK : mpx_bound_make<0x1B, "bndmk">, XS; multiclass mpx_bound_check<bits<8> opc, string OpcodeStr> { let mayLoad = 1 in { - def 32rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i32mem:$src2), + def 32rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, anymem:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, Not64BitMode]>; - def 64rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i64mem:$src2), + def 64rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, anymem:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, In64BitMode]>; } @@ -72,7 +72,7 @@ def BNDMOV64mr : I<0x1B, MRMDestMem, (outs), (ins i128mem:$dst, BNDR:$src), "bndmov\t{$src, $dst|$dst, $src}", []>, PD, Requires<[HasMPX, In64BitMode]>; -def BNDSTXmr: I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src), +def BNDSTXmr: I<0x1B, MRMDestMem, (outs), (ins anymem:$dst, BNDR:$src), "bndstx\t{$src, $dst|$dst, $src}", []>, PS, Requires<[HasMPX]>; } |
