summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Try again to mark TestRdar12408181.py as skippedVedant Kumar2018-01-171-3/+7
| | | | | | rdar://36417163 llvm-svn: 322740
* Use a got to access a hidden weak undefined on MachO.Rafael Espindola2018-01-172-4/+2
| | | | | | | | | | | | | | | | | | | Trying to link __attribute__((weak, visibility("hidden"))) extern int foo; int *main(void) { return &foo; } on OS X fails with ld: 32-bit RIP relative reference out of range (-4294971318 max is +/-2GB): from _main (0x100000FAB) to _foo@0x00001000 (0x00000000) in '_main' from test.o for architecture x86_64 The problem being that 0 cannot be computed as a fixed difference from %rip. Exactly the same issue exists on ELF and we can use the same solution. llvm-svn: 322739
* [ARM] Optimize {s,u}mul.with.overflow.Joel Galenson2018-01-172-5/+72
| | | | | | | | This extends my previous patches to also optimize overflow-checked multiplies during SelectionDAG. Differential revision: https://reviews.llvm.org/D40922 llvm-svn: 322738
* [ARM] Optimize {s,u}{add,sub}.with.overflow.Joel Galenson2018-01-174-47/+130
| | | | | | | | The ARM backend contains code that tries to optimize compares by replacing them with an existing instruction that sets the flags the same way. This allows it to replace a "cmp" with a "adds", generalizing the code that replaces "cmp" with "sub". It also heuristically disables sinking of instructions that could potentially be used to replace compares (currently only if they're next to each other). Differential revision: https://reviews.llvm.org/D38378 llvm-svn: 322737
* [coff] Print detailed timing information with /TIME.Zachary Turner2018-01-1712-2/+195
| | | | | | | | | The classes used to print and update time information are in common, so other linkers could use this as well if desired. Differential Revision: https://reviews.llvm.org/D41915 llvm-svn: 322736
* [Attributes] Fix crash when attempting to remove alignment from an attribute ↵Daniel Neilson2018-01-172-24/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | list/set Summary: Discovered while working on a patch to move alignment in @llvm.memcpy/move/set from an arg into parameter attributes. The current implementations of AttributeSet::removeAttribute() and AttributeList::removeAttribute crash when attempting to remove the alignment attribute. Currently, these implementations add the to-be-removed attributes to an AttrBuilder and then remove the builder from the list/set. Alignment is special in that it must be added to a builder with an integer value for the alignment; attempts to add alignment to a builder without a value is an error. This change fixes the removeAttribute implementations for AttributeSet and AttributeList to make them able to remove the alignment, and other similar, attributes. Reviewers: rnk, chandlerc, pete, javed.absar, reames Reviewed By: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41951 llvm-svn: 322735
* [X86][BTVER2] Reduce instregex usage (PR35955)Simon Pilgrim2018-01-171-25/+29
| | | | | | Most are just replaced with instrs lists, but a few regexps have been further generalized to match more instructions with a single pattern. llvm-svn: 322734
* [InstCombine] add baseline tests for D39958; NFCSanjay Patel2018-01-171-0/+143
| | | | llvm-svn: 322733
* [WebAssembly] Remove non-existent method declaration. NFC.Sam Clegg2018-01-171-1/+0
| | | | | | Patch by Nicholas Wilson! llvm-svn: 322732
* [WebAssembly] Remove unused member variable. NFC.Sam Clegg2018-01-171-2/+1
| | | | | | Patch by Nicholas Wilson! llvm-svn: 322731
* [X86] Teach LowerBUILD_VECTOR to recognize pair-wise splats of 32-bit ↵Craig Topper2018-01-177-93/+87
| | | | | | | | | | | | | | elements and use a 64-bit broadcast If we are splatting pairs of 32-bit elements, we can use a 64-bit broadcast to get the job done. We could probably could probably do this with other sizes too, for example four 16-bit elements. Or we could broadcast pairs of 16-bit elements using a 32-bit element broadcast. But I've left that as a future improvement. I've also restricted this to AVX2 only because we can only broadcast loads under AVX. Differential Revision: https://reviews.llvm.org/D42086 llvm-svn: 322730
* [Parse] Forward brace locations to TypeConstructExprVedant Kumar2018-01-1712-90/+260
| | | | | | | | | | | | | | | | | | | | | | | | When parsing C++ type construction expressions with list initialization, forward the locations of the braces to Sema. Without these locations, the code coverage pass crashes on the given test case, because the pass relies on getLocEnd() returning a valid location. Here is what this patch does in more detail: - Forwards init-list brace locations to Sema (ParseExprCXX), - Builds an InitializationKind with these locations (SemaExprCXX), and - Uses these locations for constructor initialization (SemaInit). The remaining changes fall out of introducing a new overload for creating direct-list InitializationKinds. Testing: check-clang, and a stage2 coverage-enabled build of clang with asserts enabled. Differential Revision: https://reviews.llvm.org/D41921 llvm-svn: 322729
* Skip a flaky test (TestRdar12408181.py)Vedant Kumar2018-01-171-1/+3
| | | | | | | | | | This test frequently times out on our bots. While we're investigating the issue, mark the test as skipped so the builds aren't impacted as much. rdar://36417163 llvm-svn: 322728
* [WebAssembly] Fix typo in commentSam Clegg2018-01-171-1/+1
| | | | | | Patch by Nicholas Wilson! llvm-svn: 322727
* [WebAssembly] Refactor InputChunk.getSize(). NFCSam Clegg2018-01-171-8/+5
| | | | | | | | Also, remove trailing semicolons. Patch by Nicholas Wilson! llvm-svn: 322726
* [utils] Make .cfi_startproc optional for powerpcFangrui Song2018-01-171-1/+1
| | | | | | | | | | Summary: llc sometimes may not emit .cfi_startproc which makes func_dict to have less entries. Subscribers: nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D42144 llvm-svn: 322725
* [X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to ↵Craig Topper2018-01-172-0/+32
| | | | | | | | | | | | introduce bitcasts to i64 in 32-bit mode We legalize selects of masks with scalar conditions using a bitcast to an integer type. But if we are in 32-bit mode we can't convert v64i1 to i64. So instead split the v64i1 to v32i1 and concat it back together. Each half will then be legalized by bitcasting to i32 which is fine. The test case is a little indirect. If we have the v64i1 select in IR it will get legalized by legalize vector ops which has a run of type legalization after it. That type legalization run is able to fix this i64 bitcast. So in order to avoid that we need a build_vector of a splat which legalize vector ops will ignore. Legalize DAG will then turn that into a select via LowerBUILD_VECTORvXi1. And the select will get legalized. In this case there is no type legalizer run to cleanup the bitcast. This fixes pr35972. llvm-svn: 322724
* [X86][SSE] Add v4i16 PMULLD testsSimon Pilgrim2018-01-171-0/+72
| | | | llvm-svn: 322723
* [clangd] Deduplicate symbols collected in global-symbol-builder tool.Eric Liu2018-01-171-1/+16
| | | | | | | | | | | | Summary: After D42111, the executor framework no longer deduplicate tool results. Reviewers: bkramer, sammccall Subscribers: klimek, ilya-biryukov, cfe-commits Differential Revision: https://reviews.llvm.org/D42113 llvm-svn: 322722
* [PowerPC] Add handling for ColdCC calling convention and a pass to markZaara Syeda2018-01-1717-13/+507
| | | | | | | | | | | | | | | | candidates with coldcc attribute. This patch adds support for the coldcc calling convention for Power. This changes the set of non-volatile registers. It includes a pass to stress test the implementation by marking all static directly called functions with the coldcc attribute through the option -enable-coldcc-stress-test. It also includes an option, -ppc-enable-coldcc, to add the coldcc attribute to functions which are cold at all call sites based on BlockFrequencyInfo when the containing function does not call any non cold functions. Differential Revision: https://reviews.llvm.org/D38413 llvm-svn: 322721
* [Index] Fix GCC warning again :-(Sam McCall2018-01-171-2/+2
| | | | llvm-svn: 322720
* Fix MSVC "not all control paths return a value" warning.Simon Pilgrim2018-01-171-0/+1
| | | | llvm-svn: 322719
* [ARC] Add missing condition codes.Tatyana Krasnukha2018-01-173-0/+10
| | | | | | | | | | | | | | Summary: Added VS and VC, required for disassembling. Reviewers: petecoup Reviewed By: petecoup Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42172 llvm-svn: 322718
* [clang-tidy] Fixing Fuchsia overloaded operator warning messageJulie Hockett2018-01-172-6/+6
| | | | | | | | Updating Fuchsia overloaded operator warning message for clarity. Differential Revision: https://reviews.llvm.org/D42120 llvm-svn: 322692
* [Tooling] Don't deduplicate tool results in the All-TUs executor.Eric Liu2018-01-172-12/+7
| | | | | | | | | | | | | | Summary: As result deduplication or reduction is not supported in the framework, we should leave the deplication to tools (if needed) until the framework supports it. Reviewers: bkramer Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42111 llvm-svn: 322691
* [Format] Improve ObjC header guessing heuristicBen Hamilton2018-01-172-8/+176
| | | | | | | | | | | | | | | | | | | | | Summary: This improves upon the previous Objective-C header guessing heuristic from rC320479. Now, we run the lexer on C++ header files and look for Objective-C keywords and syntax. We also look for Foundation types. Test Plan: make -j12 FormatTests && ./tools/clang/unittests/Format/FormatTests Reviewers: jolesiak, krasimir Reviewed By: jolesiak Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42135 llvm-svn: 322690
* Revert "[libFuzzer] Support using libc++"Petr Hosek2018-01-178-127/+37
| | | | | | This reverts commit r322604: test is failing for standalone compiler-rt. llvm-svn: 322689
* [SystemZ] Handle BRCTH branches correctly in SystemZLongBranch.cpp.Jonas Paulsson2018-01-172-1/+11954
| | | | | | | | BRCTH is capable of a long branch which needs to be recognized during branch relaxation. This is done by checking for ExtraRelaxSize == 0. Review: Ulrich Weigand llvm-svn: 322688
* Update dump_ast_matchers for many recent changes.Benjamin Kramer2018-01-173-93/+258
| | | | | | | The html file hasn't been updated in a long time so there are quite a few changes in there. No matchers were removed though. llvm-svn: 322687
* AMDGPU: Error in SIAnnotateControlFlow instead of assertMatt Arsenault2018-01-171-1/+5
| | | | | | | | This assert typically happens if an unstructured CFG is passed to the pass. This can happen if the pass is run independently without the structurizer. llvm-svn: 322685
* Add tests for ConstantFoldTerminator preserving DomTreeMatt Arsenault2018-01-171-0/+125
| | | | | | | | With my bad luck I separately implemented the DomTree preservation for ConstantFoldTerminator before r322401 was committed. Commit the tests which I think still provide some value. llvm-svn: 322683
* [clang-format] adds enclosing function detection to raw string formattingKrasimir Georgiev2018-01-177-53/+170
| | | | | | | | | | | | | | Summary: This patch adds enclosing function detection to raw string formatting. Reviewers: bkramer Reviewed By: bkramer Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42167 llvm-svn: 322678
* Attempt to fix test/Driver/masm.c on the ARM bots.Nico Weber2018-01-171-1/+1
| | | | llvm-svn: 322674
* [Index] Fix GCC warning. This is silly, but no llvm_unreachable and no C99.Sam McCall2018-01-171-1/+3
| | | | llvm-svn: 322672
* [clangd] Avoid divide-by-zeroSam McCall2018-01-171-1/+1
| | | | llvm-svn: 322668
* [ARM GlobalISel] Rename local variable. NFCDiana Picus2018-01-171-2/+2
| | | | llvm-svn: 322667
* [lldb][PPC64] Fixed long double variables dumpPavel Labath2018-01-171-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: LLDB's DumpDataExtractor was not prepared to handle PowerPC's long double type: PPCDoubleDouble. As it is somewhat special, treating it as other regular float types resulted in getting wrong information about it. In this particular case, llvm::APFloat::getSizeInBits(PPCDoubleDouble) was returning 0. This caused the TestSetValues.py test to fail, because lldb would abort on an assertion failure on APInt(), because of the invalid size. Since in the PPC case the value of item_byte_size was correct and the getSizeInBits call was only added to support x87DoubleExtended semantics, this restricts the usage of getSizeInBits to the x87 semantics. Reviewers: labath, clayborg Reviewed By: labath Subscribers: llvm-commits, anajuliapc, alexandreyy, lbianc, lldb-commits Differential Revision: https://reviews.llvm.org/D42083 Author: Leandro Lupori <leandro.lupori@gmail.com> llvm-svn: 322666
* [ARM GlobalISel] Add instselect tests for G_FPEXT and G_FPTRUNCDiana Picus2018-01-171-0/+55
| | | | | | | G_FPEXT and G_FPTRUNC are handled by TableGen'erated code, just add tests. llvm-svn: 322665
* Fix assertion in ObjectFileELFPavel Labath2018-01-171-0/+2
| | | | | | | | | | In D40616 I (mistakenly) assumed that logging an llvm::Error would clear it. This of course is only true if logging is actually enabled. This fixes the assertion by manually clearing the error, but it raises the point of whether we need a special error-clearing logging primitive. llvm-svn: 322664
* [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endianPablo Barrio2018-01-172-18/+215
| | | | | | | | | | | | | | | | | | | | | Summary: Loading a vector of 4 half-precision FP sometimes results in an LD1 of 2 single-precision FP + a reversal. This results in an incorrect byte swap due to the conversion from little endian to big endian. In order to generate the correct byte swap, it is easier to generate the correct LD1 of 4 half-precision FP, thus avoiding the subsequent reversal. Reviewers: craig.topper, jmolloy, olista01 Reviewed By: olista01 Subscribers: efriedma, samparker, SjoerdMeijer, rogfer01, aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D41863 llvm-svn: 322663
* [InstCombine] fix demanded-bits propagation for zext/truncSanjay Patel2018-01-172-4/+2
| | | | | | | | | I was comparing the demanded-bits implementations between InstCombine and TargetLowering as part of investigating questions in D42088 and noticed that this was wrong in IR. We were losing all of the prior known bits when we got back to the 'zext'. llvm-svn: 322662
* [Sema] Add visited contexts to CodeCompleteContextHaojian Wu2018-01-176-1/+169
| | | | | | | | | | | | | | | | | | | Summary: This would allow code completion clients to know which context is visited during Sema code completion. Also some changes: * add `EnteredContext` callback in VisibleDeclConsumer. * add a simple unittest for sema code completion (only for visited contexts at the moment). Reviewers: ilya-biryukov Reviewed By: ilya-biryukov Subscribers: mgorny, bkramer, cfe-commits Differential Revision: https://reviews.llvm.org/D42071 llvm-svn: 322661
* [InstCombine] add test to show hole in demanded bits; NFCSanjay Patel2018-01-171-0/+19
| | | | llvm-svn: 322660
* [RISCV] Allow RISCVAsmBackend::writeNopData to generate c.nop when supportedAlex Bradbury2018-01-172-8/+44
| | | | | | | | | | When the compressed instruction set is enabled, the 16-bit c.nop can be generated if necessary. Differential Revision: https://reviews.llvm.org/D41221 Patch by Shiva Chen. llvm-svn: 322658
* [ARM GlobalISel] Map G_FPEXT and G_FPTRUNC to FPRDiana Picus2018-01-172-0/+63
| | | | llvm-svn: 322657
* [AMDGPU] add LDS f32 intrinsicsDaniil Fukalov2018-01-1710-11/+169
| | | | | | | | | | | | added llvm.amdgcn.atomic.{add|min|max}.f32 intrinsics to allow generate ds_{add|min|max}[_rtn]_f32 instructions needed for OpenCL float atomics in LDS Reviewed by: arsenm Differential Revision: https://reviews.llvm.org/D37985 llvm-svn: 322656
* [AMDGPU][MC][GFX9] Enable inline constants for SDWA operandsDmitry Preobrazhensky2018-01-177-85/+473
| | | | | | | | | See bug 35771: https://bugs.llvm.org/show_bug.cgi?id=35771 Differential Revision: https://reviews.llvm.org/D42058 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 322655
* Simplify some LogTest testsPavel Labath2018-01-171-78/+90
| | | | | | | | | | | This removes boilerplate for setting up a log channel and capturing the output from some of the tests. I do this by moving the setup code into a test fixture and adding a logAndTakeOutput utility function to log some string and then retrieve it from the log. I also use some googlemock goodies to simplify a couple of assertions. llvm-svn: 322653
* [clang-cl] Let /FA output use intel assembly.Nico Weber2018-01-172-0/+5
| | | | | | | cl's assembly output is in intel syntax, so clang-cl's should be too, PR35031. https://reviews.llvm.org/D42157 llvm-svn: 322652
* [ARM GlobalISel] Legalize G_FPEXT and G_FPTRUNCDiana Picus2018-01-173-0/+138
| | | | | | | | | | | Mark G_FPEXT and G_FPTRUNC as legal or libcall, depending on hardware support, but only for conversions between float and double. Also add the necessary boilerplate so that the LegalizerHelper can introduce the required libcalls. This also works only for float and double, but isn't too difficult to extend when the need arises. llvm-svn: 322651
OpenPOWER on IntegriCloud