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* Replace remaining user-visible mentions of C++1z with C++17.Richard Smith2017-08-1324-132/+135
| | | | llvm-svn: 310804
* [c++2a] Treat 'concept' and 'requires' as keywords, add compat warning for ↵Richard Smith2017-08-136-5/+21
| | | | | | C++17 and before. llvm-svn: 310803
* [X86][BMI] Add BEXTR demanded bits test cases (PR34042)Simon Pilgrim2017-08-131-0/+24
| | | | llvm-svn: 310802
* [X86] Fix typo from r310794. Index = 0 should have been Index == 0.Craig Topper2017-08-131-2/+2
| | | | llvm-svn: 310801
* Enable profile on NetBSDKamil Rytarowski2017-08-132-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: make check-profile: Failing Tests (2): Profile-i386 :: instrprof-dlopen.test Profile-x86_64 :: instrprof-dlopen.test Expected Passes : 64 Unsupported Tests : 42 Unexpected Failures: 2 Sponsored by <The NetBSD Foundation> Reviewers: joerg, vitalybuka, kcc, filcab, fjricci Reviewed By: vitalybuka Subscribers: vsk, llvm-commits, srhines, mgorny, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D36603 llvm-svn: 310800
* [X86] Remove unused pattern fragment that referenced MVT::i1. NFCCraig Topper2017-08-131-5/+0
| | | | llvm-svn: 310799
* [AArch64] Add support for a MinGW AArch64 targetMartin Storsjo2017-08-136-30/+102
| | | | | | Differential Revision: https://reviews.llvm.org/D36364 llvm-svn: 310798
* [COFF, ARM64] Use '//' as comment character in assembly files in GNU ↵Martin Storsjo2017-08-134-2/+30
| | | | | | | | | | | | environments This allows using semicolons for bundling up more than one statement per line. This is used within the mingw-w64 project in some assembly files that contain code for multiple architectures. Differential Revision: https://reviews.llvm.org/D36366 llvm-svn: 310797
* Remove RISCV from LLVM_ALL_TARGETS in CMakeLists.txtAlex Bradbury2017-08-131-1/+1
| | | | | | | | | | | | | | | | | | It was mistakenly added to that list in D23560 (committed in rL285712). RISCV is an experimental backend and should never have been in that list, I mistakenly interpreted LLVM_ALL_TARGETS as a list of all targets rather than targets to build by default. Unfortunately, because of this the RISCV backend has been building by default when it shouldn't be. This commet adds a description comment, which should help to avoid such mistakes in the future. See my message to llvm-dev for more information and analysis <http://lists.llvm.org/pipermail/llvm-dev/2017-August/116347.html>. Differential Revision: https://reviews.llvm.org/D36538 llvm-svn: 310796
* [ScopInfo] Translate ParameterIds to isl++Tobias Grosser2017-08-132-6/+5
| | | | llvm-svn: 310795
* [AVX512] Correct isExtractSubvectorCheap so that it will return the correct ↵Craig Topper2017-08-131-1/+7
| | | | | | | | | | | | answers for extracting 128-bits from a 512-bit vector and for mask registers. Previously it would not return true for extracting either of the upper quarters of a 512-bit registers. For mask registers we support extracting anything from index 0. And otherwise we only support extracting the upper half of a register. Differential Revision: https://reviews.llvm.org/D36638 llvm-svn: 310794
* [X86][ARM][TargetLowering] Add SrcVT to isExtractSubvectorCheapCraig Topper2017-08-136-10/+13
| | | | | | | | | | | | | | | | | Summary: Without the SrcVT its hard to know what is really being asked for. For example if your target has 128, 256, and 512 bit vectors. Maybe extracting 128 from 256 is cheap, but maybe extracting 128 from 512 is not. For x86 we do support extracting a quarter of a 512-bit register. But for i1 vectors we don't have isel patterns for extracting arbitrary pieces. So we need this to have a correct implementation of isExtractSubvectorCheap for mask vectors. Reviewers: RKSimon, zvi, efriedma Reviewed By: RKSimon Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D36649 llvm-svn: 310793
* [X86][SandyBridge] Additional updates to the SNB instructions scheduling ↵Gadi Haber2017-08-1312-1088/+1218
| | | | | | | | | | | | | | | | information This is a continuation patch for commit r307529 which completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target (see also https://reviews.llvm.org/D35019). In this patch we added the scheduling information of additional SNB instructions that were missing from the patch commit r307529, fixed the scheduling of several resource groups that include only port0 instead of port05 (i.e., port0 OR port5) and fixed several incorrect instructions' scheduling in the r307529 commit. The patch also includes the X87 instructions which were missing in previous patch commit r307529 as reported in bugzilla bug 34080. Reviewers: zvi, RKSimon, chandlerc, igorb, m_zuckerman, craig.topper, aymanmus, dim Differential Revision: https://reviews.llvm.org/D36388 llvm-svn: 310792
* [X86][AVX512] Added additional shuffle+trunc test case.Simon Pilgrim2017-08-131-0/+50
| | | | | | An existing test should have covered this but a typo caused it to fail. I've kept both as the codegen for the typo case needs addressing as well. llvm-svn: 310791
* [X86][TBM] Add tests showing failure to fold RFLAGS result into TBM ↵Simon Pilgrim2017-08-132-2/+353
| | | | | | | | instructions. And fails to select TBM instructions at all. llvm-svn: 310790
* [X86][AsmParser][AVX512] Error appropriately when K0 is tried as a write-maskCoby Tayree2017-08-133-4/+9
| | | | | | | | | K0 isn't expected as a write-mask, so provide a detailed error here, instead of the more generic one (invalid op for insn) Conforms with gas Differential Revision: https://reviews.llvm.org/D36570 llvm-svn: 310789
* [X86][TBM] Regenerate bextri intrinsics tests. NFCI.Simon Pilgrim2017-08-131-12/+17
| | | | llvm-svn: 310788
* [X86][AVX512] Add combine for TESTMGuy Blank2017-08-132-1258/+867
| | | | | | | | | | | | Add an X86 combine for TESTM when one of the operands is a BUILD_VECTOR(0,0,...). TESTM op0, BUILD_VECTOR(0,0,...) -> BUILD_VECTOR(0,0,...) TESTM BUILD_VECTOR(0,0,...), op1 -> BUILD_VECTOR(0,0,...) Differential Revision: https://reviews.llvm.org/D36536 llvm-svn: 310787
* [X86] Early out of combineInsertSubvector for mask vectors.Craig Topper2017-08-121-1/+6
| | | | | | The combines here shouldn't be done for mask vectors, but it wasn't clear anything was preventing that. llvm-svn: 310786
* [X86] Fix bad comment. NFCCraig Topper2017-08-121-1/+1
| | | | llvm-svn: 310785
* [X86] When handling addcarry intrinsic, create the flag result with the ↵Craig Topper2017-08-122-2/+29
| | | | | | | | | | | | | | | | | | | | | correct type so we don't crash if we use a memory instruction Summary: Previously we were creating the flag result with MVT::Other which is interpretted as a Chain node. If we used a memory form of the instruction we would end up with a copyToReg that consumed the chain result of the adcx instruction instead of the flag result. Pretty sure we should be using MVT::i32 here, that's what we do other places we create these node types. We should probably consider this for 5.0 as well. Reviewers: RKSimon, zvi, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36645 llvm-svn: 310784
* Fix Wdocumentation warning - typo in argument list. NFCI.Simon Pilgrim2017-08-121-1/+1
| | | | llvm-svn: 310783
* [DAGCombiner] Extending pattern detection for vector shuffle (REAPPLIED)Simon Pilgrim2017-08-125-118/+109
| | | | | | | | | | | | If all the operands of a BUILD_VECTOR extract elements from same vector then split the vector efficiently based on the maximum vector access index. Reapplied with fix to only work with simple value types. Committed on behalf of @jbhateja (Jatin Bhateja) Differential Revision: https://reviews.llvm.org/D35788 llvm-svn: 310782
* [Triple] Add isThumb and isARM functions.Florian Hahn2017-08-126-15/+15
| | | | | | | | | | | | | | | | | | | Summary: isThumb returns true for Thumb triples (little and big endian), isARM returns true for ARM triples (little and big endian). There are a few more checks using arm/thumb that are not covered by those functions, e.g. that the architecture is either ARM or Thumb (little endian) or ARM/Thumb little endian only. Reviewers: javed.absar, rengolin, kristof.beyls, t.p.northover Reviewed By: rengolin Subscribers: llvm-commits, aemerson Differential Revision: https://reviews.llvm.org/D34682 llvm-svn: 310781
* [X86] Regenerate merge store tests. NFCI.Simon Pilgrim2017-08-121-102/+329
| | | | | | Gives us a much better idea of what is going on than just relying on a few checks. llvm-svn: 310780
* [BDCE] clear poison generators after turning a value into zero (PR33695, ↵Sanjay Patel2017-08-122-5/+81
| | | | | | | | | | | | | | | | PR34037) nsw, nuw, and exact carry implicit assumptions about their operands, so we need to clear those after trivializing a value. We decided there was no danger for llvm.assume or metadata, so there's just a comment about that. This fixes miscompiles as shown in: https://bugs.llvm.org/show_bug.cgi?id=33695 https://bugs.llvm.org/show_bug.cgi?id=34037 Differential Revision: https://reviews.llvm.org/D36592 llvm-svn: 310779
* clang-format: add an option -verbose to list the files being processedSylvestre Ledru2017-08-124-16/+36
| | | | | | | | | | | | | | Reviewers: djasper Reviewed By: djasper Subscribers: klimek, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D34824 llvm-svn: 310778
* Fix some minor typos in the llvm XRay exempleSylvestre Ledru2017-08-122-2/+2
| | | | llvm-svn: 310777
* PR34163: Don't cache an incorrect key function for a class if queried betweenRichard Smith2017-08-128-30/+33
| | | | | | | | | | | the class becoming complete and its inline methods being parsed. This replaces the hack of using the "late parsed template" flag to track member functions with bodies we've not parsed yet; instead we now use the "will have body" flag, which carries the desired implication that the function declaration *is* a definition, and that we've just not parsed its body yet. llvm-svn: 310776
* Revert "[Modules] Prevent #import to reenter header if not building a module."Bruno Cardoso Lopes2017-08-123-15/+1
| | | | | | | This reverts commit r310605. Richard pointed out a better way to achieve this, which I'll post a patch for soon. llvm-svn: 310775
* Add a Dockerfile for clang-proto-fuzzerKostya Serebryany2017-08-122-0/+39
| | | | | | | | | | | | | | Summary: Add a Dockerfile for clang-proto-fuzzer Reviewers: morehouse, vitalybuka Reviewed By: morehouse Subscribers: hintonda, cfe-commits Differential Revision: https://reviews.llvm.org/D36635 llvm-svn: 310774
* D36604: PR34148: Do not assume we can use a copy relocation for an ↵Richard Smith2017-08-112-2/+17
| | | | | | | | | | | `external_weak` global An `external_weak` global may be intended to resolve as a null pointer if it's not defined, so it doesn't make sense to use a copy relocation for it. Differential Revision: https://reviews.llvm.org/D36604 llvm-svn: 310773
* Disabling openmp-offload.c on linux until it is stabilized on all local ↵Alex Shlyapnikov2017-08-111-0/+3
| | | | | | | | configurations. Differential revision: https://reviews.llvm.org/D29660 llvm-svn: 310772
* [libFuzzer] experimental support for Clang's coverage ↵Kostya Serebryany2017-08-116-15/+99
| | | | | | (fprofile-instr-generate), Linux-only llvm-svn: 310771
* [x86] add tests for rotate left/right with masked shifter; NFCSanjay Patel2017-08-111-0/+151
| | | | | | | | | | | | | As noted in the test comment, instcombine now produces the masked shift value even when it's not included in the source, so we should handle this. Although the AMD/Intel docs don't say it explicitly, over-rotating the narrow ops produces the same results. An existence proof that this works as expected on all x86 comes from gcc 4.9 or later: https://godbolt.org/g/K6rc1A llvm-svn: 310770
* [compiler-rt] Add SANITIZER_CXX_ABI_LIBNAME=libc++ option.Evgeniy Stepanov2017-08-111-0/+2
| | | | | | | | | | | | Summary: This is to support Android where libc++abi is part of libc++. Reviewers: srhines, EricWF Subscribers: dberris, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D36640 llvm-svn: 310769
* [MIPS] Use ABI to determine stack alignment.John Baldwin2017-08-112-2/+6
| | | | | | | | | | | | | | | | Summary: The stack alignment depends on the ABI (16 bytes for N32 and N64 and 8 bytes for O32), not the CPU type. Reviewers: sdardis Reviewed By: sdardis Subscribers: atanasyan, arichardson, llvm-commits Differential Revision: https://reviews.llvm.org/D36326 llvm-svn: 310768
* [x86] regenerate test checks, add 64-bit run; NFCSanjay Patel2017-08-111-69/+147
| | | | llvm-svn: 310767
* [Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-08-1111-161/+306
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 310766
* [OpenMP] Move failing flag tests to disabled GPUGheorghe-Teodor Bercea2017-08-112-32/+32
| | | | | | | | offloading test file. This should prevent further errors with the sanitizer. Diff: D29660 llvm-svn: 310765
* Fix some broken tests.Zachary Turner2017-08-113-37/+69
| | | | | | | These were pending in a separate patch but I forgot to squash them before comitting, and this one didn't go through. llvm-svn: 310764
* [OptDiag] Updating Remarks in SampleProfileEli Friedman2017-08-117-37/+101
| | | | | | | | | | | | | | | | Updating remark API to newer OptimizationDiagnosticInfo API. This allows remarks to show up in diagnostic yaml file, and enables use of opt-viewer tool. Hotness information for remarks (L505 and L751) do not display hotness information, most likely due to profile information not being propagated yet. Unsure if this is the desired outcome. Patch by Tarun Rajendran. Differential Revision: https://reviews.llvm.org/D36127 llvm-svn: 310763
* [X86] Don't use fsin/fcos/fsincos instructions everCraig Topper2017-08-113-114/+75
| | | | | | | | | | | | | | | | | Summary: Previously we would use these instructions if sse was disabled and fastmath was enabled. As mentioned in D28335, this is a bad idea. Reviewers: efriedma, scanon, DavidKreitzer Reviewed By: DavidKreitzer Subscribers: zvi, llvm-commits Differential Revision: https://reviews.llvm.org/D36344 llvm-svn: 310762
* [libcxx] [test] Rename _Up to U, etc. NFCI.Stephan T. Lavavej2017-08-115-18/+18
| | | | | | | | | | This improves readability and (theoretically) improves portability, as _Ugly names are reserved. This performs additional de-uglification, so all of these tests follow the example of iterator.traits/empty.pass.cpp. llvm-svn: 310761
* [libcxx] [test] Rename __x to x. NFCI.Stephan T. Lavavej2017-08-114-25/+26
| | | | | | | This improves readability and (theoretically) improves portability, as __ugly names are reserved. llvm-svn: 310760
* [libcxx] [test] Rename __c to ch. NFCI.Stephan T. Lavavej2017-08-1137-148/+148
| | | | | | | This improves readability and (theoretically) improves portability, as __ugly names are reserved. llvm-svn: 310759
* [libcxx] [test] Rename _Tp to T. NFCI.Stephan T. Lavavej2017-08-1124-80/+80
| | | | | | | This improves readability and (theoretically) improves portability, as _Ugly names are reserved. llvm-svn: 310758
* Add `-z muldefs` option.Rui Ueyama2017-08-112-1/+7
| | | | llvm-svn: 310757
* Fix access to undefined weak symbols in pic codeRafael Espindola2017-08-112-1/+75
| | | | | | | | | | When the access to a weak symbol is not a call, the access has to be able to produce the value 0 at runtime. We were sometimes producing code sequences where that was not possible if the code was leaded more than 4g away from 0. llvm-svn: 310756
* [pdb] Fix linker module symbols to work with dbgeng.Zachary Turner2017-08-111-12/+18
| | | | | | | | | | | | | | | | The linker module contains a symbol of type S_COMPILE3 which contains various information about the compiler and linker used to create the PDB, such as the name of the linker, the target machine, and the linker version. Interestingly, if we set the version string to 0.0.0.0, then when trying to view local variables WinDbg emits an error that private symbols are not present. By setting this to a valid MSVC linker version string, local variables can display. As such, even though it is not representative of LLVM's version information, we need this for compatibility. llvm-svn: 310755
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