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| author | Craig Topper <craig.topper@intel.com> | 2017-08-12 22:33:57 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-12 22:33:57 +0000 |
| commit | dbca6d47f3644fd901d5f10064a10008b3fc1893 (patch) | |
| tree | 5f4c80eb428b8bf3c1886acc3aa767a0e0d7dc0c | |
| parent | 44cb1ffb6a57b43ac281bf686aa7ae6a1dbdfa52 (diff) | |
| download | bcm5719-llvm-dbca6d47f3644fd901d5f10064a10008b3fc1893.tar.gz bcm5719-llvm-dbca6d47f3644fd901d5f10064a10008b3fc1893.zip | |
[X86] Fix bad comment. NFC
llvm-svn: 310785
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 23f27002120..1c3e5573977 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -35514,7 +35514,7 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, MVT SubVecVT = SubVec.getSimpleValueType(); // If this is an insert of an extract, combine to a shuffle. Don't do this - // if the insert or extract can be represented with a subvector operation. + // if the insert or extract can be represented with a subregister operation. if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR && SubVec.getOperand(0).getSimpleValueType() == OpVT && (IdxVal != 0 || !Vec.isUndef())) { |
