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* [SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat ↵Craig Topper2017-09-2511-88/+91
| | | | | | | | | | | | | | | | vectors This teach simplifyDemandedBits to handle constant splat vector shifts. This required changing some uses of getZExtValue to getLimitedValue since we can't rely on legalization using getShiftAmountTy for the shift amount. I believe there may have been a bug in the ((X << C1) >>u ShAmt) handling where we didn't check if the inner shift was too large. I've fixed that here. I had to add new patterns to ARM because the zext/sext the patterns were trying to look for got turned into an any_extend with this patch. Happy to split that out too, but not sure how to test without this change. Differential Revision: https://reviews.llvm.org/D37665 llvm-svn: 314139
* [MinGW] Don't link -lmsvcrt if a different msvcrt version is to be linkedMartin Storsjo2017-09-252-0/+8
| | | | | | Differential Revision: https://reviews.llvm.org/D37530 llvm-svn: 314138
* [SLP] Add a test for PR32086, NFC.Alexey Bataev2017-09-251-0/+32
| | | | llvm-svn: 314137
* [Hexagon] Better determination of register classes in bit trackerKrzysztof Parzyszek2017-09-254-16/+68
| | | | | | | | | | | Add two callbacks to MachineEvaluator, so that specific implementations can specify more details about register classes: - composeWithSubRegIndex(RC,Idx), to provide the register class for a register from RC used in conjunction with a subregister index Idx. - getPhysRegBitWidth(Reg), to provide the size in bits of the given physical register. llvm-svn: 314136
* [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.Artem Belevich2017-09-2510-4/+308
| | | | | | Differential Revision: https://reviews.llvm.org/D38191 llvm-svn: 314135
* [Hexagon] Make getHexagonSubRegIndex take reference instead of pointerKrzysztof Parzyszek2017-09-255-16/+17
| | | | llvm-svn: 314134
* [AVX-512] Replace large number of explicit patterns that check for ↵Craig Topper2017-09-253-632/+116
| | | | | | | | | | | | | | insert_subvector with zero after masked compares with fewer patterns with predicate This replaces the large number of patterns that handle every possible case of zeroing after a masked compare with a few simpler patterns that use a predicate to check for a masked compare producer. This is similar to what we do for detecting free GR32->GR64 zero extends and free xmm->ymm/zmm zero extends. This shrinks the isel table from ~590k to ~531k. This is a roughly 10% reduction in size. Differential Revision: https://reviews.llvm.org/D38217 llvm-svn: 314133
* Initial patchset to get the testsuite running against armv7 and arm64 iOS ↵Jason Molenda2017-09-2598-165/+517
| | | | | | | | | | | | | | | | | | | | | | | devices. Normal customer devices won't be able to run these tests, we're hoping to get a public facing bot set up at some point. Both devices pass the testsuite without any errors or failures. I have seen some instability with the armv7 test runs, I may submit additional patches to address this. arm64 looks good. I'll be watching the bots for the rest of today; if any problems are introduced by this patch I'll revert it - if anyone sees a problem with their bot that I don't see, please do the same. I know it's a rather large patch. One change I had to make specifically for iOS devices was that debugserver can't create files. There were several tests that launch the inferior process redirecting its output to a file, then they retrieve the file. They were not trying to test file redirection in these tests, so I rewrote those to write their output to a file directly. llvm-svn: 314132
* [SimplifyIndvar] Minor change to refine r314125, NFCHongbin Zheng2017-09-251-1/+1
| | | | llvm-svn: 314130
* [CUDA] Fix names of __nvvm_vote* intrinsics.Artem Belevich2017-09-251-5/+5
| | | | | | | | Also fixed a syntax error in activemask(). Differential Revision: https://reviews.llvm.org/D38188 llvm-svn: 314129
* ARM: One more fix for swifterror CSR setArnold Schwaighofer2017-09-252-3/+11
| | | | | | | We use a differently ordered CSR set if the frame pointer is pushed. Add a matching ..._SwiftError version. llvm-svn: 314128
* Use socketpair on all Unix platformsEugene Zemtsov2017-09-252-16/+46
| | | | | | | | | | | | | Using TCP sockets is insecure against local attackers, and possibly against remote attackers too (some vulnerabilities may allow tricking a browser to make a request to localhost). Use socketpair (which is immune to such attacks) on all Unix platforms. Patch by Demi Marie Obenour < demiobenour@gmail.com > Differential Revision: https://reviews.llvm.org/D33213 llvm-svn: 314127
* Use UINT64_MAX instead of implicitly-type-converted -1.Rui Ueyama2017-09-251-1/+1
| | | | llvm-svn: 314126
* [SimplifyIndvar] Replace the srem used by IV if we can prove both of its ↵Hongbin Zheng2017-09-253-41/+192
| | | | | | | | | | | | operands are non-negative Since now SCEV can handle 'urem', an 'urem' is a better canonical form than an 'srem' because it has well-defined behavior This is a follow up of D34598 Differential Revision: https://reviews.llvm.org/D38072 llvm-svn: 314125
* [Sema] Null check in BuildDeclarationNameExprYi Kong2017-09-252-1/+5
| | | | | | | | | | Qualtype may point to null if we cannot infer its type yet. Fixes PR33843 Differential Revision: https://reviews.llvm.org/D38158 llvm-svn: 314124
* [ARM] Fix -Wdangling-else warning.Benjamin Kramer2017-09-251-8/+4
| | | | | | A ternary is clearer here. No functionality change. llvm-svn: 314123
* Revert "Initial patchset to get the testsuite running against armv7 and ↵Chris Bieneman2017-09-2588-486/+163
| | | | | | | | | | | | | arm64 iOS devices. Normal customer devices won't be able to run these devices, we're hoping to get a public facing bot set up at some point. Both devices pass the testsuite without any errors or failures." This patch has been causing LLDB test failures on ObjC tests. A test log may still be available here: http://lab.llvm.org:8080/green/view/LLDB/job/lldb/1650/ This reverts commit r314038. llvm-svn: 314122
* ARM: Use the proper swifterror CSR list on platforms other than darwinArnold Schwaighofer2017-09-253-44/+53
| | | | | | Noticed by inspection llvm-svn: 314121
* Use a temporary varaible to improve readability. NFC.Rui Ueyama2017-09-251-8/+4
| | | | llvm-svn: 314120
* [clangd] Fix missing "message" key when responding with unsupported methodBenjamin Kramer2017-09-252-1/+20
| | | | | | | | | | | | | | The language server protocol dictates that a ResponseError should have a [message string][1] describing the error. This adds a simple message to the error and a simple test. [1]: https://github.com/Microsoft/language-server-protocol/blob/master/protocol.md#response-message Patch by Raoul Wols! Differential Revision: https://reviews.llvm.org/D38225 llvm-svn: 314119
* revert r314117 because there are bogus clang tests that depend on the optimizerSanjay Patel2017-09-253-52/+94
| | | | llvm-svn: 314118
* [InstCombine] remove extract-of-select vector transformSanjay Patel2017-09-253-94/+52
| | | | | | | | | | | | | | | | | | | | | | | The transform to convert an extract-of-a-select-of-vectors was added at: rL194013 And a question about the validity of this transform was raised in the review: https://reviews.llvm.org/D1539: ...but not answered AFAICT> Most of the motivating cases in that patch are now handled by other combines. These are the tests that were added with the original commit, but they are not regressing even after we remove the transform in this patch. The diffs we see after removing this transform cause us to avoid increasing the instruction count, so we don't want to do those transforms as canonicalizations. The motivation for not turning a vector-select-of-vectors into a scalar operation is shown in PR33301: https://bugs.llvm.org/show_bug.cgi?id=33301 ...in those cases, we'll get vector ops with this patch rather than the vector/scalar mix that we currently see. Differential Revision: https://reviews.llvm.org/D38006 llvm-svn: 314117
* [ScopInfo] Allow uniform branch conditionsTobias Grosser2017-09-255-1/+108
| | | | | | | If all but one branch come from an error condition and the incoming value from this branch is a constant, we can model this branch. llvm-svn: 314116
* Remove trailing whitespaces.Michael Liao2017-09-251-41/+41
| | | | llvm-svn: 314115
* [DebugInfo] Sort the SDDbgValue list before assuming it is in IR orderReid Kleckner2017-09-253-10/+169
| | | | | | | | | | | | | | | | | | | | | | | Summary: This code iterates the 'Orders' vector in parallel with the DbgValue list, emitting all DBG_VALUEs that occurred between the last IR order insertion point and the next insertion point. This assumes the SDDbgValue list is sorted in IR order, which it usually is. However, it is not sorted when a node with a debug value is replaced with another one. When this happens, TransferDbgValues is called, and the new value is added to the end of the list. The problem can be solved by stably sorting the list by IR order. Reviewers: aprantl, Ka-Ka Reviewed By: aprantl Subscribers: MatzeB, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D38197 llvm-svn: 314114
* Use {} instead of make_pair and an iterator for the insertion point, NFCReid Kleckner2017-09-251-5/+6
| | | | llvm-svn: 314113
* Rework atomic ops to use clang builtins rather than llvm asmJan Vesely2017-09-2513-202/+117
| | | | | | | reviewer: Aaron Watry Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 314112
* prepare_builtins: Fix compile breakage with older LLVMJan Vesely2017-09-251-0/+5
| | | | | | | | | Fixes r314050 reviewer: Tom Stellard Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 314111
* [scudo] Scudo thread specific data refactor, part 2Kostya Kortchinsky2017-09-258-145/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Following D38139, we now consolidate the TSD definition, merging the shared TSD definition with the exclusive TSD definition. We introduce a boolean set at initializaton denoting the need for the TSD to be unlocked or not. This adds some unused members to the exclusive TSD, but increases consistency and reduces the definitions fragmentation. We remove the fallback mechanism from `scudo_allocator.cpp` and add a fallback TSD in the non-shared version. Since the shared version doesn't require one, this makes overall more sense. There are a couple of additional cosmetic changes: removing the header guards from the remaining `.inc` files, added error string to a `CHECK`. Question to reviewers: I thought about friending `getTSDAndLock` in `ScudoTSD` so that the `FallbackTSD` could `Mutex.Lock()` directly instead of `lock()` which involved zeroing out the `Precedence`, which is unused otherwise. Is it worth doing? Reviewers: alekseyshl, dvyukov, kcc Reviewed By: dvyukov Subscribers: srhines, llvm-commits Differential Revision: https://reviews.llvm.org/D38183 llvm-svn: 314110
* [X86][LLVM]Expanding Supports lowerInterleavedStore() in ↵Michael Zuckerman2017-09-253-36/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | X86InterleavedAccess (VF8 stride 4): This patch expands the support of lowerInterleavedStore to 8x8i stride 4. LLVM creates suboptimal shuffle code-gen for AVX2. In overall, this patch is a specific fix for the pattern (Strid=4 VF=8) and we plan to include more patterns in the future. The patch goal is to optimize the following sequence: At the end of the computation, we have xmm2, xmm0, xmm12 and xmm3 holding each 8 chars: c0, c1, , c7 m0, m1, , m7 y0, y1, , y7 k0, k1, ., k7 And these need to be transposed/interleaved and stored like so: c0 m0 y0 k0 c1 m1 y1 k1 c2 m2 y2 k2 c3 m3 y3 k3 .... Reviewers DavidKreitzer Farhana zvi igorb guyblank RKSimon Ayal Differential Revision: https://reviews.llvm.org/D36058 Change-Id: I3cc5c2ca5d6318901c192a4428493b99ef424c32 llvm-svn: 314109
* [ELF][fix] Using statically linked lld leads to segmentation fault on ↵Evgeny Mankov2017-09-251-0/+5
| | | | | | | | | | | | | | | linking ELF [Synopsys] Using function elf::link(...) leads to segmentation fault on its second call. First call finishes correctly. [Solution] Clear the rest of globals. Reviewed by: George Rimar and Rui Ueyama Differential Revision: http://reviews.llvm.org/D38131 llvm-svn: 314108
* Fix clangd when built with LLVM_LINK_LLVM_DYLIB=ONSylvestre Ledru2017-09-251-1/+4
| | | | | | | | | | | | Reviewers: malaperle, malaperle-ericsson, bkramer Reviewed By: bkramer Subscribers: bkramer, mgorny, ilya-biryukov, cfe-commits Differential Revision: https://reviews.llvm.org/D38228 llvm-svn: 314107
* [PowerPC] Eliminate compares - add i64 sext/zext handling for SETLT/SETGTNemanja Ivanovic2017-09-256-3/+543
| | | | | | | | As mentioned in https://reviews.llvm.org/D33718, this simply adds another pattern to the compare elimination sequence and is committed without a differential review. llvm-svn: 314106
* [AArch64] Add basic support for Qualcomm's Saphira CPU.Chad Rosier2017-09-2511-0/+45
| | | | llvm-svn: 314105
* [Clang] Adding missing feature to goldmontMichael Zuckerman2017-09-252-0/+3
| | | | | Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c llvm-svn: 314104
* Adding missing feature to goldmont.Michael Zuckerman2017-09-251-1/+2
| | | | | Change-Id: I1ddc619169fae6a56308deef8dae5db3da702cf4 llvm-svn: 314103
* fixing a bug in mask[z]_set1 intrinsicJina Nahias2017-09-252-34/+6
| | | | | | | Differential Revision: https://reviews.llvm.org/D38231 Change-Id: I80bbff9cbe93e4be54d8a761ef9723edf3f57c57 llvm-svn: 314102
* [SLP] Support for horizontal min/max reduction.Alexey Bataev2017-09-253-1299/+1852
| | | | | | | | | | | | | | | Summary: SLP vectorizer supports horizontal reductions for Add/FAdd binary operations. Patch adds support for horizontal min/max reductions. Function getReductionCost() is split to getArithmeticReductionCost() for binary operation reductions and getMinMaxReductionCost() for min/max reductions. Patch fixes PR26956. Reviewers: spatel, mkuper, hfinkel, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D27846 llvm-svn: 314101
* [mips][compiler-rt] Disable sem_init_glibc.cc for MIPS64.Simon Dardis2017-09-251-1/+1
| | | | | | | | | | | This test can't pass on MIPS64 due to the lack of versioned interceptors for asan and company. The interceptors bind to the earlier version of sem_init rather than the latest version. For MIPS64el this causes an accidental pass while MIPS64 big endian fails due reading back a different 32bit word to what sem_init wrote when the test is corrected to use 64bit atomics. llvm-svn: 314100
* [ELF] - Simplify removeUnusedSyntheticSections a bit.George Rimar2017-09-252-5/+4
| | | | | | | | | | | | | | | Previously`InX::Got` and InX::MipsGot synthetic sections were not removed if ElfSym::GlobalOffsetTable was defined. ElfSym::GlobalOffsetTable is a symbol for _GLOBAL_OFFSET_TABLE_. Patch moves ElfSym::GlobalOffsetTable check out from removeUnusedSyntheticSections. Also note that there was no point to check ElfSym::GlobalOffsetTable for MIPS case because InX::MipsGot::empty() always returns false for non-relocatable case, and in case of relocatable output we do not create special symbols anyways. Differential revision: https://reviews.llvm.org/D37623 llvm-svn: 314099
* [ELF] - Report orphan sections if -verbose given.George Rimar2017-09-252-0/+35
| | | | | | | | | When -verbose is specified, patch outputs names of each input orphan section assigned to output. Differential revision: https://reviews.llvm.org/D37517 llvm-svn: 314098
* [ELF] - LTO: do not optimize away symbols accessed from linkerscript.George Rimar2017-09-254-1/+104
| | | | | | | | | | | Previously when BC file had global variable that was accessed from script, it was optimized away or inlined by IPO. In this patch I add symbols at left side of assignment expression as LinkerRedefined, what prevents optimization for them. Differential revision: https://reviews.llvm.org/D37059 llvm-svn: 314097
* [CodeGenPrepare][NFC] Rename TargetTransformInfo::expandMemCmp -> ↵Clement Courbet2017-09-258-12/+12
| | | | | | | | | | | | | | | | TargetTransformInfo::enableMemCmpExpansion. Summary: Right now there are two functions with the same name, one does the work and the other one returns true if expansion is needed. Rename TargetTransformInfo::expandMemCmp to make it more consistent with other members of TargetTransformInfo. Remove the unused Instruction* parameter. Differential Revision: https://reviews.llvm.org/D38165 llvm-svn: 314096
* Do not sort CU vectors.Rui Ueyama2017-09-251-6/+7
| | | | | | | We used to sort and uniquify CU vectors, but looks like CU vectors in .gdb_index sections created by gold are not guaranteed to be sorted. llvm-svn: 314095
* Speeds up CU vector creation.Rui Ueyama2017-09-252-13/+16
| | | | | | | | | | | | | We used to use std::set to uniquify CU vector elements, but as we know, std::set is pretty slow. Fortunately we didn't actually have to use a std::set here. This patch replaces it with std::vector. With this patch, lld's -gdb-index overhead when linking a clang debug build is now about 1 second (8.65 seconds without -gdb-index vs 9.60 seconds with -gdb-index). Since gold takes more than 6 seconds to create a .gdb_index for the same output, our number isn't that bad. llvm-svn: 314094
* Fix off-by-one error.Rui Ueyama2017-09-252-14/+14
| | | | llvm-svn: 314093
* Do not use StringTableBuilder to build symbol table for .gdb_index.Rui Ueyama2017-09-253-20/+26
| | | | | | | | | | | | | | | | Previously, we had two levels of hash table lookup. The first hash lookup uses CachedHashStringRefs as keys and returns offsets in string table. Then, we did the second hash table lookup to obtain GdbSymbol pointers. But we can directly map strings to GDbSymbols. One test file is updated in this patch because we no longer have a '\0' byte at the start of the string pool, which was automatically inserted by StringTableBuilder. This patch speeds up Clang debug build (with -gdb-index) link time by 0.3 seconds. llvm-svn: 314092
* Compute string hashes early and cache them.Rui Ueyama2017-09-252-7/+8
| | | | | | | | This change alone speeds up linking of Clang debug build with -gdb-index by 1.2 seconds, from 12.5 seconds to 11.3 seconds. (Without -gdb-index, lld takes 8.5 seconds to link the same input files.) llvm-svn: 314090
* Rename copy -> copyFrom.Rui Ueyama2017-09-253-3/+3
| | | | | | This patch is to improve code readability. llvm-svn: 314089
* Move Config->SymbolRenaming to SymbolTable.Rui Ueyama2017-09-254-16/+34
| | | | | | | | | | | | In order to keep track of symbol renaming, we used to have Config->SymbolRenaming, and whether a symbol is in the map or not affects its symbol attribute (i.e. "LinkeRedefined" bit). This patch adds "CanInline" bit to Symbol to aggreagate symbol information in one place and removed the member from Config since no one except SymbolTable now uses the table. llvm-svn: 314088
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