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* ELF: Set FDE count in .eh_frame_hdr correctly.Peter Collingbourne2016-04-112-8/+37
| | | | | | | | | | | | | | | | It is possible to have FDEs with duplicate PCs if ICF was able to merge functions with FDEs, or if the input files for some reason contained duplicate FDEs. We previously weren't handling this correctly when producing the contents of the .eh_frame_hdr section; we were dropping entries and leaving null entries at the end of the section, which confused consumers of unwind data, such as the backtrace() function. Fix the bug by setting the FDE count to the number of FDEs actually emitted into .eh_frame_hdr, rather than the number of FDEs in .eh_frame. Differential Revision: http://reviews.llvm.org/D18911 llvm-svn: 265957
* ELF: Implement basic support for module asm in bitcode files.Peter Collingbourne2016-04-113-8/+39
| | | | | | Differential Revision: http://reviews.llvm.org/D18872 llvm-svn: 265956
* TargetRegisterInfo: Add getRegAsmName()Tom Stellard2016-04-112-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The motivation for this new function is to move an invalid assumption about the relationship between the names of register definitions in tablegen files and their assembly names into TargetRegisterInfo, so that we can begin working on fixing this assumption. The current problem is that if you have a register definition in TableGen like: def MYReg0 : Register<"r0", 0>; The function TargetLowering::getRegForInlineAsmConstraint() derives the assembly name from the tablegen name: "MyReg0" rather than the given assembly name "r0". This is working, because on most targets the tablegen name and the assembly names are case insensitive matches for each other (e.g. def EAX : X86Reg<"eax", ...> getRegAsmName() will allow targets to override this default assumption and return the correct assembly name. Reviewers: echristo, hfinkel Subscribers: SamWot, echristo, hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D15614 llvm-svn: 265955
* [InstCombine] rename variables in shifted-shift helper function (NFCI)Sanjay Patel2016-04-111-17/+20
| | | | | | | This is step 3 of refactoring to solve PR26760: https://llvm.org/bugs/show_bug.cgi?id=26760 llvm-svn: 265954
* More upgrading of old- and very-old-style debug info in testcases.Adrian Prantl2016-04-1123-24/+30
| | | | llvm-svn: 265953
* [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtinMichael Zuckerman2016-04-115-0/+375
| | | | | | Differential Revision: http://reviews.llvm.org/D17693 llvm-svn: 265952
* [InstCombine] add helper function for shift-shift optimization (NFCI)Sanjay Patel2016-04-111-24/+37
| | | | | | | This is step 2 of refactoring to solve PR26760: https://llvm.org/bugs/show_bug.cgi?id=26760 llvm-svn: 265951
* This reverts commit r265913 and r265912Sanjoy Das2016-04-117-670/+6
| | | | | | | | | See PR27315 r265913: "[IndVars] Eliminate op.with.overflow when possible" r265912: "[SCEV] See through op.with.overflow intrinsics" llvm-svn: 265950
* [mips] Make Static a default relocation model for MIPS codegenPetar Jovanovic2016-04-1177-335/+338
| | | | | | | | | | | | This change follows up defaults for GCC and Clang, so LLVM does not differ from them. While number of the test files are touched with this change, they all keep the old (expected) behaviour with the explicit option: "-relocation-model=pic" The tests that have not been touched are insensitive to relocation model. Differential Revision: http://reviews.llvm.org/D17995 llvm-svn: 265949
* Retry deletion of temporary files to avoid race conditions on Windows.Adrian McCarthy2016-04-111-12/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D18912 llvm-svn: 265948
* [mips] Trivial corrections to range checked immediates.Daniel Sanders2016-04-117-9/+16
| | | | | | | | | | | | | | Summary: SYNC has a 5-bit unsigned immediate. Move MIPS16-specific pcrel16 operand to Mips16 files. Reviewers: vkalintiris Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D18755 llvm-svn: 265947
* [InstCombine] replace test that no longer works as intendedSanjay Patel2016-04-112-57/+22
| | | | | | | This is step 1 of refactoring to solve PR26760: https://llvm.org/bugs/show_bug.cgi?id=26760 llvm-svn: 265946
* [ThinLTO] BitcodeWriter still requires Analysis libraryTeresa Johnson2016-04-111-1/+1
| | | | | | | | | | | This should fix bot failure: http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/9873 The bitcode writer unfortunately still needs the Analysis library, as it replaces old dependence on BFI etc with dependence on new ModuleSummaryAnalysis pass. llvm-svn: 265945
* [SystemZ] README: remove an implemented idea, add some new onesUlrich Weigand2016-04-111-5/+13
| | | | | | | | | | The note about conditional returns can now be removed, as they are implemented. Let's also add 2 new ones in exchange. Author: koriakin Differential Revision: http://reviews.llvm.org/D18962 llvm-svn: 265944
* [SystemZ] Add SVC instructionUlrich Weigand2016-04-114-0/+37
| | | | | | | | | This is going to be useful for inline assembly only. Author: koriakin Differential Revision: http://reviews.llvm.org/D18952 llvm-svn: 265943
* Allow overflow of indices with constant dim-sizes.Michael Kruse2016-04-114-19/+115
| | | | | | | | | | | | | | | | | | | Allow overflow of indices into the next higher dimension if it has constant size. E.g. float A[32][2]; ((float*)A)[5]; is effectively the same as A[2][1]; This can happen since r265379 as a side effect if ScopDetection recognizes an access as affine, but ScopInfo rejects the GetElementPtr. Differential Revision: http://reviews.llvm.org/D18878 llvm-svn: 265942
* [ThinLTO] Move summary computation from BitcodeWriter to new passTeresa Johnson2016-04-1117-183/+434
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first step in also serializing the index out to LLVM assembly. The per-module summary written to bitcode is moved out of the bitcode writer and to a new analysis pass (ModuleSummaryIndexWrapperPass). The pass itself uses a new builder class to compute index, and the builder class is used directly in places where we don't have a pass manager (e.g. llvm-as). Because we are computing summaries outside of the bitcode writer, we no longer can use value ids created by the bitcode writer's ValueEnumerator. This required changing the reference graph edge type to use a new ValueInfo class holding a union between a GUID (combined index) and Value* (permodule index). The Value* are converted to the appropriate value ID during bitcode writing. Also, this enables removal of the BitWriter library's dependence on the Analysis library that was previously required for the summary computation. Reviewers: joker.eph Subscribers: joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D18763 llvm-svn: 265941
* Mark OffsetSec const. NFC.Rafael Espindola2016-04-111-2/+2
| | | | llvm-svn: 265940
* Remove initializer that are always set by the constructor.Rafael Espindola2016-04-111-5/+5
| | | | llvm-svn: 265939
* Mark a few methods const.Rafael Espindola2016-04-111-4/+4
| | | | llvm-svn: 265938
* Do not bind a non-const reference to a rvalue. NFC.Michael Kruse2016-04-111-2/+3
| | | | | | | | | | MSVC warns with: warning C4239: nonstandard extension used: 'initializing': conversion from 'llvm::DebugLoc' to 'llvm::DebugLoc &' note: A non-const reference may only be bound to an lvalue Change the reference to a const reference. llvm-svn: 265937
* [ARM] Avoid switching ARM/Thumb mode on .arch/.cpu directiveOliver Stannard2016-04-112-0/+82
| | | | | | | | | | | | | | | | | | | | When we see a .arch or .cpu directive, we should try to avoid switching ARM/Thumb mode if possible. If we do have to switch modes, we also need to emit the correct mapping symbol for the new ISA. We did not do this previously, so could emit ARM code with Thumb mapping symbols (or vice-versa). The GAS behaviour is to always stay in the same mode, and to emit an error on any instructions seen when the current mode is not available on the current target. We can't represent that situation easily (we assume that Thumb mode is available if ModeThumb is set), so we differ from the GAS behaviour when switching to a target that can't support the old mode. I've added a warning for when this implicit mode-switch occurs. Differential Revision: http://reviews.llvm.org/D18955 llvm-svn: 265936
* [Clang][AVX512][BuiltIn] Adding avx512 ( ↵Michael Zuckerman2016-04-115-0/+973
| | | | | | | | punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang Differential Revision: http://reviews.llvm.org/D18929 llvm-svn: 265935
* [clang-format] Walk backwards from end() instead of forwards from rend().Benjamin Kramer2016-04-111-1/+1
| | | | | | | | This should've been forwards from rbegin(), reverse iterators are just too confusing to be used by mere mortals. Fixes out-of-bounds walks over the list. llvm-svn: 265934
* [SystemZ] Support conditional indirect sibling calls via BCRUlrich Weigand2016-04-116-5/+613
| | | | | | | | | | | | | | | This adds a conditional variant of CallBR instruction, CallBCR. Also, it can be fused with integer comparisons, resulting in one of the new C*BCall instructions. In addition to CallBRCL limitations, this has another one: it won't trigger if the function to call isn't already in %r1 - see f22 in the test for an example (it's also why the loads in tests are volatile). Author: koriakin Differential Revision: http://reviews.llvm.org/D18928 llvm-svn: 265933
* [SystemZ] Remove incorrect CC use for C*BReturn instructionsUlrich Weigand2016-04-111-1/+1
| | | | | | | | | These are fused compare-and-branches, so they obviously don't use CC. Author: koriakin Differential Revision: http://reviews.llvm.org/D18927 llvm-svn: 265932
* Remove unintentional returnBhushan D. Attarde2016-04-111-1/+0
| | | | llvm-svn: 265931
* [X86] Added extra widening tests for and/xor/or bit operationsSimon Pilgrim2016-04-111-0/+1315
| | | | | | | | Add tests for bitcasting an illegal vector to/from a legal scalar Additional tests requested for D18944 llvm-svn: 265930
* [X86] Added extra widening tests for and/xor/or bit operationsSimon Pilgrim2016-04-111-0/+733
| | | | | | To make sure we're dealing with both cases of legal/illegal number of vector elements and legal/illegal vector element types llvm-svn: 265929
* [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) ↵Michael Zuckerman2016-04-119-0/+620
| | | | | | | | builtin to clang Differential Revision: http://reviews.llvm.org/D18924 llvm-svn: 265928
* [X86] Regenerated sdglue test checksSimon Pilgrim2016-04-111-12/+24
| | | | llvm-svn: 265927
* Don't clutter the test directory with temporary IR files.Benjamin Kramer2016-04-111-2/+2
| | | | | | -emit-llvm emits a file, -emit-llvm-only doesn't. llvm-svn: 265926
* [X86] Added widening tests for and/xor/or bit operationsSimon Pilgrim2016-04-111-0/+663
| | | | | | Part of additional tests requested for D18944 llvm-svn: 265925
* [X86] Restrict max long nop length for Lakemont.Andrey Turetskiy2016-04-112-10/+13
| | | | | | | | | Restrict the max length of long nops for Lakemont to 7. Experiments on MCU benchmarks (Dhrystone, Coremark) show that this is the most optimal length. Differential Revision: http://reviews.llvm.org/D18897 llvm-svn: 265924
* [sanitizer] Restore stderr when using forkpty() to spawn external symbolizerKuba Brecka2016-04-112-23/+14
| | | | | | | | In `AtosSymbolizer`, we're using `forkpty()` to create a new pseudo-terminal to communicate with the `atos` tool (we need that to avoid output buffering in interactive mode). This however redirects both stdout and stderr into a single stream, so when we read the output, we can't distinguish between errors and standard replies. Let's save&restore stderr to avoid that. Differential Revision: http://reviews.llvm.org/D15073 llvm-svn: 265923
* clang-format: [JS] Test for parameter annotations.Martin Probst2016-04-111-0/+3
| | | | | | | | | | | | Summary: Just to ensure no regressions, this already works fine. Reviewers: djasper Subscribers: cfe-commits, klimek Differential Revision: http://reviews.llvm.org/D18950 llvm-svn: 265922
* Fix makefile for TestMiThreadInfo after rL265858 (2nd try)Tamas Berghammer2016-04-111-0/+2
| | | | llvm-svn: 265921
* Fix makefile for TestMiThreadInfo after rL265858Tamas Berghammer2016-04-111-2/+0
| | | | | | | The makefile was explicitly setting LDFLAGS what is breaking some rules in the global makefile. llvm-svn: 265920
* [tsan] Replace 'not' with '%deflake' in gcd-apply-race.mm Darwin test.Kuba Brecka2016-04-111-1/+1
| | | | llvm-svn: 265919
* Remove redundant conditions of the form (A || (!A && B)) -> (A || B)Benjamin Kramer2016-04-115-12/+8
| | | | | | Found by cppcheck! PR27286 PR27287 PR27288 PR27289 llvm-svn: 265918
* [GCC] Attribute ifunc support in clangDmitry Polukhin2016-04-1113-33/+265
| | | | | | | | | | | This patch add support for GCC attribute((ifunc("resolver"))) for targets that use ELF as object file format. In general ifunc is a special kind of function alias with type @gnu_indirect_function. LLVM patch http://reviews.llvm.org/D15525 Differential Revision: http://reviews.llvm.org/D15524 llvm-svn: 265917
* clang-format: [JS] do not insert semicolons after wrapped annotations.Martin Probst2016-04-112-0/+9
| | | | | | | | | | Reviewers: djasper Subscribers: klimek Differential Revision: http://reviews.llvm.org/D18943 llvm-svn: 265916
* [Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, ↵Michael Zuckerman2016-04-115-0/+552
| | | | | | | | vpermil{var}{ps|pd}{256|512} ) builtin to clang. Differential Revision: http://reviews.llvm.org/D18933 llvm-svn: 265915
* Implement LWG#680, which was missed lo these many moons ago, and was ↵Marshall Clow2016-04-112-8/+5
| | | | | | reported as bug #27259. As a drive-by fix, replace the hand-rolled equivalent to addressof in __wrap_iter with the real thing. llvm-svn: 265914
* [IndVars] Eliminate op.with.overflow when possibleSanjoy Das2016-04-103-1/+245
| | | | | | | | | | | | | | | Summary: If we can prove that an op.with.overflow intrinsic does not overflow, we can get rid of the intrinsic, and replace it with non-wrapping arithmetic. Reviewers: atrick, regehr Subscribers: sanjoy, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18685 llvm-svn: 265913
* [SCEV] See through op.with.overflow intrinsicsSanjoy Das2016-04-104-5/+425
| | | | | | | | | | | | | | | Summary: This change teaches SCEV to see reduce `(extractvalue 0 (op.with.overflow X Y))` into `op X Y` (with a no-wrap tag if possible). Reviewers: atrick, regehr Subscribers: mcrosier, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D18684 llvm-svn: 265912
* Remove leftovers from previous linker experiments.Davide Italiano2016-04-100-0/+0
| | | | llvm-svn: 265911
* [ELF] Do not skip relocation scanning checking if the symbol gets dynamic ↵Simon Atanasyan2016-04-103-4/+80
| | | | | | | | | | | | | | | | | COPY relocation already It is possible that the same symbol referenced by two kinds of relocations at the same time. The first type requires say GOT entry creation, the second type requires dynamic copy relocation. For MIPS targets they might be R_MIPS_GOT16 and R_MIPS_HI16 relocations. For X86 target they might be R_386_GOT32 and R_386_32 respectively. Now LLD never creates GOT entry for a symbol if this symbol already has related copy relocation. This patch solves this problem. Differential Revision: http://reviews.llvm.org/D18862 llvm-svn: 265910
* Plumb the option to emit the `ModuleHash` in the bitcode through the bitcode ↵Mehdi Amini2016-04-102-11/+18
| | | | | | | writer APIs From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265907
* Add a ThreadSanitizer testcase that tests multiple reported issues.Kuba Brecka2016-04-103-0/+212
| | | | llvm-svn: 265906
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