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* Revert "[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator."Quentin Colombet2016-04-081-5/+12
| | | | | | | | | | This reverts commit r265734. Looks like ASan is not happy about it. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/11741 Looking. llvm-svn: 265755
* [RegisterBankInfo] Make the debug output more compact.Quentin Colombet2016-04-081-1/+1
| | | | | | | Print the mask of the partial mapping as an hexadecimal instead of a binary value. llvm-svn: 265754
* Fix formatting and wording of llvm-ranlib error message. NFC.Sunil Srivastava2016-04-081-1/+1
| | | | | | | | Patch by Douglas Yung! Reviewed by Rafael Espindola llvm-svn: 265753
* [IR/Verifier] Fix (yet another) crash.Davide Italiano2016-04-082-8/+24
| | | | | | | We need to check that if we reference a retainedType from DICompileUnit we're actually referencing a DICompositeType. llvm-svn: 265752
* [CUDA] Tweak math forward declares so we're compatible with libstdc++4.9.Justin Lebar2016-04-073-158/+192
| | | | | | | | | | | | | | | | | | Summary: See comments in patch; we were assuming that some stdlib math functions would be defined in namespace std, when in fact the spec says they should be defined in the global namespace. libstdc++4.9 became more conforming and broke us. This new implementation seems to cover the known knowns. Reviewers: rsmith Subscribers: cfe-commits, tra Differential Revision: http://reviews.llvm.org/D18882 llvm-svn: 265751
* Use EM_NONE instead of 0 to represent an invalid value. NFC.Rui Ueyama2016-04-071-1/+1
| | | | llvm-svn: 265750
* [RegBankSelect] Add a few debug statements.Quentin Colombet2016-04-071-0/+9
| | | | llvm-svn: 265749
* ELF: Add --build-id=sha1 option.Rui Ueyama2016-04-076-5/+35
| | | | llvm-svn: 265748
* [RegisterBankInfo] Add print and dump method to the InstructionMappingQuentin Colombet2016-04-072-0/+29
| | | | | | helper class. llvm-svn: 265747
* [RegisterBankInfo] Add print and dump method to the ValueMapping helperQuentin Colombet2016-04-072-0/+28
| | | | | | class. llvm-svn: 265746
* [MachineInstr] Teach the print method about RegisterBank.Quentin Colombet2016-04-071-11/+10
| | | | | | | | Properly print either the register class or the register bank or a virtual register. Get rid of a few ifdefs in the process. llvm-svn: 265745
* ELF: Ignore --detect-odr-violations flag.Peter Collingbourne2016-04-071-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D18877 llvm-svn: 265744
* [AArch64] Fix a typo in the register class to register bank mapping.Quentin Colombet2016-04-071-1/+1
| | | | | | For GPR family we want the GPR register bank, not FPR! llvm-svn: 265743
* [RegisterBankInfo] Escap \@ in r265741. [-Wdocumentation]Quentin Colombet2016-04-071-1/+1
| | | | llvm-svn: 265742
* [RegisterBankInfo] Change the semantic of recordRegBankForType.Quentin Colombet2016-04-071-7/+12
| | | | | | | | Now, recordRegBankForType records only the first register bank that covers a type instead of the last. This behavior can, nevertheless, be override with the additional Force parameter to force the update. llvm-svn: 265741
* llvm-dwarfdump: Use deque rather than vector to preserve object ↵David Blaikie2016-04-072-8/+4
| | | | | | | | | | | | | | reference/pointer identity TUs in each unit refer to the unit they are in, if the unit is moved this reference is invalidated & things break. No test case because UB isn't testable - ASan would likely catch this on a large enough test case (just needs to have enough TUs that a reallocation of the vector would occur) but didn't seem worthwhile. Up for debate/revisiting if anyone feels strongly. llvm-svn: 265740
* [RegisterBankInfo] Strengthen getInstrMappingImpl.Quentin Colombet2016-04-071-14/+21
| | | | | | | Teach the target independent code how to take advantage of type information to get the mapping of an instruction. llvm-svn: 265739
* Fix TestImport for Windows by ensuring backslashes in the directory paths ↵Adrian McCarthy2016-04-071-7/+8
| | | | | | | | | | are properly escaped in Python. The Python import works by ensuring the directory of the module or package is in sys.path, and then it does a Python `import foo`. The original code was not escaping the backslashes in the directory path, so this wasn't working. Differential Revision: http://reviews.llvm.org/D18873 llvm-svn: 265738
* ELF: Implement --build-id=md5.Rui Ueyama2016-04-077-26/+95
| | | | | | | | | Previously, we supported only one hash function, FNV-1, so BuildIdSection directly handled hash computation. In this patch, I made BuildIdSection an abstract class and defined two subclasses, BuildIdFnv1 and BuildIdMd5. llvm-svn: 265737
* [RegisterBankInfo] Add a way to record what register bank covers aQuentin Colombet2016-04-072-5/+48
| | | | | | | | | | | | specific type. This will be used to find the default mapping of the instruction. Also, this information is recorded, instead of computed, because it is expensive from a type to know which register bank maps it. Indeed, we need to iterate through all the register classes of all the register banks to find the one that maps the given type. llvm-svn: 265736
* [RegisterBankInfo] Introduce getRegBankFromConstraints as an helperQuentin Colombet2016-04-072-20/+46
| | | | | | | | | | | method. NFC. The refactoring intends to make the code more readable and expose more features to potential derived classes. llvm-svn: 265735
* [TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.Quentin Colombet2016-04-071-12/+5
| | | | llvm-svn: 265734
* [RegisterBankInfo] Refactor the code to use BitMaskClassIterator.Quentin Colombet2016-04-071-55/+24
| | | | llvm-svn: 265733
* In GDBRemoteCommunicationClient::GetHostInfo, don't set theJason Molenda2016-04-075-39/+1
| | | | | | | | | | | | | | | | | | os to "ios" or "macosx" if it is unspecified. For environments where there genuinely is no os, we don't want to errantly convert that to ios/macosx, e.g. bare board debugging. Change PlatformRemoteiOS, PlatformRemoteAppleWatch, and PlatformRemoteAppleTV to not create themselves if we have an unspecified OS. Same problem - these are not appropriate platforms for bare board debugging environments. Have Process::Attach's logging take place if either process or target logging is enabled. <rdar://problem/25592378> llvm-svn: 265732
* Const correctness for BranchProbabilityInfo (NFC)Mehdi Amini2016-04-072-40/+43
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265731
* [TargetRegisterInfo] Introduce a helper class, BitMaskClassIterator, toQuentin Colombet2016-04-071-0/+92
| | | | | | | | | | iterate over register class bitmask. Thanks to this helper class, it would not require for each user of the register classes bitmask to actually know how they are represents. Moreover, it will make the code much easier to read. llvm-svn: 265730
* Rename parameter I to Index for WriteCombinedGlobalValueSummary() (NFC)Mehdi Amini2016-04-071-4/+4
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265729
* Replace Sema-level implementation of -fassume-sane-operator-new with aRichard Smith2016-04-0725-99/+103
| | | | | | | | | | | | | | CodeGen-level implementation. Instead of adding an attribute to clang's FunctionDecl, add the IR attribute directly. This means a module built with this flag is now compatible with code built without it and vice versa. This change also results in the 'noalias' attribute no longer being added to calls to operator new in the IR; it's now only added to the declaration. It also fixes a bug where we failed to add the attribute to the 'nothrow' versions (because we didn't implicitly declare them, there was no good time to inject a fake attribute). llvm-svn: 265728
* [RegBankSelect] Reuse RegisterBankInfo logic to get to the register bankQuentin Colombet2016-04-072-12/+6
| | | | | | | | | from a register. On top of duplicating the logic, it was buggy! It would assert on physical registers, since MachineRegisterInfo does not have any information regarding register classes/banks for them. llvm-svn: 265727
* Do not select EhPad BB in MachineBlockPlacement when there is regular BB to ↵Amaury Sechet2016-04-076-75/+170
| | | | | | | | | | | | | | | | | schedule Summary: EHPad BB are not entered the classic way and therefor do not need to be placed after their predecessors. This patch make sure EHPad BB are not chosen amongst successors to form chains, and are selected as last resort when selecting the best candidate. EHPad are scheduled in reverse probability order in order to have them flow into each others naturally. Reviewers: chandlerc, majnemer, rafael, MatzeB, escha, silvas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17625 llvm-svn: 265726
* [AArch64] Get rid of some GlobalISel ifdefs.Quentin Colombet2016-04-071-3/+1
| | | | llvm-svn: 265725
* Sort options.Rui Ueyama2016-04-071-3/+3
| | | | llvm-svn: 265724
* ELF: Define -S as an alias for --strip-debug.Rui Ueyama2016-04-072-0/+3
| | | | llvm-svn: 265723
* ELF: Add --strip-debug option.Rui Ueyama2016-04-075-3/+41
| | | | | | | If --strip-debug option is given, then all sections whose names start with ".debug" are removed from output. llvm-svn: 265722
* [TargetRegisterInfo] Fix the comment of SuperRegClassIterator::getMask.Quentin Colombet2016-04-071-1/+2
| | | | llvm-svn: 265721
* [AArch64] gcc does not like litteral without quotes even on preprocessor macros.Quentin Colombet2016-04-071-1/+1
| | | | llvm-svn: 265720
* [AArch64][CallLowering] Do not build the API if GlobalISel is not built.Quentin Colombet2016-04-072-14/+5
| | | | | | | This gets rid of some ifdefs and dummy implementations that were here just to fill the blanks. llvm-svn: 265719
* [modules] Allow differences in flags that only affect preprocessor predefinesRichard Smith2016-04-073-17/+50
| | | | | | | (and __has_feature checks) between explicitly-specified module files and the current compilation. llvm-svn: 265718
* ELF: Add --no-gnu-unique option.Rui Ueyama2016-04-075-10/+30
| | | | | | | When the option is specified, then all STB_GNU_UNIQUE symbols are converted to STB_GLOBAL symbols. llvm-svn: 265717
* [GlobalISel] Add RegBankSelect hooks into the pass pipeline.Quentin Colombet2016-04-073-0/+23
| | | | | | | Now, RegBankSelect will happen after the IRTranslation and the target may optionally add additional passes in between. llvm-svn: 265716
* [sanitizer] Fix sem_init_glibc.cc test on __HAVE_64B_ATOMIC arches.Evgeniy Stepanov2016-04-071-4/+15
| | | | | | | | | | | | | | | | | | | | | glibc can use one of 2 layouts for semaphores: architectures that don't HAVE_64B_ATOMIC use an uint32_t field with semaphore value, then a private field, then a waiting thread count field - this is the layout currently assumed by the test. However, HAVE_64B_ATOMIC arches use a fused uint64_t field that contains the value in low bits and waiting thread count in high bits, followed by a private field. This resulted in taking private field from the wrong offset on 64-bit atomic platforms (the test still passed, but didn't actually test the private field). On big-endian platforms, this resulted in a fail, since the first 4 bytes overlay the thread count field, and not the value field. Found while porting ASan to s390x. Patch by Marcin Kościelnicki. llvm-svn: 265715
* [sancov] updaing android test after enabling cc edge pruningMike Aizatsky2016-04-071-1/+1
| | | | llvm-svn: 265714
* [AMDGPU] Implement get_local_size for amdgcn--amdhsa tripleKonstantin Zhuravlyov2016-04-075-1/+41
| | | | | | Differential Revision: http://reviews.llvm.org/D18284 llvm-svn: 265713
* [ObjC kindof] Use type bound to filter out the candidate methods.Manman Ren2016-04-074-11/+61
| | | | | | rdar://21306753 llvm-svn: 265712
* NFC: simplify code in BuildInstanceMessage.Manman Ren2016-04-074-69/+112
| | | | | | | | | | | | | | | | Instead of searching the global pool multiple times: in LookupFactoryMethodInGlobalPool, LookupInstanceMethodInGlobalPool, CollectMultipleMethodsInGlobalPool, and AreMultipleMethodsInGlobalPool, we now collect the method candidates in CollectMultipleMethodsInGlobalPool only, and other functions will use the collected method set. This commit adds parameter "Methods" to AreMultipleMethodsInGlobalPool, and SelectBestMethod. It also changes the implementation of CollectMultipleMethodsInGlobalPool to collect the desired kind first, if none is found, to collect the other kind. This avoids the need to call both LookupFactoryMethodInGlobalPool and LookupInstanceMethodInGlobalPool. llvm-svn: 265711
* ELF: Implement --start-lib and --end-libRui Ueyama2016-04-0713-19/+231
| | | | | | | | | | | | | | | | start-lib and end-lib are options to link object files in the same semantics as archive files. If an object is in start-lib and end-lib, the object is linked only when the file is needed to resolve undefined symbols. That means, if an object is in start-lib and end-lib, it behaves as if it were in an archive file. In this patch, I introduced a new notion, LazyObjectFile. That is analogous to Archive file type, but that works for a single object file instead of for an archive file. http://reviews.llvm.org/D18814 llvm-svn: 265710
* AMDGPU/SI: Implement atomic load/store for i32 and i64Jan Vesely2016-04-076-24/+289
| | | | | | | | | | Standard load/store instructions with GLC bit set. Reviewers: tstellardAMD, arsenm Differential Revision: http://reviews.llvm.org/D18760 llvm-svn: 265709
* AMDGPU/SI: Add latency for export instructionsTom Stellard2016-04-072-5/+5
| | | | | | | | | | Reviewers: arsenm, nhaehnle Subscribers: nhaehnle, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18599 llvm-svn: 265708
* [RegBankSelect] Initial implementation for non-optimized output.Quentin Colombet2016-04-072-19/+154
| | | | | | | | The pass walk through the machine function and assign the register banks using the default mapping. In other words, there is no attempt to reduce cross register copies. llvm-svn: 265707
* Recommit r263036 with additional inlining, so that it will continue to work ↵Marshall Clow2016-04-072-4/+47
| | | | | | with existing system dylibs. Implements LWG#2583 llvm-svn: 265706
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