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* AMDGPU: Don't run passes that aren't usefulMatt Arsenault2016-05-181-0/+5
| | | | llvm-svn: 269943
* [PS4] Clean up some test commentary. NFCPaul Robinson2016-05-181-5/+5
| | | | llvm-svn: 269941
* [Clang][AVX512] completing missing intrinsics [pandnd].Michael Zuckerman2016-05-182-0/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D20101 llvm-svn: 269939
* AMDGPU: Fix assert on ttmp registersMatt Arsenault2016-05-181-2/+2
| | | | | | | | | | | Use register class that does not include them when looking for unallocated registers. This is hit by the udiv v8i64 test in the opencl integer conformance test, and takes a few seconds to compile in a debug build so no test included. llvm-svn: 269938
* [PM] Port per-function SCCP to the new pass manager.Davide Italiano2016-05-187-46/+92
| | | | llvm-svn: 269937
* [ASTMatcher] Fix a ASTMatcher test failure on Windows.Haojian Wu2016-05-181-7/+8
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: thakis, cfe-commits, klimek Differential Revision: http://reviews.llvm.org/D20369 llvm-svn: 269936
* Teach Sema::MergeFunctionDecl to properly check for an out-of-line ↵Vassil Vassilev2016-05-182-1/+9
| | | | | | | | | | | | definition of a function that is declared as =default in its class definition. First part of PR27699. Patch by Cristina Cristescu! Reviewed by Richard Smith and me. llvm-svn: 269935
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-182-1/+21
| | | | | | Clang follow-up to r269933. llvm-svn: 269934
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-183-2/+35
| | | | llvm-svn: 269933
* Removed duplicate SSE42 builtin tests from avx-builtins.cSimon Pilgrim2016-05-181-70/+0
| | | | llvm-svn: 269932
* [X86][SSE42] Sync with llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-42/+26
| | | | llvm-svn: 269931
* [WebAssembly] Don't expand divisions by constants.Dan Gohman2016-05-183-0/+69
| | | | | | | Don't expand divisions by constants if it would require multiple instructions. The current assumption is that engines will perform the desired optimizations. llvm-svn: 269930
* [X86][SSE42] Added fast-isel tests to sync with ↵Simon Pilgrim2016-05-182-0/+411
| | | | | | clang/test/CodeGen/sse42-builtins.c llvm-svn: 269929
* [clang-tidy] Use unresolvedLookupExpr node matcher from ASTMatcher.Haojian Wu2016-05-181-7/+0
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: aaron.ballman, cfe-commits Differential Revision: http://reviews.llvm.org/D20367 llvm-svn: 269928
* [clang-include-fixer] Added Vim integration for clang-include-fixer.Eric Liu2016-05-183-0/+117
| | | | | | | | | | | | Summary: [clang-include-fixer] Added Vim integration for clang-include-fixer. Reviewers: hokein, bkramer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D20329 llvm-svn: 269927
* [X86][SSE41] Sync with llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-20/+20
| | | | llvm-svn: 269926
* [X86][SSE41] Sync with clang/test/CodeGen/sse41-builtins.cSimon Pilgrim2016-05-181-39/+39
| | | | llvm-svn: 269925
* [clang-format] Make formatReplacements() also sort #includes.Eric Liu2016-05-182-1/+36
| | | | | | | | | | | | Summary: [clang-format] Make formatReplacements() also sort #includes. Reviewers: bkramer, djasper Subscribers: klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D20362 llvm-svn: 269924
* [include-fixer] Don't insert #includes if a fatal error occurred.Benjamin Kramer2016-05-183-3/+23
| | | | | | | | | This typically happens when the user didn't setup include paths correctly and the fixer starts adding garbage includes. Avoid that. Disable the error limit though, as we might hit that easily with missing includes and still want to fix those cases. llvm-svn: 269923
* [SystemZ] Fix register ordering for BinaryRRF instructionsBryan Chan2016-05-182-11/+11
| | | | | | | | | | | | | | | | | Summary: The ordering of registers in BinaryRRF instructions are wrong, and affects the copysign instruction (CPSDR). This results in the wrong magnitude and sign being set. Author: zhanjunl Reviewers: kbarton, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20308 llvm-svn: 269922
* [X86][SSE3] Sync with llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-0/+2
| | | | llvm-svn: 269921
* [X86][SSE3] Sync with clang/test/CodeGen/sse3-builtins.cSimon Pilgrim2016-05-181-2/+3
| | | | llvm-svn: 269920
* White space cleanup.Rafael Espindola2016-05-181-2/+2
| | | | llvm-svn: 269919
* [clang-tidy] Fix misc-unused-using-decls test failure in windowsHaojian Wu2016-05-181-1/+1
| | | | | | buildbot. llvm-svn: 269918
* [sanitizer] Fix a crash when demangling Swift symbols, take 3Kuba Brecka2016-05-182-4/+9
| | | | | | | | | | The previous patch (r269291) was reverted (commented out) because the patch caused leaks that were detected by LSan and they broke some lit tests. The actual reason was that dlsym allocates an error string buffer in TLS, and some LSan lit tests are intentionally not scanning TLS for root pointers. This patch simply makes LSan ignore the allocation from dlsym, because it's not interesting anyway. llvm-svn: 269917
* [ASTMatcher] Add a node matcher for UnresolvedLookupExpr.Haojian Wu2016-05-184-0/+43
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: aaron.ballman, klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D20360 llvm-svn: 269916
* Removing an unused variable introduced in r269911; NFC.Aaron Ballman2016-05-181-1/+0
| | | | llvm-svn: 269915
* [Mips] Finetuning MIPS32 Android default variantsPetar Jovanovic2016-05-183-3/+30
| | | | | | | | | MIPS32 Android defaults to FPXX ("-fpxx"). MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg"). Differential Revision: http://reviews.llvm.org/D20345 llvm-svn: 269914
* Try again to fix pdbdump-headers.test on big-endian hosts after r269861.Daniel Sanders2016-05-181-5/+9
| | | | | | | r269898 fixed the problem with HashBuckets but the same issue occurred with AddressMap and ThunkMap too. llvm-svn: 269913
* Add new flag and intrinsic support for MWAITX and MONITORX instructionsAshutosh Nema2016-05-1812-15/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper, RKSimon Subscribers: RKSimon, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19795 llvm-svn: 269911
* Update for llvm change.Rafael Espindola2016-05-182-8/+7
| | | | llvm-svn: 269910
* Don't pass a Reloc::Model to MC.Rafael Espindola2016-05-1817-71/+59
| | | | | | | | | | | | MC only needs to know if the output is PIC or not. It never has to decide about creating GOTs and PLTs for example. The only thing that MC itself uses this information for is expanding "macros" in sparc and mips. The rest I am pretty sure could be moved to CodeGen. This is a cleanup and isolates the code from future changes to Reloc::Model. llvm-svn: 269909
* [VectorUtils] Fix nasty use-after-freeJames Molloy2016-05-181-1/+3
| | | | | | | | | | In truncateToMinimalBitwidths() we were RAUW'ing an instruction then erasing it. However, that intruction could be cached in the map we're iterating over. The first check is "I->use_empty()" which in most cases would return true, as the (deleted) object was RAUW'd first so would have zero use count. However in some cases the object could have been polluted or written over and this wouldn't be the case. Also it makes valgrind, asan and traditionalists who don't like their compiler to crash sad. No testcase as there are no externally visible symptoms apart from a crash if the stars align. Fixes PR26509. llvm-svn: 269908
* Add new intrinsic support for MONITORX and MWAITX instructionsAshutosh Nema2016-05-188-2/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits Differential Revision: http://reviews.llvm.org/D19796 llvm-svn: 269907
* [clang-tidy] Fix a template function false positive in ↵Haojian Wu2016-05-182-0/+25
| | | | | | | | | | | | | | misc-unused-using-decls check. Summary: Ignore warning uninstantiated template function usages. Reviewers: djasper, alexfh Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D20326 llvm-svn: 269906
* Fix typo in comment aligment should be alignment. NFC.Peter Smith2016-05-181-1/+1
| | | | llvm-svn: 269905
* [AVR] Remove the 'AVRConfig.h' headerDylan McKay2016-05-187-27/+0
| | | | | | | | | | It defined the LLVM_AVR_GCC_COMPAT constant, which would enable/disable certain GCC-specific behaviours. There is no point conditionally turning it on/off, as it will always be turned on, and we have to maintain both code paths anyway. llvm-svn: 269904
* [X86][SSSE3] Sync with clang/test/CodeGen/ssse3-builtins.cSimon Pilgrim2016-05-181-0/+19
| | | | llvm-svn: 269903
* [X86][SSE4A] Sync with clang/test/CodeGen/sse4a-builtins.cSimon Pilgrim2016-05-181-4/+6
| | | | llvm-svn: 269902
* [AVR] Add missing CMake dependenciesDylan McKay2016-05-182-6/+8
| | | | llvm-svn: 269901
* [AVR] Fix a few compile errorsDylan McKay2016-05-183-5/+4
| | | | llvm-svn: 269900
* [PATCH] [mips] Restrict the creation of compact branchesSimon Dardis2016-05-184-2/+47
| | | | | | | | | | | | | | | | | Restrict the creation of compact branches so that they do meet the ISA requirements. Notably do not permit $zero to be used as a operand for compact branches and ensure that some other branches fulfil the requirement that rs != rt. Fixup cases where $rs > $rt for bnec and beqc. Recommit of rL269893 with reviewers comments. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D20284 llvm-svn: 269899
* Attempt to fix pdbdump-headers.test on big-endian hosts after r269861.Daniel Sanders2016-05-181-2/+6
| | | | llvm-svn: 269898
* Revert "[mips] Restrict the creation of compact branches"Simon Dardis2016-05-184-47/+2
| | | | | | | | This reverts commit rL269893. Incorrect patch applied. llvm-svn: 269897
* [clang-tidy] Fix a functional change from r269656.Benjamin Kramer2016-05-181-3/+4
| | | | | | | | Instead of forming char ranges that patch made us form token ranges, which behave subtly different. Sadly I'm only seeing this as part of a larger test case that I haven't fully reduced yet. llvm-svn: 269896
* [AVR] Convert C style comments to C++Dylan McKay2016-05-187-27/+11
| | | | llvm-svn: 269895
* [include-fixer] Run tests with -fno-ms-compatibility.Benjamin Kramer2016-05-181-4/+3
| | | | | | | Something behind that flag makes us get fewer typo correction callbacks, unbreak the tests on windows for now. llvm-svn: 269894
* [mips] Restrict the creation of compact branchesSimon Dardis2016-05-185-2/+99
| | | | | | | | | | | | | | | Restrict the creation of compact branches so that they meet the ISA encoding requirements. Notably do not permit $zero to be used as a operand for compact branches and ensure that some other branches fulfil the requirement that rs != rt. Fixup cases where $rs > $rt for bnec and beqc. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D20284 llvm-svn: 269893
* [Sparc] Add Soft Float supportChris Dewhurst2016-05-1810-101/+528
| | | | | | | | | | This change adds support for software floating point operations for Sparc targets. This is the first in a set of patches to enable software floating point on Sparc. The next patch will enable the option to be used with Clang. Differential Revision: http://reviews.llvm.org/D19265 llvm-svn: 269892
* Support for MSVS default calling convention options (/Gd, /Gz, /Gv,Alexey Bataev2016-05-189-14/+132
| | | | | | | | | /Gr), by Alexander Makarov Patch for bug #27711 Differential Revision: http://reviews.llvm.org/D20171 llvm-svn: 269891
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