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* AMDGPU/GlobalISel: Fix unused variable warning in releaseMatt Arsenault2020-01-061-2/+1
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* [mlir][Linalg] Add a linalg.reshape opNicolas Vasilache2020-01-068-15/+458
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This diff adds a new operation to linalg to allow reshaping of an existing view into a new view in the same buffer at the same offset. More specifically: The `linalg.reshape` op produces a new view whose sizes are a reassociation of the original `view`. Depending on whether or not the reassociated MemRefType is contiguous, the resulting memref may require explicit alloc and copies. A reassociation is defined as a continous grouping of dimensions and is represented with a affine map array attribute. In the future, non-continous groupings may be allowed (i.e. permutations, reindexings etc). For now, it is assumed that either: 1. a reassociation produces and consumes contiguous MemRefType or, 2. the reshape op will be folded into its consumers (by changing the shape of the computations). All other cases are undefined behavior and a reshape op may not lower to LLVM if it cannot be proven statically that it does not require alloc+copy. A reshape may either collapse or expand dimensions, depending on the relationship between source and target memref ranks. The verification rule is that the reassociation maps are applied to the memref with the larger rank to obtain the memref with the smaller rank. In the case of a dimension expansion, the reassociation maps can be interpreted as inverse maps. Examples: ```mlir // Dimension collapse (i, j) -> i' and k -> k' %1 = linalg.reshape %0 [(i, j, k) -> (i, j), (i, j, k) -> (k)] : memref<?x?x?xf32, stride_spec> into memref<?x?xf32, stride_spec_2> ``` ```mlir // Dimension expansion i -> (i', j') and (k) -> (k') %1 = linalg.reshape %0 [(i, j, k) -> (i, j), (i, j, k) -> (k)] : memref<?x?xf32, stride_spec> into memref<?x?x?xf32, stride_spec_2> ``` The relevant invalid and roundtripping tests are added. Reviewers: AlexEichenberger, ftynse, rriddle, asaadaldien, yangjunpro Subscribers: kiszk, merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72168
* [NFC][Test] Add a test to verify the DAGCombine of fmaQingShan Zhang2020-01-071-0/+143
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* AMDGPU: Add run line to int_to_fp testsMatt Arsenault2020-01-062-57/+109
| | | | | This wasn't catching a regression on targets with legal i16 triggered in a future commit.
* AMDGPU: Select llvm.amdgcn.interp.p2.f16 directlyMatt Arsenault2020-01-062-26/+12
| | | | This will enable automatic GlobalISel support in a future commit.
* Always deduce the lengths of contained parameter packs when deducing aRichard Smith2020-01-068-34/+78
| | | | | | | | | | | | | | | | | pack expansion. Previously, if all parameter / argument pairs for a pack expansion deduction were non-deduced contexts, we would not deduce the arity of the pack, and could end up deducing a different arity (leading to failures during substitution) or defaulting to an arity of 0 (leading to bad diagnostics about passing the wrong number of arguments to a variadic function). Instead, we now always deduce the arity for all involved packs any time we deduce a pack expansion. This will result in less substitution happening in some cases, which could avoid non-SFINAEable errors, and should generally improve the quality of diagnostics when passing initializer lists to variadic functions.
* AMDGPU: Use default operands for clamp/omodMatt Arsenault2020-01-061-10/+28
| | | | | | | We have a lot of complex pattern variants that just set the source modifiers that are really handled, and then set the output modifiers to 0. We're unlikely to ever match output modifiers from the use instruction side, and we already match clamp/omod in a separate pass.
* [WebAssembly] Fix landingpad-only case in Emscripten EHHeejin Ahn2020-01-062-1/+26
| | | | | | | | | | | | | | | | | | | Summary: Previously we didn't set `Changed` to true when there are only landing pads but not invokes. This fixes it and we set `Changed` to true whenever we have landing pads. (There can't be invokes without landing pads, so that case is covered too) The test case for this has to be a separate file because this pass is a `ModulePass` and `Changed` is computed based on the whole module. Reviewers: tlively Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72308
* AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTERMatt Arsenault2020-01-063-1/+8
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* [CodeGen][ObjC] Push the properties of a protocol before pushing theAkira Hatanaka2020-01-062-3/+21
| | | | | | | | | | properties of the protocol it inherits This fixes a bug where the type string for a @dynamic property of an @implementation didn't have 'D' in it when the protocol it conforms to redeclares the property declared in the base protocol. rdar://problem/45503561
* [msan] Fix underflow in qsort interceptor.Evgenii Stepanov2020-01-062-10/+21
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* [NFC] Fixes -Wrange-loop-analysis warningsMark de Wever2020-01-071-2/+2
| | | | This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.
* Add Triple::isX86()Fangrui Song2020-01-069-20/+15
| | | | | | Reviewed By: craig.topper, skan Differential Revision: https://reviews.llvm.org/D72247
* Use FileCheck instead of grepAkira Hatanaka2020-01-061-6/+7
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* AMDGPU/GlobalISel: Select G_UADDE/G_USUBEMatt Arsenault2020-01-066-11/+349
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* AMDGPU/GlobalISel: Replace handling of boolean valuesMatt Arsenault2020-01-0659-2285/+2612
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This solves selection failures with generated selection patterns, which would fail due to inferring the SGPR reg bank for virtual registers with a set register class instead of VCC bank. Use instruction selection would constrain the virtual register to a specific class, so when the def was selected later the bank no longer was set to VCC. Remove the SCC reg bank. SCC isn't directly addressable, so it requires copying from SCC to an allocatable 32-bit register during selection, so these might as well be treated as 32-bit SGPR values. Now any scalar boolean value that will produce an outupt in SCC should be widened during RegBankSelect to s32. Any s1 value should be a vector boolean during selection. This makes the vcc register bank unambiguous with a normal SGPR during selection. Summary of how this should now work: - G_TRUNC is always a no-op, and never should use a vcc bank result. - SALU boolean operations should be promoted to s32 in RegBankSelect apply mapping - An s1 value means vcc bank at selection. The exception is for legalization artifacts that use s1, which are never VCC. All other contexts should infer the VCC register classes for s1 typed registers. The LLT for the register is now needed to infer the correct register class. Extensions with vcc sources should be legalized to a select of constants during RegBankSelect. - Copy from non-vcc to vcc ensures high bits of the input value are cleared during selection. - SALU boolean inputs should ensure the inputs are 0/1. This includes select, conditional branches, and carry-ins. There are a few somewhat dirty details. One is that G_TRUNC/G_*EXT selection ignores the usual register-bank from register class functions, and can't handle truncates with VCC result banks. I think this is OK, since the artifacts are specially treated anyway. This does require some care to avoid producing cases with vcc. There will also be no 100% reliable way to verify this rule is followed in selection in case of register classes, and violations manifests themselves as invalid copy instructions much later. Standard phi handling also only considers the bank of the result register, and doesn't insert copies to make the source banks match. This doesn't work for vcc, so we have to manually correct phi inputs in this case. We should add a verifier check to make sure there are no phis with mixed vcc and non-vcc register bank inputs. There's also some duplication with the LegalizerHelper, and some code which should live in the helper. I don't see a good way to share special knowledge about what types to use for intermediate operations depending on the bank for example. Using the helper to replace extensions with selects also seems somewhat awkward to me. Another issue is there are some contexts calling getRegBankFromRegClass that apparently don't have the LLT type for the register, but I haven't yet run into a real issue from this. This also introduces new unnecessary instructions in most cases, since we don't yet try to optimize out the zext when the source is known to come from a compare.
* TableGen/GlobalISel: Handle default operands that are usedMatt Arsenault2020-01-062-7/+181
| | | | | | | | | | Copy the logic from the existing handling in the DAG matcher emittter. This will enable some AMDGPU pattern cleanups without breaking GlobalISel tests, and eventually handle importing more patterns. The test is a bit annoying since the sections seem to randomly sort themselves if anything else is added in the future.
* GlobalISel: Implement lower for G_INTRINSIC_ROUNDMatt Arsenault2020-01-067-57/+817
| | | | | Mostly copied from AMDGPU lowering implementation, except used G_SITOFP instead of directly creating a select on -1.0, 0.0.
* Change the patterns to include the prefix '= ' so we don't pass errantly.Jason Molenda2020-01-061-5/+5
| | | | | | | | Looking at a sometimes-passing test case on a platform where random values were being returned - sometimes the expected digit ('1' or '2') would be included in the random returned value. Add a prefix to reduce the likelihood of this a bit.
* [X86] Move an enum definition into a header to simplify future patches [NFC]Philip Reames2020-01-062-24/+26
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* [msan] Check qsort input.Evgenii Stepanov2020-01-062-0/+19
| | | | | | | | | | | | | | | | | | Summary: Qsort interceptor suppresses all checks by unpoisoning the data in the wrapper of a comparator function, and then unpoisoning the output array as well. This change adds an explicit run of the comparator on all elements of the input array to catch any sanitizer bugs. Reviewers: vitalybuka Subscribers: #sanitizers, llvm-commits Tags: #sanitizers, #llvm Differential Revision: https://reviews.llvm.org/D71780
* [NSArray] Remove a very old and deprecated formatter.Davide Italiano2020-01-061-27/+0
| | | | Checked with the Foundation folks.
* [CMake] Pass symlink dependency to add_llvm_install_targets explicitlyPetr Hosek2020-01-061-5/+12
| | | | | | | | | | | | | | | | | | | | The install-${name}-stripped targets don't strip when ${name} is being symlinked, e.g. llvm-ar or llvm-objcopy. The problem is that llvm_install_symlink passes install-${dest} as a dependency of install-${name}, e.g. install-llvm-ar becomes a dependency of both install-llvm-ranlib and install-llvm-ranlib-stripped. What this means is that when installing a distribution that contains both llvm-ar and llvm-ranlib is that first the stripped version of llvm-ar is installed (by the install-llvm-ar-stripped target) and then it's overwritten by an unstripped version of llvm-ar bnecause install-llvm-ranlib-stripped has install-llvm-ranlib as a dependency as mentioned earlier. To avoid this issue, rather than passing the install-${dest} as dependency, we introduce a new argument to add_llvm_install_targets for symlink target which expands it into an appropriate dependency, i.e. install-${dest} for install-${name} target and install-${dest}-stripped for install-${name}-stripped. Differential Revision: https://reviews.llvm.org/D71951
* Don't rely on 'l'(ell) modifiers to indicate a label referenceBill Wendling2020-01-062-20/+45
| | | | | | | | | | | | | | | | Summary: It's not necessary to use an 'l'(ell) modifier when referencing a label. Treat block addresses and MBB references as if the modifier is used anyway. This prevents us from generating references to ficticious labels. Reviewers: jyknight, nickdesaulniers, hfinkel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71849
* [FileCheck] Remove FileCheck prefix in APIThomas Preud'homme2020-01-063-304/+275
| | | | | | | | | | | | | | | | | | Summary: When FileCheck was made a library, types in the public API were renamed to add a FileCheck prefix, such as Pattern to FileCheckPattern. Many types were moved into a private interface and thus don't need this prefix anymore. This commit removes those unneeded prefixes. Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk Reviewed By: jhenderson Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72186
* [PowerPC][NFC] Rename record instructions to use _rec suffix instead of oJinsong Ji2020-01-0622-1173/+1216
| | | | | | | | | | | | | | | | | | | We use o suffix to indicate record form instuctions, (as it is similar to dot '.' in mne?) This was fine before, as we did not support XO-form. However, with https://reviews.llvm.org/D66902, we now have XO-form support. It becomes confusing now to still use 'o' for record form, and it is weird to have something like 'Oo' . This patch rename all 'o' instructions to use '_rec' instead. Also rename `isDot` to `isRecordForm`. Reviewed By: #powerpc, hfinkel, nemanjai, steven.zhang, lkail Differential Revision: https://reviews.llvm.org/D70758
* [Diagnostic] make Wmisleading-indendation not warn about labelsTyker2020-01-062-4/+13
| | | | | | | | | | Reviewers: aaron.ballman, xbolva00 Reviewed By: aaron.ballman Subscribers: nickdesaulniers, nathanchance Differential Revision: https://reviews.llvm.org/D72202
* GlobalISel: Fix unsupported legalize actionMatt Arsenault2020-01-063-0/+84
| | | | | | | | This would complain about invalid legalizer rules otherwise. Mark some operations as unsupported for AMDGPU. This currently seems to produce the same legalize error as when no rules are defined, but eventually this should produce a proper user facing error.
* GlobalISel: Correct result type for G_FCMP in lowerFPTOUIMatt Arsenault2020-01-063-37/+84
| | | | | Using the final result type doesn't make any sense. Use the natural default boolean type for the select condition.
* GlobalISel: Start adding computeNumSignBits to GISelKnownBitsMatt Arsenault2020-01-063-0/+152
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* AMDGPU: Fix legalizing f16 fpowMatt Arsenault2020-01-063-0/+564
| | | | | | The existing test only covered one case for r600. The use of mul_legacy also looks suspicious to me, but leave it for now. The patterns are also not making use of source modifiers.
* AMDGPU: Use ImmLeafMatt Arsenault2020-01-061-2/+2
| | | | | This solves one GlobalISel importer error, but the pattern still fails for another reason.
* AMDGPU: Use ImmLeaf for inline immediate predicatesMatt Arsenault2020-01-066-9/+63
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* llc/MIR: Fix setFunctionAttributes for MIR functionsMatt Arsenault2020-01-066-63/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | A random set of attributes are implemented by llc/opt forcing the string attributes on the IR functions before processing anything. This would not happen for MIR functions, which have not yet been created at this point. Use a callback in the MIR parser, purely to avoid dealing with the ugliness that the command line flags are in a .inc file, and would require allowing access to these flags from multiple places (either from the MIR parser directly, or a new utility pass to implement these flags). It would probably be better to cleanup the flag handling into a separate library. This is in preparation for treating more command line flags with a corresponding function attribute in a more uniform way. The fast math flags in particular have a messy system where the command line flag sets the behavior from a function attribute if present, and otherwise the command line flag. This means if any other pass tries to inspect the function attributes directly, it will be inconsistent with the intended behavior. This is also inconsistent with the current behavior of -mcpu and -mattr, which overwrites any pre-existing function attributes. I would like to move this to consistenly have the command line flags not overwrite any pre-existing attributes, and to always ensure the command line flags are consistent with the function attributes.
* [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets.Craig Topper2020-01-065-95/+88
| | | | | | Use zext+or+fsub to do the conversion. Similar to D71971. Differential Revision: https://reviews.llvm.org/D71971
* [lldb/Docs] Describe optional dependencies on build page.Jonas Devlieghere2020-01-061-5/+31
| | | | | | | List the different CMake flags controlling the optional dependencies as per the discussion on the mailing list: http://lists.llvm.org/pipermail/lldb-dev/2020-January/015867.html
* [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCSCraig Topper2020-01-063-0/+394
| | | | | | This patch adds widening which really just scalarizes because we don't have a strategy for the extra elements we would need to pad with. Differential Revision: https://reviews.llvm.org/D72193
* [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to match other ↵Craig Topper2020-01-063-0/+0
| | | | strict files wich have the size at the end. NFC
* [OPENMP50]Support lastprivate conditional updates in inc/dec unary ops.Alexey Bataev2020-01-067-33/+118
| | | | | Added support for checking of updates of variables used in unary pre(pos) inc/dec expressions.
* [NFC] Test commit, revert whitespace changestevewan2020-01-061-1/+0
| | | | As per the Developer Policy, upon obtaining commit access.
* [NFC] Test commit, whitespace changestevewan2020-01-061-0/+1
| | | | As per the Developer Policy, upon obtaining commit access.
* [x86] add tests for concat self + shuffle; NFCSanjay Patel2020-01-061-0/+64
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* [OpenMP] Fix incorrect property of __has_attribute() macroKelvin Li2020-01-061-1/+1
| | | | | | | | __has_attribute(fallthough) -> __has_attribute(fallthrough) Submitted by: kiszk (Kazuaki Ishizaki <ishizaki@jp.ibm.com>) Differential Revision: https://reviews.llvm.org/D72287
* Lower TAGPstack with negative offset to SUBG.Evgenii Stepanov2020-01-063-3/+49
| | | | | | | | | | | | | | Summary: This never really occurs in the current codegen, so only a MIR test is possible. Reviewers: ostannard, pcc Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72123
* [X86] Fix an 8 bit testb being selected when folding a volatile i32 load ↵Amara Emerson2020-01-062-0/+44
| | | | | | pattern. Differential Revision: https://reviews.llvm.org/D71581
* [PowerPC][LoopVectorize] Extend getRegisterClassForType to consider double ↵Jinsong Ji2020-01-062-9/+18
| | | | | | | | | | | | | | and other floating point type In https://reviews.llvm.org/D67148, we use isFloatTy to test floating point type, otherwise we return GPRRC. So 'double' will be classified as GPRRC, which is not accurate. This patch covers other floating point types. Reviewed By: #powerpc, nemanjai Differential Revision: https://reviews.llvm.org/D71946
* [lld] Fix trivial typos in commentsKazuaki Ishizaki2020-01-0631-46/+46
| | | | | | Reviewed By: ruiu, MaskRay Differential Revision: https://reviews.llvm.org/D72196
* [libc] Move all tests to a top level `test` directory.Siva Chandra Reddy2020-01-0622-60/+89
| | | | | | | | | | A toplevel target, `check-libc` has also been added. Reviewers: abrachet, phosek Tags: #libc-project Differential Revision: https://reviews.llvm.org/D72177
* [lldb/Docs] Fix capitalization typo.Jonas Devlieghere2020-01-061-1/+1
| | | | This has been bothering me for way too long.
* [lldb/CMake] Only set PYTHON_HOME on WindowsJonas Devlieghere2020-01-061-1/+1
| | | | | | My earlier change for Python auto-detection caused PYTHON_HOME to be set unconditionally, while before the change this only happened for Windows. This caused the PythonDataObjectsTest to fail with an import error.
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