summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* [PGO] Stop using invalid char in instr variable names.Xinliang David Li2015-12-116-8/+16
| | | | | | | | | | | | | | Before the patch, -fprofile-instr-generate compile will fail if no integrated-as is specified when the file contains any static functions (the -S output is also invalid). This patch fixed the issue. With the change, the index format version will be bumped up by 1. Backward compatibility is preserved with this change. Differential Revision: http://reviews.llvm.org/D15243 llvm-svn: 255365
* Fix Clang-tidy modernize-use-nullptr and readability-simplify-boolean-expr ↵Eugene Zelenko2015-12-111-191/+177
| | | | | | | | warnings in source/Target/Target.cpp. Simplify smart pointers checks in conditions. llvm-svn: 255364
* Add expected timeout support to test event architecture.Todd Fiala2015-12-114-1/+74
| | | | llvm-svn: 255363
* CodeGen: Redo analyzePhysRegs() and computeRegisterLiveness()Matthias Braun2015-12-1110-150/+94
| | | | | | | | | | | | | | | | | | | | computeRegisterLiveness() was broken in that it reported dead for a register even if a subregister was alive. I assume this was because the results of analayzePhysRegs() are hard to understand with respect to subregisters. This commit: Changes the results of analyzePhysRegs (=struct PhysRegInfo) to be clearly understandable, also renames the fields to avoid silent breakage of third-party code (and improve the grammar). Fix all (two) users of computeRegisterLiveness() in llvm: By reenabling it and removing workarounds for the bug. This fixes http://llvm.org/PR24535 and http://llvm.org/PR25033 Differential Revision: http://reviews.llvm.org/D15320 llvm-svn: 255362
* Remove -S option from dotest.py.Zachary Turner2015-12-115-21/+1
| | | | llvm-svn: 255361
* Remove -r and -R options from dotest.py.Zachary Turner2015-12-113-108/+1
| | | | llvm-svn: 255360
* Start replacing vector_extract/vector_insert with extractelt/inserteltMatt Arsenault2015-12-1112-102/+103
| | | | | | | | | | | | | | | | | | | | These are redundant pairs of nodes defined for INSERT_VECTOR_ELEMENT/EXTRACT_VECTOR_ELEMENT. insertelement/extractelement are slightly closer to the corresponding C++ node name, and has stricter type checking so prefer it. Update targets to only use these nodes where it is trivial to do so. AArch64, ARM, and Mips all have various type errors on simple replacement, so they will need work to fix. Example from AArch64: def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8), (i32 (SMOVvi8to32 V128:$Rn, VectorIndexB:$idx))>; Which is trying to do sext_inreg i8, i8. llvm-svn: 255359
* DisassemblerLLVMC now gets the disassembler comments for an instructionSean Callanan2015-12-112-19/+29
| | | | | | | and appends them to our list of comments (which can additionally include things like decoded addresses). llvm-svn: 255358
* Treat unnamed symbols as locals.Rafael Espindola2015-12-113-1/+17
| | | | | | | There is work under way in llvm to avoid creating unnecessary names for symbols. This makes lld capable of handling that. llvm-svn: 255357
* [WebAssembly] Fix ADJCALLSTACKDOWN/UP use/defsDerek Schuff2015-12-112-5/+10
| | | | | | | | | | | | | | | | | | | | | | Summary: ADJCALLSTACK{DOWN,UP} (aka CALLSEQ_{START,END}) MIs are supposed to use and def the stack pointer. Since they do not, all the nodes are being eliminated by DeadMachineInstructionElim, so they aren't in the IR when PrologEpilogInserter/eliminateCallFramePseudo needs them. This change fixes that, but since RegStackify will not stackify across them (and it runs early, before PEI), change LowerCall to only emit them when the call frame size is > 0. That makes the current code work the same way and makes code handled by D15344 also work the same way. We can expand the condition beyond NumBytes > 0 in the future if needed. Reviewers: sunfish, jfb Subscribers: jfb, dschuff, llvm-commits Differential Revision: http://reviews.llvm.org/D15459 llvm-svn: 255356
* Discard local symbols from SHF_MERGE sections.Rafael Espindola2015-12-112-3/+38
| | | | | | This matches the behavior of both gold and bfd ld. llvm-svn: 255355
* Revert r255247, r255265, and r255286 due to serious compile-time regressions.Chad Rosier2015-12-116-393/+93
| | | | | | | | Revert "[DSE] Disable non-local DSE to see if the bots go green." Revert "[DeadStoreElimination] Use range-based loops. NFC." Revert "[DeadStoreElimination] Add support for non-local DSE." llvm-svn: 255354
* CXX_FAST_TLS calling convention: target independent portion.Manman Ren2015-12-114-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The access function has a short entry and a short exit, the initialization block is only run the first time. To improve the performance, we want to have a short frame at the entry and exit. We explicitly handle most of the CSRs via copies. Only the CSRs that are not handled via copies will be in CSR_SaveList. Frame lowering and prologue/epilogue insertion will generate a short frame in the entry and exit according to CSR_SaveList. The majority of the CSRs will be handled by register allcoator. Register allocator will try to spill and reload them in the initialization block. We add CSRsViaCopy, it will be explicitly handled during lowering. 1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target supports it for the given calling convention and the function has only return exits). We also call TLI->initializeSplitCSR to perform initialization. 2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to virtual registers at beginning of the entry block and copies from virtual registers to CSRsViaCopy at beginning of the exit blocks. 3> we also need to make sure the explicit copies will not be eliminated. rdar://problem/23557469 Differential Revision: http://reviews.llvm.org/D15340 llvm-svn: 255353
* fix typos; NFCSanjay Patel2015-12-111-3/+3
| | | | llvm-svn: 255352
* Add test event marking a test as explicitly eligible for rerun if it is ↵Todd Fiala2015-12-113-4/+30
| | | | | | | | | | | | | | marked flakey. This will be used in a future change to support rerunning flakey tests that hit a test result isue in a low-load, single worker test runner phase. This is implemented as an additive-style event rather than being evaluated and added to the start_test event because the decorator code only runs after the start_test event is created and sent. i.e. LLDBTestResult.startTest() runs before the test method decorators run. llvm-svn: 255351
* [dsymutil] Ignore absolute symbols in the debug mapFrederic Riss2015-12-114-3/+30
| | | | | | | | | | | | Quoting from the comment added to the code: // Objective-C on i386 uses artificial absolute symbols to // perform some link time checks. Those symbols have a fixed 0 // address that might conflict with real symbols in the object // file. As I cannot see a way for absolute symbols to find // their way into the debug information, let's just ignore those. llvm-svn: 255350
* ELF: Allow -e <entry> with -sharedEd Maste2015-12-112-5/+10
| | | | | | | | | | | | It is reasonable to specify an entry point for shared objects - for example, for the FreeBSD rtld ld-elf.so.1. Unlike GNU ld we leave the entry address as 0 if -shared is specified without -e. Differential Revision: http://reviews.llvm.org/D15454 llvm-svn: 255349
* AlignmentFromAssumptions and SLPVectorizer preserves AA and GlobalsAAHal Finkel2015-12-112-0/+7
| | | | | | | | | | | | GlobalsAA's assumptions that passes do not escape globals not previously escaped is not violated by AlignmentFromAssumptions and SLPVectorizer. Marking them as such allows GlobalsAA to be preserved until GVN in the LTO pipeline. http://lists.llvm.org/pipermail/llvm-dev/2015-December/092972.html Patch by Vaivaswatha Nagaraj! llvm-svn: 255348
* Test that -e <symbol> worksEd Maste2015-12-111-1/+2
| | | | llvm-svn: 255347
* [OpenCL 2.0] In OpenCL v2.0 s6.5 all pointers are implicitly in genericAnastasia Stulova2015-12-113-4/+45
| | | | | | | | | | | address space unless address space is explicitly specified. Correct the behavior of NULL constant detection - generic AS void pointer should be accepted as a valid NULL constant. http://reviews.llvm.org/D15293 llvm-svn: 255346
* [compiler-rt] [safestack] Enable for aarch64Adhemerval Zanella2015-12-112-2/+7
| | | | | | | | | | | | | This patch enables the safestack for aarch64. The frontend already have it enabled on all supported architectures and no adjustment is required in llvm. The compiler-rt adjustments are basically add on the cmake configuration to enable the tests and fix the pagesize debug check by getting its value at runtime (since aarch64 has multiple pagesize depending of kernel configuration). llvm-svn: 255345
* [TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitterHal Finkel2015-12-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | AsmWriterEmitter will generate a getRegisterName function with an alternate register name index as its second argument if the target makes use of them. The enum of these values is generated in RegisterInfoEmitter. The getRegisterName generator would assume the namespace could always be found by reading index 1 of the list of AltNameIndices, but this will fail if this list is sorted such that the NoRegAltName is at index 1. Because this list is sorted by record name (in CodeGenTarget::ReadRegAltNameIndices), you only run in to problems if your MyTargetRegisterInfo.td defines a single RegAltNameIndex that sorts lexically before NoRegAltName. For example, if a target has something like def AnAltNameIndex : RegAltNameIndex and defines RegAltNameIndices for some registers then, prior to this change, AsmWriterEmitter would generate references to ::AnAltNameIndex and ::NoRegAltName Patch by Alex Bradbury! llvm-svn: 255344
* PruneEH pass incorrectly reports that a change was madeArtur Pilipenko2015-12-111-12/+7
| | | | | | | | Reviewed By: reames Differential Revision: http://reviews.llvm.org/D14097 llvm-svn: 255343
* Create test for llvm.org/pr25806Tamas Berghammer2015-12-1113-15/+100
| | | | | | | | | | LLDB don't detect the loading of a shared object file linked against the main executable before the static initializers are executed for the given module. Because of this it is not possible to get breakpoint hits in these static initializers and to display proper debug info in case of a crash in these codes. llvm-svn: 255342
* XFAIL TestLoadUnload for Windows->AndroidPavel Labath2015-12-111-0/+1
| | | | llvm-svn: 255341
* Change finishSwigPythonLLDB.py to copy six.py instead of simlink itTed Woodward2015-12-111-11/+26
| | | | | | | | | | | | Summary: If six.py is simlink'd, an installation won't be able to find it unless it has access to the source tree that lldb was built from. Reviewers: zturner Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D15422 llvm-svn: 255340
* Reverting r255337 as it seems to kill bots. Needs investigation.Anastasia Stulova2015-12-113-45/+4
| | | | llvm-svn: 255339
* [RenderScript] Support for amd64 RS hooksEwan Crawford2015-12-111-9/+54
| | | | | | | Adds support for reading a maximum of six integer arguments from a renderscript hook on X86_64. Author: Luke Drummond <luke.drummond@codeplay.com> llvm-svn: 255338
* [OpenCL 2.0] In OpenCL v2.0 s6.5 all pointers are implicitly in genericAnastasia Stulova2015-12-113-4/+45
| | | | | | | | | | | address space unless address space is explicitly specified. Correct the behavior of NULL constant detection - generic AS void pointer should be accepted as a valid NULL constant. http://reviews.llvm.org/D15293 llvm-svn: 255337
* [Mem2Reg] Respect optnoneJames Molloy2015-12-112-0/+24
| | | | | | | | Mem2Reg shouldn't be optimizing a function that is marked optnone. There is a test checking this that fails when mem2reg is explicitly added to the standard pass pipeline. llvm-svn: 255336
* Revert "Turn on new test summary results by default."Pavel Labath2015-12-112-9/+2
| | | | | | | The new test summary formatter does not honor the "expected timeout" markings, which makes our buildbots all red. I'm switching it off by default until we figure out a way to make this work. llvm-svn: 255335
* [InstCombine] Make MatchBSwap also match bit reversalsJames Molloy2015-12-113-103/+250
| | | | | | MatchBSwap has most of the functionality to match bit reversals already. If we switch it from looking at bytes to individual bits and remove a few early exits, we can extend the main recursive function to match any sequence of ORs, ANDs and shifts that assemble a value from different parts of another, base value. Once we have this bit->bit mapping, we can very simply detect if it is appropriate for a bswap or bitreverse. llvm-svn: 255334
* [ELF] - R_X86_64_SIZE64/R_X86_64_SIZE32 relocations implemented.George Rimar2015-12-116-15/+257
| | | | | | | | | | | | R_X86_64_SIZE64/R_X86_64_SIZE32 relocations were introduced in 0.98v of "System V Application Binary Interface x86-64" (http://www.x86-64.org/documentation/abi.pdf). Calculation for them is Z + A, where: Z - Represents the size of the symbol whose index resides in the relocation entry. A - Represents the addend used to compute the value of the relocatable field. Differential revision: http://reviews.llvm.org/D15335 llvm-svn: 255332
* Revert previous test commit.Maxim Ostapenko2015-12-111-1/+0
| | | | llvm-svn: 255331
* This is a test commit to check my commit access works.Maxim Ostapenko2015-12-111-0/+1
| | | | llvm-svn: 255330
* [PGO] Read VP raw data without depending on the Value fieldXinliang David Li2015-12-112-16/+14
| | | | | | | | | | | | | | | | Before this patch, each function's on-disk VP data is 'pointed' to by the Value field of per-function ProfileData structue, and read relies on this field (relocated with ValueDataDelta field) to read the value data. However this means the Value field needs to be updated during runtime before dumping, which creates undesirable data races. With this patch, the reading of VP data no longer depends on Value field. There is no format change. ValueDataDelta header field becomes obsolute but will be kept for compatibility reason (will be removed next time the raw format change is needed). llvm-svn: 255329
* Driver: add multilibs for ARM EBSaleem Abdulrasool2015-12-116-0/+29
| | | | | | | | This improves the coverage for the multilib directories used for ARM. Also add tests covering the internal triple (thumbv7-*). The Juno board can be run in this configuration. llvm-svn: 255328
* [PGO] add a test case in profiler runtimeXinliang David Li2015-12-111-0/+135
| | | | | | | | Add a test case to cover profile dumping of functions with no value sites, functions with value sites but no dynamic VP data, and functions with runtime VP data. llvm-svn: 255327
* [PGO] Add a test case to cover version-3 formatXinliang David Li2015-12-112-1/+1
| | | | llvm-svn: 255326
* Correctly type-check the default arguments of local functionsJohn McCall2015-12-112-2/+32
| | | | | | | | when eagerly instantiating them. rdar://23721638 llvm-svn: 255325
* Revert "[Modules] Fix regression when an elaborated-type-specifier mentions ↵Ben Langmuir2015-12-114-34/+4
| | | | | | | | | | a hidden tag" This is causing assertion failures; reverting until I can fix. This reverts commit r255267 llvm-svn: 255324
* Add some more tests for initializer lists related to CWG1591Faisal Vali2015-12-111-0/+20
| | | | llvm-svn: 255323
* Fix build after r255319.Hans Wennborg2015-12-111-1/+1
| | | | llvm-svn: 255322
* Fix a spurious if.Eric Christopher2015-12-111-1/+1
| | | | llvm-svn: 255321
* [LazyValueInfo] Stop inserting overdefined values into ValueCache toAkira Hatanaka2015-12-111-18/+48
| | | | | | | | | | | | | | | | | | reduce memory usage. Previously, LazyValueInfoCache inserted overdefined lattice values into both ValueCache and OverDefinedCache. This wasn't necessary and was causing LazyValueInfo to use an excessive amount of memory in some cases. This patch changes LazyValueInfoCache to insert overdefined values only into OverDefinedCache. The memory usage decreases by 70 to 75% when one of the files in llvm is compiled. rdar://problem/11388615 Differential revision: http://reviews.llvm.org/D15391 llvm-svn: 255320
* [PPC]: Peephole optimize small accesss to aligned globals.Kyle Butt2015-12-112-9/+361
| | | | | | | | | | | | | | | | | | | | | | | Access to aligned globals gives us a chance to peephole optimize nonzero offsets. If a struct is 4 byte aligned, then accesses to bytes 0-3 won't overflow the available displacement. For example: addis 3, 2, b4v@toc@ha addi 4, 3, b4v@toc@l lbz 5, b4v@toc@l(3) ; This is the result of the current peephole lbz 6, 1(4) ; optimizer lbz 7, 2(4) lbz 8, 3(4) If b4v is 4-byte aligned, we can skip using register 4 because we know that b4v@toc@l+{1,2,3} won't overflow 32K, and instead generate: addis 3, 2, b4v@toc@ha lbz 4, b4v@toc@l(3) lbz 5, b4v@toc@l+1(3) lbz 6, b4v@toc@l+2(3) lbz 7, b4v@toc@l+3(3) Saving a register and an addition. Larger alignments allow larger structures/arrays to be optimized. llvm-svn: 255319
* Check in the script for building Win snapshotsHans Wennborg2015-12-111-0/+93
| | | | llvm-svn: 255318
* [ProfileData] clang-format TextInstrProfReader::hasFormat. NFC.Vedant Kumar2015-12-111-2/+3
| | | | llvm-svn: 255317
* [X86][SSE] Update the cost table for integer-integer conversions on SSE2/SSE4.1.Cong Hou2015-12-113-5/+435
| | | | | | | | | | | | Previously in the conversion cost table there are no entries for integer-integer conversions on SSE2. This will result in imprecise costs for certain vectorized operations. This patch adds those entries for SSE2 and SSE4.1. The cost numbers are counted from the result of running llc on the new test case in this patch. Differential revision: http://reviews.llvm.org/D15132 llvm-svn: 255315
* Clean ExprConstant/CGExprConstant up a bit. NFC.George Burgess IV2015-12-112-14/+16
| | | | llvm-svn: 255314
OpenPOWER on IntegriCloud