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* [ASTImporter] Fix LLDB lookup in transparent ctx and with ext srcGabor Marton2019-07-175-21/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: With LLDB we use localUncachedLookup(), however, that fails to find Decls when a transparent context is involved and the given DC has external lexical storage. The solution is to use noload_lookup, which works well with transparent contexts. But, we cannot use only the noload_lookup since the slow case of localUncachedLookup is still needed in some other cases. These other cases are handled in ASTImporterLookupTable, but we cannot use that with LLDB since that traverses through the AST which initiates the load of external decls again via DC::decls(). We must avoid loading external decls during the import becuase ExternalASTSource is implemented with ASTImporter, so external loads during import results in uncontrolled and faulty import. Reviewers: shafik, teemperor, jingham, clayborg, a_sidorin, a.sidorin Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits, lldb-commits Tags: #clang, #lldb Differential Revision: https://reviews.llvm.org/D61333 llvm-svn: 366325
* [llvm-ar][test] \r\n -> \nFangrui Song2019-07-1717-1167/+1164
| | | | | | Also simplify some empty output tests with 'count 0' llvm-svn: 366324
* [AMDGPU] Optimize atomic AND/OR/XORJay Foad2019-07-172-16/+91
| | | | | | | | | | | | | | Summary: Extend the atomic optimizer to handle AND, OR and XOR. Reviewers: arsenm, sheredom Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64809 llvm-svn: 366323
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-1725-13/+350
| | | | | | | | | | | | | | | | | | | | | | | TME is a future architecture technology, documented in https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools https://developer.arm.com/docs/ddi0601/a More about the future architectures: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture This patch adds support for the TME instructions TSTART, TTEST, TCOMMIT, and TCANCEL and the target feature/arch extension "tme". It also implements TME builtin functions, defined in ACLE Q2 2019 (https://developer.arm.com/docs/101028/latest) Patch by Javed Absar and Momchil Velikov Differential Revision: https://reviews.llvm.org/D64416 llvm-svn: 366322
* [clangd] Force the required interpretation of #import on windows tests.Sam McCall2019-07-171-0/+4
| | | | | | | | | | | | | | Summary: NFC but should fix a bunch of tests. Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64857 llvm-svn: 366321
* [clangd] Handle windows line endings in QueryDriverKadir Cetinkaya2019-07-172-2/+4
| | | | | | | | | | | | | | Summary: fixes second case of https://github.com/clangd/clangd/issues/93 Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64789 llvm-svn: 366320
* PowerPC: Fix register spilling for SPE registersJustin Hibbits2019-07-173-25/+47
| | | | | | | | | | | | | | | | | | Summary: Missed in the original commit, use the correct callee-saved register list for spilling, instead of the standard SVR432 list. This avoids needlessly spilling the SPE non-volatile registers when they're not used. As part of this, also add where missing, and sort, the spill opcode checks for SPE and SPE4 register classes. Reviewers: nemanjai, hfinkel, joerg Subscribers: kbarton, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D56703 llvm-svn: 366319
* PowerPC/SPE: Fix load/store handling for SPEJustin Hibbits2019-07-174-4/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Pointed out in a comment for D49754, register spilling will currently spill SPE registers at almost any offset. However, the instructions `evstdd` and `evldd` require a) 8-byte alignment, and b) a limit of 256 (unsigned) bytes from the base register, as the offset must fix into a 5-bit offset, which ranges from 0-31 (indexed in double-words). The update to the register spill test is taken partially from the test case shown in D49754. Additionally, pointed out by Kei Thomsen, globals will currently use evldd/evstdd, though the offset isn't known at compile time, so may exceed the 8-bit (unsigned) offset permitted. This fixes that as well, by forcing it to always use evlddx/evstddx when accessing globals. Part of the patch contributed by Kei Thomsen. Reviewers: nemanjai, hfinkel, joerg Subscribers: kbarton, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D54409 llvm-svn: 366318
* [MIPS GlobalISel] ClampScalar and select pointer G_ICMPPetar Avramovic2019-07-176-555/+754
| | | | | | | | | | | Add narrowScalar to half of original size for G_ICMP. ClampScalar G_ICMP's operands 2 and 3 to to s32. Select G_ICMP for pointers for MIPS32. Pointer compare is same as for integers, it is enough to declare them as legal type. Differential Revision: https://reviews.llvm.org/D64856 llvm-svn: 366317
* [lldb][NFC] Tablegenify watchpoint commandsRaphael Isemann2019-07-173-17/+46
| | | | | | | Part of the project that migrates these struct initializers to our new lldb-tablegen. llvm-svn: 366316
* [AArch64] Consistent types and naming for AArch64 target features (NFC)Momchil Velikov2019-07-172-24/+25
| | | | | | | | Differential Revision: https://reviews.llvm.org/D64415 Committed as obvious. llvm-svn: 366315
* AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXECNicolai Haehnle2019-07-174-1/+18
| | | | | | | | | | | | | | | Summary: Change-Id: I854fbf7d48e937bef9f8f3f5d0c8aeb970652630 Reviewers: rampitec, mareko Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64807 Change-Id: I4405b3a7f84186acea5a78d291bff71056e745fc llvm-svn: 366314
* AMDGPU: Improve alias analysis for GDSNicolai Haehnle2019-07-172-12/+47
| | | | | | | | | | | | | | | | | Summary: GDS cannot alias anything else. Original patch by: Marek Olšák Reviewers: arsenm, mareko Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64114 Change-Id: I07bfbd96f5d5c37a6dfba7997df12f291dd794b0 llvm-svn: 366313
* [TableGen] Do not set ReadNone attribute on intrinsics with side effectsMomchil Velikov2019-07-173-2/+43
| | | | | | | | | | | If an intrinsic is defined without outputs, but having side effects, it still can be removed completely from the program. This patch makes TableGen not set Attribute::ReadNone for intrinsics which are declared with IntrHasSideEffects. Differential Revision: https://reviews.llvm.org/D64414 llvm-svn: 366312
* [clangd] Fix error message in tweaktests to be useful. NFCSam McCall2019-07-171-4/+4
| | | | llvm-svn: 366311
* [llvm-ar][test] Add coverage for replace and update key lettersOwen Reynolds2019-07-172-0/+367
| | | | | | | | Some more tests to increase llvm-ar test coverage, this time for replace 'r' and update 'u'. Differential Revision: https://reviews.llvm.org/D64803 llvm-svn: 366309
* [ARM GlobalISel] Cleanup CallLowering. NFCDiana Picus2019-07-172-71/+20
| | | | | | | | | | Migrate CallLowering::lowerReturnVal to use the same infrastructure as lowerCall/FormalArguments and remove the now obsolete code path from splitToValueTypes. Forgot to push this earlier. llvm-svn: 366308
* [ELF] Delete redundant pageAlign at PT_GNU_RELRO boundaries after D58892Fangrui Song2019-07-171-19/+0
| | | | | | | | | | | | | | | | | | | | | | | Summary: After D58892 split the RW PT_LOAD on the PT_GNU_RELRO boundary, the new layout is: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro)) PT_LOAD(.data. .bss) The two pageAlign() calls at PT_GNU_RELRO boundaries are redundant due to the existence of PT_LOAD. Reviewers: grimar, peter.smith, ruiu, espindola Reviewed By: ruiu Subscribers: sfertile, atanasyan, emaste, arichardson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64854 llvm-svn: 366307
* [OpenCL][Sema] Minor refactoring and constraint checkingMarco Antognini2019-07-171-9/+4
| | | | | | | | | | | | | | Summary: Simplify code a bit and add assertion to address post-landing comments from D64083. Subscribers: yaxunl, Anastasia, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64804 llvm-svn: 366306
* [Driver] Enable __cxa_atexit on SolarisRainer Orth2019-07-173-3/+2
| | | | | | | | | | | | | | | | | | | Starting with Solaris 11.4 (which is now the required minimal version), Solaris does support __cxa_atexit. This patch reflects that. One might consider removing the affected tests altogether instead of inverting them, as is done on other targets. Besides, this lets two ASan tests PASS: AddressSanitizer-i386-sunos :: TestCases/init-order-atexit.cc AddressSanitizer-i386-sunos-dynamic :: TestCases/init-order-atexit.cc Tested on x86_64-pc-solaris2.11 and sparcv9-sun-solaris2.11. Differential Revision: https://reviews.llvm.org/D64491 llvm-svn: 366305
* Replace CRLF with LF.Rui Ueyama2019-07-171-94/+94
| | | | llvm-svn: 366304
* [mips] Remove redundant test case. NFCSimon Atanasyan2019-07-171-17/+0
| | | | | | The `inlineasm-constraint-reg64.ll` test checks the same functionality. llvm-svn: 366303
* [mips] Name inline asm constraint test cases in a uniform manner. NFCSimon Atanasyan2019-07-1718-0/+0
| | | | llvm-svn: 366302
* [mips] Use mult/mflo pattern on 64-bit targets prior to MIPS64Simon Atanasyan2019-07-172-1/+4
| | | | | | The `MUL` instruction is available starting from the MIPS32/MIPS64 targets. llvm-svn: 366301
* [mips] Implement .cplocal directiveSimon Atanasyan2019-07-175-33/+170
| | | | | | | | | | | | | | This directive forces to use the alternate register for context pointer. For example, this code: .cplocal $4 jal foo expands to: ld $25, %call16(foo)($4) jalr $25 Differential Revision: https://reviews.llvm.org/D64743 llvm-svn: 366300
* [mips] Support the "o" inline asm constraintSimon Atanasyan2019-07-173-0/+64
| | | | | | | | | | | | | As well as other LLVM targets we do not handle "offsettable" memory addresses in any special way. In other words, the "o" constraint is an exact equivalent of the "m" one. But some existing code require the "o" constraint support. This fixes PR42589. Differential Revision: https://reviews.llvm.org/D64792 llvm-svn: 366299
* [Target][NFCI] Remove commented out codeAlex Langford2019-07-171-2/+0
| | | | llvm-svn: 366295
* [LoopInfo] Fix getUniqueNonLatchExitBlocksSerguei Katkov2019-07-173-44/+50
| | | | | | | | | | | | | | | | | | | | | | | | It is possible that exit block has two predecessors and one of them is a latch block while another is not. Current algorithm is based on the assumption that all exits are dedicated and therefore we can check only first predecessor of loop exit to find all unique exits. However if we do not consider latch block and it is first predecessor of some exit then this exit will be found. Regression test is added. As a side effect of algorithm re-writing, the restriction that all exits are dedicated is eliminated. Reviewers: reames, fhahn, efriedma Reviewed By: efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D64787 llvm-svn: 366294
* [NativePDB] Make GetTranslationUnitDecl return an lldb CompilerDeclCtxNathan Lanza2019-07-172-10/+11
| | | | | | | | | | | Summary: We intend to make PdbAstBuilder abstract and implement PdbAstBuilderClang along with any other languages that wish to use PDBs. This is the first step. Differential Revision: https://reviews.llvm.org/D64852 llvm-svn: 366293
* [Target][NFCI] Rename variableAlex Langford2019-07-171-8/+8
| | | | | | This variable doesn't have anything to do with clang. llvm-svn: 366292
* Update email address.Qiu Chaofan2019-07-171-4/+4
| | | | llvm-svn: 366291
* gn build: Merge r366265Nico Weber2019-07-171-0/+1
| | | | llvm-svn: 366289
* gn build: Merge r366216Nico Weber2019-07-171-0/+1
| | | | llvm-svn: 366288
* AMDGPU: Add some missing builtinsMatt Arsenault2019-07-176-0/+144
| | | | llvm-svn: 366286
* Don't require python exe and lib versions to match while crosscompilingNathan Lanza2019-07-161-1/+2
| | | | | | | | | | | | | | Summary: While cross compiling, the python executable is used to run a handful of scripts while the libraries are linked and headers are included. Theoretically it's possible for the versions to match completely, but requiring the build to match 2.7.10 to 2.7.15 is unnecessary. Subscribers: mgorny Differential Revision: https://reviews.llvm.org/D64822 llvm-svn: 366285
* Fix OpenCLCXX test on 32-bit Windows where thiscall is presentReid Kleckner2019-07-161-6/+6
| | | | llvm-svn: 366284
* [AMDGPU] Autogenerate register asm namesStanislav Mekhanoshin2019-07-165-721/+139
| | | | | | Differential Revision: https://reviews.llvm.org/D64839 llvm-svn: 366283
* Fix darwin-ld.c if dsymutil.exe exists on PATHReid Kleckner2019-07-161-2/+2
| | | | llvm-svn: 366282
* add a workaround in GetLine to account for ReadFile not reporintg errorNathan Lanza2019-07-161-0/+11
| | | | | | | | | | | | | | | | | | | | | | Summary: ReadFile on Windows is supposed to set ERROR_OPERATION_ABORTED according to the docs on MSDN. However, this has evidently been a known bug since Windows 8. Therefore, we can't detect if a signal interrupted in the fgets. So pressing ctrl-c causes the repl to end and the process to exit. A temporary workaround is just to attempt to fgets twice until this bug is fixed. A possible alternative would be to set a flag in the `sigint_handler` and simply check that flag in the true part of the if statement. However, signal handlers on Windows are asynchronous and this would require sleeping on the repl loop thread while still not necessarily guarnateeing that you caught the sigint. Reviewers: jfb Differential Revision: https://reviews.llvm.org/D64660 llvm-svn: 366281
* ARM: Fix missing immarg for space intrinsicMatt Arsenault2019-07-162-1/+10
| | | | llvm-svn: 366280
* GlobalISel: Add overload of handleAssignments with CCStateMatt Arsenault2019-07-162-3/+16
| | | | | | | | | | | AMDGPU needs to allocate special argument registers separately from the user function argument list, so needs direct control over the CCState. The ArgLocs argument is only really necessary because CCState doesn't allow access to it. llvm-svn: 366279
* [TableGen] Generate offsets into a flat array for getOperandTypeJustin Bogner2019-07-162-27/+40
| | | | | | | | | | Rather than an array of std::initializer_list, generate a table of offsets and a flat array of the operands for getOperandType. This is a bit more efficient on platforms that don't manage to get the array of inintializer_lists initialized at link time (I'm looking at you macOS). It's also quite quite a bit faster to compile. llvm-svn: 366278
* Fix a typo in target featuresGeorge Burgess IV2019-07-162-2/+2
| | | | | | | | | There was a slight typo in r364352 that ended up causing our backend to complain on some x86 Android builds. This CL fixes that. Differential Revision: https://reviews.llvm.org/D64781 llvm-svn: 366276
* [WebAssembly] Compile all TLS on Emscripten as local-execGuanzhong Chen2019-07-163-2/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Currently, on Emscripten, dynamic linking is not supported with threads. This means that if thread-local storage is used, it must be used in a statically-linked executable. Hence, local-exec is the only possible model. This diff compiles all TLS variables to use local-exec on Emscripten as a temporary measure until dynamic linking is supported with threads. The goal for this is to allow C++ types with constructors to be thread-local. Currently, when `clang` compiles a `thread_local` variable with a constructor, it generates `__tls_guard` variable: @__tls_guard = internal thread_local global i8 0, align 1 As no TLS model is specified, this is treated as general-dynamic, which we do not support (and cannot support without implementing dynamic linking support with threads in Emscripten). As a result, any C++ constructor in `thread_local` variables would not compile. By compiling all `thread_local` as local-exec, `__tls_guard` will compile and we can support C++ constructors with TLS without implementing dynamic linking with threads. Depends on D64537 Reviewers: tlively, aheejin, sbc100 Reviewed By: aheejin Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64776 llvm-svn: 366275
* [TableGen] Add "getOperandType" to get operand types from opcode/opidxJustin Bogner2019-07-162-4/+97
| | | | | | | | | | | | | The InstrInfoEmitter outputs an enum called "OperandType" which gives numerical IDs to each operand type. This patch makes use of this enum to define a function called "getOperandType", which allows looking up the type of an operand given its opcode and operand index. Patch by Nicolas Guillemot. Thanks! Differential Revision: https://reviews.llvm.org/D63320 llvm-svn: 366274
* Add REQUIRES: x86 to safeseh-no.s test for x86Reid Kleckner2019-07-161-0/+1
| | | | llvm-svn: 366273
* [WebAssembly] Implement thread-local storage (local-exec model)Guanzhong Chen2019-07-1618-47/+413
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Thread local variables are placed inside a `.tdata` segment. Their symbols are offsets from the start of the segment. The address of a thread local variable is computed as `__tls_base` + the offset from the start of the segment. `.tdata` segment is a passive segment and `memory.init` is used once per thread to initialize the thread local storage. `__tls_base` is a wasm global. Since each thread has its own wasm instance, it is effectively thread local. Currently, `__tls_base` must be initialized at thread startup, and so cannot be used with dynamic libraries. `__tls_base` is to be initialized with a new linker-synthesized function, `__wasm_init_tls`, which takes as an argument a block of memory to use as the storage for thread locals. It then initializes the block of memory and sets `__tls_base`. As `__wasm_init_tls` will handle the memory initialization, the memory does not have to be zeroed. To help allocating memory for thread-local storage, a new compiler intrinsic is introduced: `__builtin_wasm_tls_size()`. This instrinsic function returns the size of the thread-local storage for the current function. The expected usage is to run something like the following upon thread startup: __wasm_init_tls(malloc(__builtin_wasm_tls_size())); Reviewers: tlively, aheejin, kripken, sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, jfb, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D64537 llvm-svn: 366272
* AMDGPU: Partially revert r366250Matt Arsenault2019-07-161-5/+2
| | | | | | | GCCBuiltin doesn't work for these, because they have a mangled type (although they arguably should not). llvm-svn: 366271
* [ORC][docs] Fix an RST error: the code-block directive needs a newline after it.Lang Hames2019-07-161-0/+1
| | | | llvm-svn: 366270
* [ORC][docs] Trim ORCv1 to ORCv2 transition section, add a how-to section.Lang Hames2019-07-161-121/+288
| | | | llvm-svn: 366269
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