| Commit message (Collapse) | Author | Age | Files | Lines |
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size. Initialize these APInts to properly-sized zero values.
llvm-svn: 47099
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llvm-svn: 47098
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llvm-svn: 47097
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to pass the mask APInt by value, not by reference.
llvm-svn: 47096
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llvm-svn: 47093
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llvm-svn: 47091
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actually does.
llvm-svn: 47090
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llvm-svn: 47089
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branch ALWAYS be the last successor for a switch-terminated block. This allows
clients to distinguish cases like the following:
switch(...)
case XXX:
switch(...) {
case YYY: ...
}
case ZZZ: ..
}
In this case, the block with "case ZZZ:" is the default block for the inner
switch statement, but that case is associated with the outer switch statement,
and not the inner one. Clients can test for this behavior by checking if a
successor block is the last one (and thus just assume that this is the "default"
case).
llvm-svn: 47088
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"default" case. In such cases, we now correctly add the CFGBlock representing
the code after the switch statement as a successor to the block terminated by
the switch statement.
llvm-svn: 47087
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llvm-svn: 47086
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llvm-svn: 47085
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llvm-svn: 47084
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llvm-svn: 47082
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llvm-svn: 47079
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llvm-svn: 47078
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llvm-svn: 47076
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CTTZ and CTPOP. The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it. I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it. The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select. This also means the value doesn't
need to be zero extended.
llvm-svn: 47075
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llvm-svn: 47074
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llvm-svn: 47073
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llvm-svn: 47072
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http://llvm.org/viewvc/llvm-project?rev=47070&view=rev
llvm-svn: 47071
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Renamed class GRConstants => GRExprEngine.
This was done with a Perl script, and will result in 80 col. violations that
I will gradually fix up.
llvm-svn: 47070
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tgmath.h.
Note that there is another issue with tgmath.h, so mandel.c still
doesn't work.
llvm-svn: 47069
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llvm-svn: 47068
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llvm-svn: 47067
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llvm-svn: 47066
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llvm-svn: 47065
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llvm-svn: 47064
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the build. Put all items that the user should
specify in bold. Make it a debug build.
llvm-svn: 47063
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llvm-svn: 47062
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llvm-svn: 47061
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llvm-svn: 47060
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llvm-svn: 47059
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llvm-svn: 47058
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a two-address instruction is also on the val# that defines the input.
llvm-svn: 47057
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its uses.
* Ignore copy instructions which have already been coalesced.
llvm-svn: 47056
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llvm-svn: 47055
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node as soon as we create it in SDISel. Previously we would lower it in
legalize. The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them. This causes us to miss some optimizations because
datatype expansion also happens here.
Exposing the loads early allows us to do optimizations on them. For example
we now compile arg-cast.ll to:
_foo:
movl $2147483647, %eax
andl 8(%esp), %eax
ret
where we previously produced:
_foo:
subl $12, %esp
movsd 16(%esp), %xmm0
movsd %xmm0, (%esp)
movl $2147483647, %eax
andl 4(%esp), %eax
addl $12, %esp
ret
It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.
llvm-svn: 47054
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DAGCombine is now quite good at zapifying them.
llvm-svn: 47053
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llvm-svn: 47052
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llvm-svn: 47051
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transform, so please review.)
llvm-svn: 47050
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llvm-svn: 47049
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type is not legal.
llvm-svn: 47048
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llvm-svn: 47047
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PR1877.
A3 = op A2 B0<kill>
...
B1 = A3 <- this copy
...
= op A3 <- more uses
==>
B2 = op B0 A2<kill>
...
B1 = B2 <- now an identify copy
...
= op B2 <- more uses
This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%.
llvm-svn: 47046
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llvm-svn: 47045
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- removeRange() can now update value# information.
llvm-svn: 47044
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llvm-svn: 47043
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