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| author | Evan Cheng <evan.cheng@apple.com> | 2008-02-13 09:13:21 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-13 09:13:21 +0000 |
| commit | dc3f3841fc8e08a6c1e36b1119ca70ace9fb24a6 (patch) | |
| tree | bcda56ecbdfd8ccb96285b6fb8c8b91ab64debab | |
| parent | bb4b97f90ead6b495ecff9af2c69602baca58dcc (diff) | |
| download | bcm5719-llvm-dc3f3841fc8e08a6c1e36b1119ca70ace9fb24a6.tar.gz bcm5719-llvm-dc3f3841fc8e08a6c1e36b1119ca70ace9fb24a6.zip | |
Simplify.
llvm-svn: 47058
| -rw-r--r-- | llvm/lib/CodeGen/TargetInstrInfoImpl.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp index 598b94af9c4..4f6c1237e9f 100644 --- a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp +++ b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp @@ -23,11 +23,9 @@ MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI) const { "This only knows how to commute register operands so far"); unsigned Reg1 = MI->getOperand(1).getReg(); unsigned Reg2 = MI->getOperand(2).getReg(); - MachineOperand &MO = MI->getOperand(0); - bool UpdateReg0 = MO.isReg() && MO.getReg() == Reg1; bool Reg1IsKill = MI->getOperand(1).isKill(); bool Reg2IsKill = MI->getOperand(2).isKill(); - if (UpdateReg0) { + if (MI->getOperand(0).getReg() == Reg1) { // Must be two address instruction! assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) && "Expecting a two-address instruction!"); |
