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* [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.Ahmed Bougacha2016-05-0617-227/+344
| | | | | | | | Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268760
* debugserver; fix -Wunused-local-typedef, -Wunused-variable warningsSaleem Abdulrasool2016-05-061-7/+0
| | | | | | | Remove the typedef and local structure which was unused. Fixes last of the new clang warnings in the debugserver build. NFC. llvm-svn: 268759
* debugserver: fix a couple of -Wmissing-field-initializers warningsSaleem Abdulrasool2016-05-061-1/+3
| | | | | | | Explicitly provide an initializer for the std::vector in the constructed type. Addresses -Wmissing-field-initializers warnings from clang. NFC. llvm-svn: 268758
* debugserver: fix some -Wpessimizing-move warningsSaleem Abdulrasool2016-05-061-3/+3
| | | | | | | Remove the unnecessary use of std::move to permit the compiler to perform NVRO instead. Fixes more warnings from clang. NFC. llvm-svn: 268757
* debugserver: fix a few -Wcovered-swift-default warningsSaleem Abdulrasool2016-05-062-2/+0
| | | | | | | | Remove a couple of `default` cases from switches which are covered. This is beneficial since it would allow the compiler to indicate when a new enum value is added and the switch is not updated. Fixes some warnings from clang. NFC. llvm-svn: 268756
* debugserver: fix some -Wformat-pedantic warningsSaleem Abdulrasool2016-05-061-16/+7
| | | | | | | Perform explicit casts for the log message to address some `-Wformat-pedantic` warnings from clang. NFC. llvm-svn: 268755
* [X86] Remove \brief in FixupBW. NFC.Ahmed Bougacha2016-05-061-13/+11
| | | | llvm-svn: 268754
* [X86] Simplify FixupBW sub_8bit_hi-related logic. NFC.Ahmed Bougacha2016-05-061-17/+12
| | | | | | | | | Instead of passing around sizes and asking for subregs, we can check the subreg indices we care about: sub_8bit_hi and sub_8bit. Differential Revision: http://reviews.llvm.org/D20006 llvm-svn: 268753
* [AArch64] Fix test to specify triple and disable post-RA scheduling.Geoff Berry2016-05-061-1/+1
| | | | | | | This should fix bot breakage caused by r268746: [AArch64] Combine callee-save and local stack SP adjustment instructions. llvm-svn: 268752
* [SimplifyCFG] propagate branch metadata when creating select (retry r268550 ↵Sanjay Patel2016-05-062-17/+63
| | | | | | | | | | | | | | | | with possible fix) Retrying r268550 which was reverted at r268577 due a memory sanitizer failure. I have not been able to reproduce that failure, but I've taken a guess at fixing the problem in this version of the patch and will watch for another failure. Original commit message: Unlike earlier similar fixes, we need to recalculate the branch weights in this case. Differential Revision: http://reviews.llvm.org/D19674 llvm-svn: 268751
* Fix standalone build on RHEL6.Eugene Zelenko2016-05-061-0/+1
| | | | | | Differential revision: http://reviews.llvm.org/D19991 llvm-svn: 268750
* More fixes to codeblock formatting in documentation.Richard Smith2016-05-061-3/+3
| | | | llvm-svn: 268749
* [InstProf] Temporarily removing a test that fails/passes on different ↵Renato Golin2016-05-061-18/+0
| | | | | | configurations (PR27667) llvm-svn: 268748
* [AArch64] Combine callee-save and local stack SP adjustment instructions.Geoff Berry2016-05-0617-167/+289
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If a function needs to allocate both callee-save stack memory and local stack memory, we currently decrement/increment the SP in two steps: first for the callee-save area, and then for the local stack area. This changes the code to allocate them both at once at the very beginning/end of the function. This has two benefits: 1) there is one fewer sub/add micro-op in the prologue/epilogue 2) the stack adjustment instructions act as a scheduling barrier, so moving them to the very beginning/end of the function increases post-RA scheduler's ability to move instructions (that only depend on argument registers) before any of the callee-save stores This change can cause an increase in instructions if the original local stack SP decrement could be folded into the first store to the stack. This occurs when the first local stack store is to stack offset 0. In this case we are trading off one more sub instruction for one fewer sub micro-op (along with benefits (2) and (3) above). Reviewers: t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18619 llvm-svn: 268746
* XFAILing a test on ARM. See PR27667Renato Golin2016-05-061-0/+1
| | | | llvm-svn: 268745
* [AArch64] Decouple zero store promotion from narrow ld merge. NFC.Jun Bum Lim2016-05-061-28/+16
| | | | | | | | | | | | Summary: This change refactors to decouple the zero store promotion from the narrow ld merge and add a flag (enable-narrow-ld-merge=true) to control the narrow ld merge optimization. Reviewers: jmolloy, t.p.northover, mcrosier Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19885 llvm-svn: 268744
* [ELF][MIPS] Reduce code duplication. NFCSimon Atanasyan2016-05-061-9/+3
| | | | llvm-svn: 268743
* [ELF][MIPS] Reduce all MIPS R_GOTREL addends by MipsGPOffset in the single ↵Simon Atanasyan2016-05-062-11/+7
| | | | | | place. NFC llvm-svn: 268742
* [ELF][MIPS] Simplify `if` condition. NFCSimon Atanasyan2016-05-061-2/+1
| | | | | | | | In case of MIPS ABI relocation has R_GOTREL expression's type iif the relocation type is either R_MIPS_GPREL16 or R_MIPS_GPREL32. So it is enough to check expression's type only. llvm-svn: 268741
* Revert "AMDGPU/SI: Use amdgpu_kernel calling convention for OpenCL kernels."Nikolay Haustov2016-05-063-24/+4
| | | | | | | | This reverts commit f7053ec90d0fc56f0837e43c2c759e85b56c21a1. It broke calling OpenCL kernel from another kernel. llvm-svn: 268740
* Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."Nikolay Haustov2016-05-063-70/+5
| | | | | | | | This reverts commit 47486d52454d60cdf6becc0b2efe533c73794380. It broke calling OpenCL kernel from another kernel. llvm-svn: 268739
* [CostModel][X86] Added costmodel tests for vector ↵Simon Pilgrim2016-05-061-0/+481
| | | | | | ctpop/ctlz/cttz/bitreverse/bswap llvm-svn: 268738
* [mips] Fix inconsistent .cprestore behaviour between direct object emission ↵Daniel Sanders2016-05-064-7/+38
| | | | | | | | | | | | | | | | | | | and assembling. Summary: Direct object emission has an initialization order problem where an InitMCObjectFile is called after MipsTargetELFStreamer determines whether PIC is enabled by default or not. There doesn't seem to be point that initializes all cases so split the responsibility between MipsTargetELFStreamer and MipsAsmPrinter. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D19728 llvm-svn: 268737
* Revert r268727, it caused PR27666.Nico Weber2016-05-0622-196/+48
| | | | llvm-svn: 268736
* [SimplifyCFG] Prefer a simplification based on a dominating condition.Chad Rosier2016-05-062-20/+72
| | | | | | | Rather than merge two branches with a common destination. Differential Revision: http://reviews.llvm.org/D19743 llvm-svn: 268735
* Refactor pthread usage of libcxx.Asiri Rathnayake2016-05-0610-105/+299
| | | | | | | | | | | | | This patch extracts out all the pthread dependencies of libcxx into the new header __threading_support. The motivation is to make it easy to re-target libcxx into platforms that do not support pthread. Original patch from Fulvio Esposito (fulvio.esposito@outlook.com) - D11781 Applied with tweaks - D19412 Change-Id: I301111f0075de93dd8129416e06babc195aa936b llvm-svn: 268734
* [mips] Correct the ordering of HI/LO pairs in the relocation table.Daniel Sanders2016-05-064-302/+674
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There seems to have been a misunderstanding as to the meaning of 'offset' in the rules laid down by our ABI. The previous code believed that 'offset' meant the offset within the section that the relocation is applied to. However, it should have meant the offset from the symbol used in the relocation expression. This patch adds two fields to ELFRelocationEntry and uses them to correct the order of relocations for MIPS. These fields contain: * The original symbol before shouldRelocateWithSymbol() is considered. This ensures that R_MIPS_GOT16 is able to correctly distinguish between local and external symbols, allowing us to tell whether %got() requires a matching %lo() or not (local symbols require one, external symbols don't). It also prevents confusing cases where the fuzzy matching rules cause things like %hi(foo)/%lo(foo+3) and %hi(bar)/%lo(bar+1) to swap their %lo()'s. * The original offset before shouldRelocateWithSymbol() is considered. The existing Addend field is always zero when the object uses in place addends (because it's already moved it to the encoding) but MIPS needs to use the original offset to ensure that the linker correctly calculates the carry-in bit for %hi() and %got(). IAS ensures that unmatchable %hi()/%got() relocations are placed at the end of the table to ensure that the linker rejects the table (we're unable to report such errors directly). The alternatives to this risk accidental matching against inappropriate relocations which may silently compute incorrect values due to an incorrect carry bit between the %lo() and %hi()/%got(). Reviewers: sdardis Subscribers: dsanders, sdardis, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D19718 llvm-svn: 268733
* Adding omitted column to invalid loc diagnostic.Ben Craig2016-05-061-1/+1
| | | | | | | | | | | note_fe_backend_invalid_loc expects three arguments (file, line, column), and will assert when only given two. The other two places in this file that use note_fe_backend_invalid_loc already supply the Column for the third parameter. http://reviews.llvm.org/D19936 llvm-svn: 268732
* [mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant ↵Daniel Sanders2016-05-063-16/+12
| | | | | | | | | | | | | | | | island pass. Summary: This stops it misidentifying unconditional branches as conditional branches which fixes a -verify-machineinstrs error about exiting a function via fall through. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19864 llvm-svn: 268731
* [mips][fastisel] Conditional moves do not have implicit operands.Daniel Sanders2016-05-062-7/+6
| | | | | | | | | | Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19862 llvm-svn: 268730
* [OPENMP 4.5] Tests for 'private|firstprivates' clauses in 'taskloop' directive.Alexey Bataev2016-05-064-0/+1870
| | | | | | Added tests for codegen for private|firstprivate clauses in taskloop-based directives. llvm-svn: 268729
* s/codeblock/code-block to fix the Sphinx build.Aaron Ballman2016-05-061-3/+3
| | | | llvm-svn: 268728
* [MSVC] Implementation of __unaligned as a proper type qualifierAndrey Bokhanko2016-05-0622-48/+196
| | | | | | | | | | | This patch implements __unaligned (MS extension) as a proper type qualifier (before that, it was implemented as an ignored attribute). It also fixes PR27367. Differential Revision: http://reviews.llvm.org/D19654 llvm-svn: 268727
* [TableGen] AsmMatcher: support for default values for optional operandsSam Kolton2016-05-066-137/+242
| | | | | | | | | | | | | | Summary: This change allows to specify "DefaultMethod" for optional operand (IsOptional = 1) in AsmOperandClass that return default value for operand. This is used in convertToMCInst to set default values in MCInst. Previously if you wanted to set default value for operand you had to create custom converter method. With this change it is possible to use standard converters even when optional operands presented. Reviewers: tstellarAMD, ab, craig.topper Subscribers: jyknight, dsanders, arsenm, nhaustov, llvm-commits Differential Revision: http://reviews.llvm.org/D18242 llvm-svn: 268726
* Fix whitespace and line wrapping. NFC.Ryan Govostes2016-05-061-3/+4
| | | | llvm-svn: 268725
* [asan] add option to set shadow mapping offsetRyan Govostes2016-05-062-2/+48
| | | | | | | | | | Allowing overriding the default ASAN shadow mapping offset with the -asan-shadow-offset option, and allow zero to be specified for both offset and scale. Patch by Aaron Carroll <aaronc@apple.com>. llvm-svn: 268724
* Revert r268716. This has caused test failures in MSan on Linux.Kuba Brecka2016-05-061-16/+10
| | | | llvm-svn: 268723
* [AVR] Add a majority of the backend codeDylan McKay2016-05-0613-1/+1483
| | | | | | | | | | | | Summary: This adds the majority of the AVR backend. Reviewers: hfinkel, dsanders, vkalintiris, arsenm Subscribers: dylanmckay Differential Revision: http://reviews.llvm.org/D17906 llvm-svn: 268722
* [OPENMP 4.0] Codegen for 'declare simd' directive.Alexey Bataev2016-05-064-0/+522
| | | | | | | | | OpenMP 4.0 adds support for elemental functions using declarative directive '#pragma omp declare simd'. Patch adds mangling for simd functions in accordance with https://sourceware.org/glibc/wiki/libmvec?action=AttachFile&do=view&target=VectorABI.txt llvm-svn: 268721
* Attempt to fix the modules builder by declaring SCEV in LoopUtils.hSilviu Baranga2016-05-061-0/+1
| | | | llvm-svn: 268720
* AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.Nikolay Haustov2016-05-063-5/+70
| | | | | | | | | | | | | | | | | Summary: Check calling convention in AMDGPUMachineFunction::isKernel This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF. Also, in the future unused non-kernels may be optimized. Reviewers: tstellarAMD, arsenm Subscribers: arsenm, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19917 llvm-svn: 268719
* AMDGPU/SI: Use amdgpu_kernel calling convention for OpenCL kernels.Nikolay Haustov2016-05-063-4/+24
| | | | | | | | | | Reviewers: tstellarAMD, arsenm Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D19918 llvm-svn: 268718
* AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1.Nikolay Haustov2016-05-067-1/+49
| | | | | | | | | | | | | | | | | Summary: This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF. Also, in the future unused non-kernels may be optimized. For now, also accept SPIR_KERNEL for HCC frontend. Also, add bitcode compatibility tests for missing calling conventions except AVR_BUILTIN which doesn't have parse code. Reviewers: tstellarAMD, arsenm Subscribers: arsenm, joker.eph, llvm-commits llvm-svn: 268717
* [sanitizer] Fix a crash when demangling Swift symbolsKuba Brecka2016-05-061-10/+16
| | | | | | | | | | To invoke the Swift demangler, we use dlsym to locate swift_demangle. However, dlsym malloc's storage and stores it in thread-local storage. Since allocations from the symbolizer are done with the system allocator (at least in TSan, interceptors are skipped when inside the symbolizer), we will crash when we try to deallocate later using the sanitizer allocator again. To fix this, let's just not call dlsym from the demangler, and call it during initialization. Differential Revision: http://reviews.llvm.org/D19974 llvm-svn: 268716
* ThinLTO: fix assertion and refactor check for hidden use from inline ASM in ↵Mehdi Amini2016-05-065-54/+90
| | | | | | | | | | | a helper function This test was crashing, and currently it breaks bootstrapping clang with debuginfo Differential Revision: http://reviews.llvm.org/D20008 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268715
* [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructionsZlatko Buljan2016-05-068-20/+106
| | | | | | Differential Revision: http://reviews.llvm.org/D15744 llvm-svn: 268714
* [asan] Bail out on stack overflow in recovery mode.Maxim Ostapenko2016-05-062-1/+37
| | | | | | | | | | In recovery mode, when ASan detects stack overflow (say, when infinite recursion detected), it tries to continue program execution and hangs on repetitive error reports. There isn't any sense to do it, we can just bail out on stack overflow error, because the program would crash soon anyway. Differential Revision: http://reviews.llvm.org/D19958 llvm-svn: 268713
* [TableGen] Fix a memory leak when creating SwitchOpcodeMatchers.Craig Topper2016-05-061-1/+2
| | | | llvm-svn: 268712
* [TableGen] Remove isSafeToReorderWithPatternPredicate from DAGISelMatchers ↵Craig Topper2016-05-061-49/+0
| | | | | | as its not used anymore. llvm-svn: 268711
* [PM] port IR based PGO prof-gen pass to new pass managerXinliang David Li2016-05-0620-14/+85
| | | | llvm-svn: 268710
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