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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-05-06 12:57:26 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-05-06 12:57:26 +0000 |
| commit | a6cda12179b881731106ee86ee9600e45f6db5d6 (patch) | |
| tree | 89b28e6c6d28f036d068cad46387817df094641a | |
| parent | a139f8612879cd7619843ef305e0d68ba59e1cd0 (diff) | |
| download | bcm5719-llvm-a6cda12179b881731106ee86ee9600e45f6db5d6.tar.gz bcm5719-llvm-a6cda12179b881731106ee86ee9600e45f6db5d6.zip | |
[mips][fastisel] Conditional moves do not have implicit operands.
Reviewers: sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D19862
llvm-svn: 268730
| -rw-r--r-- | llvm/lib/Target/Mips/MipsFastISel.cpp | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll | 4 |
2 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index d215ed7977d..f8535290d3b 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -692,11 +692,10 @@ bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) { emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1); emitInst(Opc).addReg(LeftReg).addReg(RightReg).addReg( Mips::FCC0, RegState::ImplicitDefine); - MachineInstrBuilder MI = emitInst(CondMovOpc, ResultReg) - .addReg(RegWithOne) - .addReg(Mips::FCC0) - .addReg(RegWithZero, RegState::Implicit); - MI->tieOperands(0, 3); + emitInst(CondMovOpc, ResultReg) + .addReg(RegWithOne) + .addReg(Mips::FCC0) + .addReg(RegWithZero); break; } } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll index e346acfeff1..d661a281ea1 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ -; RUN: < %s | FileCheck %s +; RUN: -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ -; RUN: < %s | FileCheck %s +; RUN: -verify-machineinstrs < %s | FileCheck %s @f1 = common global float 0.000000e+00, align 4 @f2 = common global float 0.000000e+00, align 4 |
