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* ManualDWARFIndex: Fix misclassification of methods in unionsPavel Labath2018-05-254-8/+39
| | | | | | | Apple index was already treating them as methods. Not doing the same seems like an omission. llvm-svn: 333266
* Fix ODR violation from r333230Krasimir Georgiev2018-05-251-6/+2
| | | | | | This is an ODR violation, for example in ExecutionEngine/MCJIT/MCJIT.o: multiple definition of 'LLVMCreateIntelJITEventListener'. llvm-svn: 333265
* ManualDWARFIndex: reduce long parameter listsPavel Labath2018-05-252-117/+93
| | | | | | | | | Several functions were passing a list of 8 NameToDIE arguments around. This puts those variables in a struct and passes that instead, reducing code duplication and the possibility of error (swapping two arguments accidentally). llvm-svn: 333264
* [AArch64][SVE] Asm: Support for DUP (immediate) instructions.Sander de Smalen2018-05-2513-30/+746
| | | | | | | | | | | | | | | | | | | | | | | | | | Unpredicated copy of optionally-shifted immediate to SVE vector, along with MOV-aliases. This patch contains parsing and printing support for cpy_imm8_opt_lsl_(i8|i16|i32|i64). This operand allows a signed value in the range -128 to +127. For element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512. For element-width of 8 bits a range of -128 to 255 is accepted, since a copy of a byte can be considered either signed/unsigned. Note: This patch renames tryParseAddSubImm() -> tryParseImmWithOptionalShift() and moves the behaviour of trying to shift a plain immediate by an allowed shift-value to its addImmWithOptionalShiftOperands() method, so that the parsing itself is generic and allows immediates from multiple shifted operands. This is done because an immediate can be divisible by both shifted operands. Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D47309 llvm-svn: 333263
* [SystemZ] Bugfix in combineSTORE().Jonas Paulsson2018-05-252-1/+20
| | | | | | | | Remember to check if store is truncating before calling combineTruncateExtract(). Review: Ulrich Weigand llvm-svn: 333262
* [RegUsageInfoCollector] Bugfix for callee saved registers.Jonas Paulsson2018-05-252-11/+93
| | | | | | | | | | | | | | | | | | | | | | | Previously, this pass would look at the (static) set returned by getCallPreservedMask() and add those back as preserved in the case when isSafeForNoCSROpt() returns false. A problem is that a target may have to save some registers even when NoCSROpt takes place. For instance, on SystemZ, the return register is needed upon return from a function. Furthermore, getCallPreservedMask() only includes the registers that the target actually wishes to emit save/restore instructions for. This means that subregs and (fully saved) superregs are missing. This patch instead takes the (dynamic) set returned by target for the function from determineCalleeSaves() and then adds sub/super regs to build the set to be used when building the RegMask for the function. Review: Quentin Colombet, Ulrich Weigand https://reviews.llvm.org/D46315 llvm-svn: 333261
* [AMDGPU] Fixed incorrect break from loopTim Renouf2018-05-254-5/+141
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Lower control flow did not correctly handle the case that a loop break in if/else was on a condition that was not guaranteed to be masked by exec. The first test kernel shows an example of this going wrong; after exiting the loop, exec is all ones, even if it was not before the loop. The fix is for lowering of if-break and else-break to insert an S_AND_B64 to mask the break condition with exec. This commit also includes the optimization of not inserting that S_AND_B64 if it is obviously not needed because the break condition is the result of a V_CMP in the same basic block. V2: Addressed some review comments. V3: Test fixes. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D44046 Change-Id: I0fc56a01209a9e99d1d5c9b0ffd16f111caf200c llvm-svn: 333258
* Revert "[libFuzzer] [NFC] Generalize DSO tests to work even when files are ↵Vitaly Buka2018-05-252-8/+8
| | | | | | | | | | moved." Breaks libFuzzer tests. This reverts commit r333243. llvm-svn: 333257
* [x86] invpcid intrinsicGabor Buella2018-05-2512-0/+88
| | | | | | | | | | | | An intrinsic for an old instruction, as described in the Intel SDM. Reviewers: craig.topper, rnk Reviewed By: craig.topper, rnk Differential Revision: https://reviews.llvm.org/D47142 llvm-svn: 333256
* [x86] invpcid LLVM intrinsicGabor Buella2018-05-258-3/+78
| | | | | | | | | | | | | | | Re-add the feature flag for invpcid, which was removed in r294561. Add an intrinsic, which always uses a 32 bit integer as first argument, while the instruction actually uses a 64 bit register in 64 bit mode for the INVPCID_TYPE argument. Reviewers: craig.topper Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D47141 llvm-svn: 333255
* AMDGPU: Remove AMDGPUMCInstLower.hTom Stellard2018-05-253-48/+23
| | | | | | | | | | | | | | | | Summary: The AMDGPUMCInstLower class is not used outside AMDGPUMCInstLower.cpp, so we don't need a header file. Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D47264 llvm-svn: 333254
* Revert r333226 "[ValueTracking] Teach computeKnownBits that the result of an ↵Craig Topper2018-05-253-25/+8
| | | | | | | | | | absolute value pattern that uses nsw flag is always positive." This breaks some libFuzzer tests. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/15589/steps/check-fuzzer/logs/stdio Reverting to investigate llvm-svn: 333253
* Add one more test for optionalMarshall Clow2018-05-251-5/+14
| | | | llvm-svn: 333252
* Add deduction guides for optionalMarshall Clow2018-05-253-0/+91
| | | | llvm-svn: 333251
* Restore the LoopInstSimplify pass, reverting r327329 that removed it.Chandler Carruth2018-05-259-3/+273
| | | | | | | | | | | | | | | The plan had always been to move towards using this rather than so much in-pass simplification within the loop pipeline, but we never got around to it.... until only a couple months after it was removed due to disuse. =/ This commit is just a pure revert of the removal. I will add tests and do some basic cleanup in follow-up commits. Then I'll wire it into the loop pass pipeline. Differential Revision: https://reviews.llvm.org/D47353 llvm-svn: 333250
* Use quoteattr to ensure we make well formed attributesChris Matthews2018-05-254-38/+40
| | | | | | | | We were making malformed XML on tests with ' in the name. Switch to using saxutils to set all of our attributes, so it can handle quotes etc correctly. llvm-svn: 333249
* HostInfoMacOSX: Support finding the clang resource directory within CLTools.Adrian Prantl2018-05-252-9/+21
| | | | | | rdar://problem/40537961 llvm-svn: 333248
* [llvm-symbolizer] Simplify. NFCFangrui Song2018-05-251-10/+5
| | | | llvm-svn: 333247
* Make atomic non-member functions as nonnullJF Bastien2018-05-252-19/+107
| | | | | | | | | | | | | | | | | Summary: As a companion to libc++ patch https://reviews.llvm.org/D47225, mark builtin atomic non-member functions which accept pointers as nonnull. The atomic non-member functions accept pointers to std::atomic / std::atomic_flag as well as to the non-atomic value. These are all dereferenced unconditionally when lowered, and therefore will fault if null. It's a tiny gotcha for new users, especially when they pass in NULL as expected value (instead of passing a pointer to a NULL value). <rdar://problem/18473124> Reviewers: arphaman Subscribers: aheejin, cfe-commits Differential Revision: https://reviews.llvm.org/D47229 llvm-svn: 333246
* [libFuzzer] [NFC] Generalize fdmask test.George Karpenkov2018-05-241-12/+12
| | | | | | | | | The ordering of stderr/stdout writes might not be guaranteed, and is irrelevant for this test. Differential Revision: https://reviews.llvm.org/D47294 llvm-svn: 333245
* [libFuzzer] [NFC] Do not remove SanitizerLintCheck from libFuzzer testsGeorge Karpenkov2018-05-241-1/+0
| | | | | | | | | With %run commands being present now, we want to make sure that they stay present. Differential Revision: https://reviews.llvm.org/D47293 llvm-svn: 333244
* [libFuzzer] [NFC] Generalize DSO tests to work even when files are moved.George Karpenkov2018-05-242-8/+8
| | | | | | Differential Revision: https://reviews.llvm.org/D47292 llvm-svn: 333243
* [libFuzzer] Fix multi-arch build support for fuzzer tests.George Karpenkov2018-05-241-5/+7
| | | | | | | | | The bug was not previously exposed as only one architecture is currently supported for libFuzzer. Differential Revision: https://reviews.llvm.org/D47287 llvm-svn: 333242
* [libFuzzer] Run libFuzzer unit tests only on host architecture.George Karpenkov2018-05-241-32/+33
| | | | | | | | | | LIT tests are used to test other cross-compiled architectures, unit tests are only run on the host. NFC now as currently only a single architecture is supported. Differential Revision: https://reviews.llvm.org/D47286 llvm-svn: 333241
* [libFuzzer] XFAIL a few libFuzzer tests on iOS.George Karpenkov2018-05-248-0/+8
| | | | | | | | NFC for now. Differential Revision: https://reviews.llvm.org/D47284 llvm-svn: 333240
* [libFuzzer] Fix a typo in CMake configuration.George Karpenkov2018-05-241-1/+1
| | | | | | | | | NFC now when libFuzzer supports only one architecture, will stop being NFC after multiple architectures are supported. Differential Revision: https://reviews.llvm.org/D47283 llvm-svn: 333239
* Add DWARFBaseDie.{h,cpp} to the Xcode build.Jim Ingham2018-05-241-0/+6
| | | | | | This should unbreak the green dragon bot builds. llvm-svn: 333238
* [Debugify] Set a DI version module flag for llc compatibilityVedant Kumar2018-05-245-31/+34
| | | | | | | Setting the "Debug Info Version" module flag makes it possible to pipe synthetic debug info into llc, which is useful for testing backends. llvm-svn: 333237
* [Debugify] Avoid printing unnecessary square braces, NFCVedant Kumar2018-05-243-5/+7
| | | | llvm-svn: 333236
* [DebugInfo] Maintain DI when converting GEP to bitcastVedant Kumar2018-05-242-0/+13
| | | | | | | | | | | When a GEP with all zero indices is converted to bitcast, its DI wasn't copied over to the newly created instruction. This patch fixes that bug. Patch by Kareem Ergawy! Differential Revision: https://reviews.llvm.org/D47347 llvm-svn: 333235
* Improve diagonstic for braced-init-list as operand to ?: expression.Richard Smith2018-05-242-7/+25
| | | | llvm-svn: 333234
* Switch a couple of users of LangOpts::GNUMode to the more appropriate ↵Richard Smith2018-05-242-3/+3
| | | | | | LangOpts::GNUKeywords. llvm-svn: 333233
* Revert "[cmake] [ARM] Check if VFP is supported before including any VFP ↵Azharuddin Mohammed2018-05-242-20/+5
| | | | | | | | builtins" This reverts commit 2a10f5da5acb1b51d0a2ecf13dca0bf1de859db2. llvm-svn: 333232
* [LegacyPM] Use MapVector for OnTheFlyPassManagers.Florian Hahn2018-05-241-4/+4
| | | | | | | | | | | | | | | | | | | | Currently the iteration order of OnTheFlyManagers is not deterministic between executions, which means some of test/Other/opt-*-pipeline.ll tests fail non-deterministically if an additional on-the-fly manager is added, as in D45330. By using MapVector, we always iterate in the insertion order. As we are not removing elements, there shouldn't be a performance hit, except that we store an additional vector with the keys. Reviewers: efriedma, chandlerc, pcc, jhenderson Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D47317 llvm-svn: 333231
* [C-API] Add functions to create GDB, Intel, Oprofile event listeners.Andres Freund2018-05-245-0/+34
| | | | | | | | | | The additions of Intel, Oprofile listeners were done blindly. Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D44890 llvm-svn: 333230
* [ORC][C-API] Expose LLVMOrc{Unr,R}egisterJITEventListener().Andres Freund2018-05-244-0/+34
| | | | | | | | Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D44890 llvm-svn: 333229
* [ORC] Add ability [un]register JITEventListener on Orc C stack.Andres Freund2018-05-241-1/+40
| | | | | | | | Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D44890 llvm-svn: 333228
* [ORC] Extend object layer callbacks so JITEventListener can be supported.Andres Freund2018-05-242-17/+36
| | | | | | | | | | | | | | | | | | | | | | Currently RTDyldObjectLinkingLayer makes it hard to support JITEventListeners. Which in turn means debugging and profiling JIT generated code hard. Supporting JITEventListeners at minimum requries a freed callback (added). As listeners expect the ObjectFile to be passed as well, an adaptor between RTDyldObjectLinkingLayer and JITEventListeners would currently need to also maintain ObjectFiles for all loaded modules. To make that less awkward, extend the callbacks to pass the ObjectFile to both Finalized and Freed callbacks. That requires extending the lifetime of the object file when callbacks are present. Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D44890 llvm-svn: 333227
* [ValueTracking] Teach computeKnownBits that the result of an absolute value ↵Craig Topper2018-05-243-8/+25
| | | | | | | | | | | | pattern that uses nsw flag is always positive. If the nsw flag is used in the absolute value then it is undefined for INT_MIN. For all other value it will produce a positive number. So we can assume the result is positive. This breaks some InstCombine abs/nabs combining tests because we simplify the second compare from known bits rather than as the whole pattern. Looks like we can probably fix it by adding a neg+abs/nabs combine to just swap the select operands. Need to check alive to make sure there are no corner cases. Differential Revision: https://reviews.llvm.org/D47041 llvm-svn: 333226
* [CUDA]Fix dynamic|guided scheduling.George Rokos2018-05-241-57/+50
| | | | | | | | | | | | | The existing implementation of the dynamic scheduling breaks the contract introduced by the original openmp runtime and, thus, is incorrect. Patch fixes it and introduces correct dynamic scheduling model. Thanks to Alexey Bataev for submitting this patch. Differential Revision: https://reviews.llvm.org/D47333 llvm-svn: 333225
* Use DWARFBaseDIE as a compile-time protectionJan Kratochvil2018-05-244-10/+10
| | | | | | | | | As suggested by Pavel Labath in D46810 DWARFUnit::GetUnitDIEOnly() returning a pointer to m_first_die should not permit using methods like GetFirstChild(). Differential revision: https://reviews.llvm.org/D47276 llvm-svn: 333224
* DWARFDIE split out to DWARFBaseDIEJan Kratochvil2018-05-245-306/+358
| | | | | | | | | | | | This new DWARFBaseDIE is going to be used for DWARFUnit::GetUnitDIEOnly() as other DIEs are unavailable that time so the caller should not have methods available to access them. This patch is only a mechanical split without any use of it. Differential revision: https://reviews.llvm.org/D47275 llvm-svn: 333222
* [InstCombine] Enable more reassociations using FMF 'reassoc' + 'nsz'Warren Ristow2018-05-242-6/+142
| | | | | | | | | | | Reassociation of math ops in some contexts (especially vector contexts) has generally only been happening when the 'fast' FMF was set. This enables reassoication when only the finer grained controls 'reassoc' and 'nsz' are set. Differential Revision: https://reviews.llvm.org/D47335 llvm-svn: 333221
* Improve diagnostics for config mismatches with -fmodule-file.Richard Smith2018-05-244-12/+18
| | | | | | | | Unless the user uses -Wno-module-file-config-mismatch (or -Wno-error=...), allow the AST reader to produce errors describing the nature of the config mismatch. llvm-svn: 333220
* AMDGPU: Split R600 AsmPrinter code into its own classTom Stellard2018-05-246-161/+303
| | | | | | | | | | | | Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D47245 llvm-svn: 333219
* [AArch64] Improve orr+movk sequences for MOVi64imm.Eli Friedman2018-05-243-146/+208
| | | | | | | | | | | | | | The existing code has three different ways to try to lower a 64-bit immediate to the sequence ORR+MOVK. The result is messy: it misses some possible sequences, and the order of the checks means we sometimes emit two MOVKs when we only need one. Instead, just use a simple loop to try all possible two-instruction ORR+MOVK sequences. Differential Revision: https://reviews.llvm.org/D47176 llvm-svn: 333218
* Add handling for GlobalAliases in ExecutionEngine::getConstantValue.Lang Hames2018-05-242-0/+17
| | | | | | | | Patch by Brad Moody. Thanks Brad! https://reviews.llvm.org/D42160 llvm-svn: 333217
* [cmake] [ARM] Check if VFP is supported before including any VFP builtinsAzharuddin Mohammed2018-05-242-5/+20
| | | | | | | | | | | | | | | | | | | Summary: rL325492 disables FPU features when using soft floating point (-mfloat-abi=soft), which is used internally when building for armv7. This causes errors with builtins that utililize VFP instructions. With this change we first check if VFP is enabled (by checking if the preprocessor macro __VFP_FP__ is defined) before including such builtins. Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith Reviewed By: peter.smith Subscribers: peter.smith, mgorny, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D47217 llvm-svn: 333216
* [ORC] Add findSymbolIn() wrapper to C bindings, take #2.Andres Freund2018-05-244-6/+59
| | | | | | | | | | | | | | | | Re-appply r333147, reverted in r333152 due to a pre-existing bug. As D47308 has been merged in r333206, the OSX issue should now be resolved. In many cases JIT users will know in which module a symbol resides. Avoiding to search other modules can be more efficient. It also allows to handle duplicate symbol names between modules. Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D44889 llvm-svn: 333215
* [AArch64] Take advantage of variable shift/rotate amount implicit mod operation.Geoff Berry2018-05-243-16/+155
| | | | | | | | | | | | | | | | Summary: Optimize code generated for variable shifts/rotates by taking advantage of the implicit and/mod done on the variable shift amount register. Resolves bug 27582 and bug 37421. Reviewers: t.p.northover, qcolombet, MatzeB, javed.absar Subscribers: rengolin, kristof.beyls, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D46844 llvm-svn: 333214
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