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* [mips] Fix the predicates of some aliasesSimon Dardis2018-06-193-3/+8
| | | | | | | | | | | Previously, some aliases were marked as not being available for microMIPS32R6, but this was overridden at the top level. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D48321 llvm-svn: 335053
* Replace HostInfo::GetLLDBPath with specific functionsPavel Labath2018-06-1921-228/+204
| | | | | | | | | | | | | | | | | | | | | Summary: Instead of a function taking an enum value determining which path to return, we now have a suite of functions, each returning a single path kind. This makes it easy to move the python-path function into a specific plugin in a follow-up commit. All the users of GetLLDBPath were converted to call specific functions instead. Most of them were hard-coding the enum value anyway, so this conversion was simple. The only exception was SBHostOS, which I've changed to use a switch on the incoming enum value. Reviewers: clayborg, zturner Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D48272 llvm-svn: 335052
* Make TestCommandScript.py NO_DEBUG_INFO_TESTCASEPavel Labath2018-06-191-0/+1
| | | | llvm-svn: 335051
* Implement semantic checking for __builtin_signbit.Aaron Ballman2018-06-192-4/+34
| | | | | | r242675 changed the signature for the signbit builtin but did not introduce proper semantic checking to ensure the arguments are as-expected. This patch groups the signbit builtin along with the other fp classification builtins. Fixes PR28172. llvm-svn: 335050
* Reverting due to line ending changes; will reapply after addressing that.Aaron Ballman2018-06-192-1039/+1009
| | | | llvm-svn: 335049
* Implement semantic checking for __builtin_signbit.Aaron Ballman2018-06-192-1009/+1039
| | | | | | r242675 changed the signature for the signbit builtin but did not introduce proper semantic checking to ensure the arguments are as-expected. This patch groups the signbit builtin along with the other fp classification builtins. Fixes PR28172. llvm-svn: 335048
* Attempt to fix windows build broken by r334968Pavel Labath2018-06-191-0/+1
| | | | | | | | | | | | | The issue was that there was no dependency from lldb-suite target to liblldb in the no-framework scenario. This caused the finish-swig target to be executed prematurely and fail (because it cannot copy liblldb to the python folder). On other platforms this did not matter because there just creates a symlink. The extra lldb-suite -> liblldb edge should fix this. Technically, I could add this just to the !framework case as the framework target will take care of the transitive dep, but it seemed more clear to make the dep unconditional. llvm-svn: 335047
* [OpenMP] [CUDA] Expose teamid to the debug pathGuansong Zhang2018-06-191-1/+1
| | | | | | | | | | | | | | | | Summary: Small bug fix for debug build. A previous fix causing trouble for debug build. Reviewers: grokos Reviewed By: grokos Subscribers: openmp-commits Tags: #openmp Differential Revision: https://reviews.llvm.org/D48286 llvm-svn: 335046
* [SLPVectorizer] Remove default OperandValueKind arguments from ↵Simon Pilgrim2018-06-191-14/+7
| | | | | | | | | | | | getArithmeticInstrCost calls (NFC) The getArithmeticInstrCost calls for shuffle vectors entry costs specify TargetTransformInfo::OperandValueKind arguments, but are just using the method's default values. This seems to be a copy + paste issue and doesn't affect the costs in anyway. The TargetTransformInfo::OperandValueProperties default arguments are already not being used. Noticed while working on D47985. Differential Revision: https://reviews.llvm.org/D48008 llvm-svn: 335045
* [PowerPC] Fix label address calculation for ppc32Strahinja Petrovic2018-06-192-3/+48
| | | | | | | | This patch fixes calculating address of label on ppc32 (for -fPIC). Differential Revision: https://reviews.llvm.org/D46582 llvm-svn: 335043
* llvm-exegesis: mark ~ExegesisTarget() as virtual. Fixes build.Roman Lebedev2018-06-191-1/+1
| | | | | | | | | | | /build/llvm/tools/llvm-exegesis/lib/X86/../Target.h:32:3: error: 'exegesis::ExegesisTarget' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor] ~ExegesisTarget(); ^ /build/llvm/tools/llvm-exegesis/lib/X86/Target.cpp:15:7: error: 'exegesis::(anonymous namespace)::ExegesisX86Target' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor] class ExegesisX86Target : public ExegesisTarget { ^ llvm-svn: 335042
* Re-land r335038 "[llvm-exegesis] A mechanism to add target-specific ↵Clement Courbet2018-06-1911-4/+205
| | | | | | | | functionality."" Fix typo: LLVM_NATIVE_ARCH -> LLVM_EXEGESIS_NATIVE_ARCH. llvm-svn: 335041
* Revert r335038 "[llvm-exegesis] A mechanism to add target-specific ↵Clement Courbet2018-06-1911-205/+4
| | | | | | | | functionality." Breaks buildbots. llvm-svn: 335040
* [InstCombine] Replacing X86-specific rounding intrinsics with generic floor-ceilMikhail Dvoretckii2018-06-194-2/+420
| | | | | | | | | | | | This patch replaces calls to X86-specific intrinsics with floor-ceil semantics with calls to target-independent @llvm.floor.* and @llvm.ceil.* intrinsics. This doesn't affect the resulting machine code, as those intrinsics are lowered to the same instructions, but exposes these specific rounding cases to generic optimizations. Differential Revision: https://reviews.llvm.org/D48067 llvm-svn: 335039
* [llvm-exegesis] A mechanism to add target-specific functionality.Clement Courbet2018-06-1911-4/+205
| | | | | | | | | | | | Summary: This is a step towards implementing memory operands and X87. Reviewers: gchatelet Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D48210 llvm-svn: 335038
* [X86] VRNDSCALE* folding from masked and scalar ffloor and fceil patternsMikhail Dvoretckii2018-06-194-6/+2252
| | | | | | | | | | | This patch handles back-end folding of generic patterns created by lowering the X86 rounding intrinsics to native IR in cases where the instruction isn't a straightforward packed values rounding operation, but a masked operation or a scalar operation. Differential Revision: https://reviews.llvm.org/D45203 llvm-svn: 335037
* [LoopSimplifyCFG] Invalidate SCEV in LoopSimplifyCFGDavid Green2018-06-192-3/+64
| | | | | | | | | | LoopSimplifyCFG, being a loop pass, needs to preserve scalar evolution. This invalidates SE for the loops altered during block merging. Differential Revision: https://reviews.llvm.org/D48258 llvm-svn: 335036
* [clangd] Use workspace root path as hint path for resolving URIs in ↵Eric Liu2018-06-196-15/+32
| | | | | | | | | | | | | | | | | | workspace/symbol Summary: Some URI schemes require a hint path to be provided, and workspace root path seems to be a good fit. Reviewers: sammccall, malaperle Reviewed By: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D48290 llvm-svn: 335035
* [MCA][NFC] Add generic XOP resource testsRoman Lebedev2018-06-191-0/+534
| | | | | | | | | | | | | | | | | | | | | Summary: Based on * [[ https://support.amd.com/TechDocs/43479.pdf | AMD64 Architecture Programmer’s Manual Volume 6: 128-Bit and 256-Bit XOP and FMA4 Instructions ]], * [[ https://support.amd.com/TechDocs/24594.pdf | AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions]], * https://en.wikipedia.org/wiki/XOP_instruction_set Appears to be only supported in AMD's 15h generation, so only in b**d**ver[1-4], for which currently llvm has no scheduling profiles. Reviewers: RKSimon, craig.topper, andreadb, spatel Reviewed By: RKSimon Subscribers: gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D48264 llvm-svn: 335034
* [MCA][NFC] Add generic TBM resource testsRoman Lebedev2018-06-191-0/+169
| | | | | | | | | | | | | | | | | | | Summary: Based on https://support.amd.com/TechDocs/24594.pdf, https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#TBM_(Trailing_Bit_Manipulation) Appears to be only supported in AMD's 15h generation, so only in b**d**ver[1-4], for which currently llvm has no scheduling profiles. Reviewers: RKSimon, craig.topper, simark, andreadb Reviewed By: RKSimon Subscribers: gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D48252 llvm-svn: 335033
* [SLPVectorizer] Pull out AltOpcode determination from reorderAltShuffleOperands.Simon Pilgrim2018-06-191-6/+8
| | | | | | Minor step towards making the alternate opcode system work with a wider range of opcode pairs. llvm-svn: 335032
* Remove valueCoversEntireFragment asserts in ConvertDebugDeclareToDebugValueBjorn Pettersson2018-06-191-6/+0
| | | | | | | | | | | | | | This is a fixup for r334830 causing problems in polly-aosp buildbot. Focus in r334830 was to fix a problem seen with ConvertDebugDeclareToDebugValue involving store instructions. It also added some asserts to find out of similar problems existed for the ConvertDebugDeclareToDebugValue functions involving load and phi instructions. One of those asserts seems to blow in the polly-aosp buildbot, so I'll revert the asserts while debugging. llvm-svn: 335031
* [analyzer] Made a buildbot happy.Kristof Umann2018-06-191-7/+9
| | | | | | | Since `isPrimitiveType` was only used in an assert, a builbot with `-Werror` and no asserts enabled failed to build it as it was unused. llvm-svn: 335030
* Move ScopInfo to isl++Tobias Grosser2018-06-191-2/+1
| | | | llvm-svn: 335029
* Add a factory method to ConstantDataArray that allows to pass in the data as ↵Adrian Kuegel2018-06-191-3/+13
| | | | | | | | | | | StringRef This simplifies the case if we already have access to the raw data that we need to store in a ConstantDataArray. The new factor method can also be reused for implementing the factory method that gets the data as ArrayRef. Differential Revision: https://reviews.llvm.org/D47706 llvm-svn: 335028
* [LoopInterchange] Move PHI handling to adjustLoopBranches.Florian Hahn2018-06-191-30/+40
| | | | | | | | | | | | | | | | | | | | | This patch moves the logic to handle reduction PHI nodes to the end of adjustLoopBranches. Reduction PHI nodes in the outer loop header can be moved to the inner loop header and reduction PHI nodes from the inner loop header can be moved to the outer loop header. In the latter situation, we have to deal with 1 kind of PHI nodes: PHI nodes that are part of inner loop-only reductions. We can replace the PHI node with the value coming from outside the inner loop. Reviewers: mcrosier, efriedma, karthikthecool Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D46198 llvm-svn: 335027
* Test commit.Mikhail Dvoretckii2018-06-191-1/+1
| | | | llvm-svn: 335026
* [XRay] rm GLOB || true -> rm -fFangrui Song2018-06-1912-21/+21
| | | | | | | | | | | | Summary: `rm -f` does not write diagnostic message when there is no file argument. Reviewers: dberris Subscribers: delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D48311 llvm-svn: 335025
* If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ↵QingShan Zhang2018-06-194-13/+95
| | | | | | | | | | | when we are loading a floating, and expand it post RA basing on the register pressure. However, we miss to do the add-imm peephole for these pseudo instruction. Differential Revision: https://reviews.llvm.org/D47568 Reviewed By: Nemanjai llvm-svn: 335024
* [RISCV] Add tests for overflow intrinsicsRoger Ferrer Ibanez2018-06-191-0/+84
| | | | | | | This is using the existing codegen so we can see the change once we custom lower ISD::{U,S}{ADD,SUB}O nodes. llvm-svn: 335023
* Revert r335019 "Update NRVO logic to support early return (Attempt 2)"Taiju Tsuiki2018-06-1912-307/+84
| | | | llvm-svn: 335022
* [Sema] Produce diagnostics for attribute 'trivial_abi' that appearsAkira Hatanaka2018-06-193-10/+9
| | | | | | | | | | | | after the closing brace of a class declaration. Merge the two call sites of checkIllFormedTrivialABIStruct and sink it into CheckCompletedCXXClass so that it is called after the attribute has been attached to the CXXRecordDecl. rdar://problem/40873297 llvm-svn: 335021
* [SimplifyIndVars] Eliminate redundant truncsMax Kazantsev2018-06-194-3/+588
| | | | | | | | | | | | | | | | | | | | | | | This patch adds logic to deal with the following constructions: %iv = phi i64 ... %trunc = trunc i64 %iv to i32 %cmp = icmp <pred> i32 %trunc, %invariant Replacing it with %iv = phi i64 ... %cmp = icmp <pred> i64 %iv, sext/zext(%invariant) In case if it is legal. Specifically, if `%iv` has signed comparison users, it is required that `sext(trunc(%iv)) == %iv`, and if it has unsigned comparison uses then we require `zext(trunc(%iv)) == %iv`. The current implementation bails if `%trunc` has other uses than `icmp`, but in theory we can handle more cases here (e.g. if the user of trunc is bitcast). Differential Revision: https://reviews.llvm.org/D47928 Reviewed By: reames llvm-svn: 335020
* Update NRVO logic to support early return (Attempt 2)Taiju Tsuiki2018-06-1912-84/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the second attempt of r333500 (Update NRVO logic to support early return). The previous one was reverted for a miscompilation for an incorrect NRVO set up on templates such as: ``` struct Foo {}; template <typename T> T bar() { T t; if (false) return T(); return t; } ``` Where, `t` is marked as non-NRVO variable before its instantiation. However, while its instantiation, it's left an NRVO candidate, turned into an NRVO variable later. Reviewers: rsmith Reviewed By: rsmith Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47586 llvm-svn: 335019
* [X86] Add the ability to force an EVEX2VEX mapping table entry from the .td ↵Craig Topper2018-06-193-136/+158
| | | | | | | | | | | | | | files. Remove remaining manual table entries from the tablegen emitter. This adds an EVEX2VEXOverride string to the X86 instruction class in X86InstrFormats.td. If this field is set it will add manual entry in the EVEX->VEX tables that doesn't check the encoding information. Then use this mechanism to map VMOVDU/A8/16, 128-bit VALIGN, and VPSHUFF/I instructions to VEX instructions. Finally, remove the manual table from the emitter. This has the bonus of fully sorting the autogenerated EVEX->VEX tables by their EVEX instruction enum value. We may be able to use this to do a binary search for the conversion and get rid of the need to create a DenseMap. llvm-svn: 335018
* [X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have ↵Craig Topper2018-06-195-87/+54
| | | | | | | | | | | | | | VEX.W==1, but can be converted to their VEX equivalent that uses VEX.W==0. EVEX makes heavy use of the VEX.W bit to indicate 64-bit element vs 32-bit elements. Many of the VEX instructions were split into 2 versions with different masking granularity. The EVEX->VEX table generate can collapse the two versions if the VEX version uses is tagged as VEX_WIG. But if the VEX version is instead marked VEX.W==0 we can't combine them because we don't know if there is also a VEX version with VEX.W==1. This patch adds a new VEX_W1X tag that indicates the EVEX instruction encodes with VEX.W==1, but is safe to convert to a VEX instruction with VEX.W==0. This allows us to remove a bunch of manual EVEX->VEX table entries. We may want to look into splitting up the VEX_WPrefix field which would simplify the disassembler. llvm-svn: 335017
* Revert "[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags"Sanjoy Das2018-06-1916-55/+30
| | | | | | | | | | | | | | This reverts r334428. It incorrectly marks some multiplications as nuw. Tim Shen is working on a proper fix. Original commit message: [SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags where safe. Summary: Previously we would add them for adds, but not multiplies. llvm-svn: 335016
* [X86] Simplify the TSFlags checking code in EvexToVexInstPass. NFCICraig Topper2018-06-191-16/+6
| | | | | | The code was previously checking the L2 and L flag on 3 separate lines, treating the combination as an encoding. Instead its better to think of the L2 bit as being something that can't be done with VEX and early returning. Then we just need to check the L bit. llvm-svn: 335015
* Fix up Info.plist when building LLDB.framework with CMakeAlex Langford2018-06-193-1/+9
| | | | | | | | | | | | Summary: We weren't using the Info.plist template in resources previously. When using that template, some of the key's values weren't being populated because some variables were not being defined. In one case, CMake didn't like the substring expansion syntax of CFBundleIdentifier so I got rid of that. Differential Revision: https://reviews.llvm.org/D47792 llvm-svn: 335014
* Fix bots after r334981Francis Visoiu Mistrih2018-06-191-19/+19
| | | | llvm-svn: 335013
* [WebAssembly] Remove an extra ';' at the end of a namespaceHeejin Ahn2018-06-191-1/+1
| | | | llvm-svn: 335008
* [asan] Avoid deadlock when initializing the symbolizer CHECK failsReid Kleckner2018-06-191-2/+8
| | | | llvm-svn: 335007
* [WebAssembly] Add more utility functionsHeejin Ahn2018-06-194-17/+192
| | | | | | | | | | | | | | | | Summary: Added more utility functions that will be used in EH-related passes Also changed `LoopBottom` function to `getBottom` and uses templates to be able to handle other classes as well, which will be used in CFGSort later. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48262 llvm-svn: 335006
* [WebAssembly] Add WasmEHFuncInfo for unwind destination informationHeejin Ahn2018-06-195-19/+177
| | | | | | | | | | | | | | | Summary: Add WasmEHFuncInfo and routines to calculate and fill in this struct to keep track of unwind destination information. This will be used in other EH related passes. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D48263 llvm-svn: 335005
* [ARM] Thumb2 constant cmp testcases.Eli Friedman2018-06-191-0/+237
| | | | | | | | Shows some missed optimizations for the -7929856 and -2166 testcases. -7929856 is due to a bug in ARMTargetLowering::getARMCmp, I think; the -2166 case is a missing pattern. llvm-svn: 335004
* [ARM] Testcase for Thumb1 cmp with constants.Eli Friedman2018-06-191-0/+110
| | | | | | | | | | Even if a comparison isn't legal, we should try to prefer constants which can be materialized with a two-instruction sequence. (Thinking about it a bit more, there might be some more clever sequence we could generate for certain comparisons invoving powers of two, but I'm not sure exactly what that would look like.) llvm-svn: 335003
* [ARM] Add Thumb1 coverage for cmn testcases.Eli Friedman2018-06-191-6/+45
| | | | | | | There's a missed optimization for immediates: we can save two instructions by using adds instead of movs+mvns+cmp. llvm-svn: 335002
* [ARM] Testcase for missed optimization for masking.Eli Friedman2018-06-191-12/+46
| | | | | | | When the result of masking is truncated to i16, we should try to use "bic" instead of "and". llvm-svn: 335001
* [ARM] Testcase for missed optimization with i16 compare.Eli Friedman2018-06-191-0/+21
| | | | | | | The result looks weird because the DAG actually has an explicit shift; I haven't figured out why, exactly. llvm-svn: 335000
* [WebAssembly] Fixed disassembler unit test failure.Derek Schuff2018-06-191-3/+3
| | | | | | | | | | Summary: A recent commit forgot to update the unit tests. Differential Revision: https://reviews.llvm.org/D48304 Patch by Wouter Van Oortmerssen llvm-svn: 334999
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