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| author | Simon Dardis <simon.dardis@mips.com> | 2018-06-19 15:25:01 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-06-19 15:25:01 +0000 |
| commit | 9e80c340f774928b02144da0313358b7e6faec6d (patch) | |
| tree | d124fbd1b15b5ee73aef3f7a7eddf4a7a7434450 | |
| parent | 60f028ff035a787078d3a336f981e539bee8f2e3 (diff) | |
| download | bcm5719-llvm-9e80c340f774928b02144da0313358b7e6faec6d.tar.gz bcm5719-llvm-9e80c340f774928b02144da0313358b7e6faec6d.zip | |
[mips] Fix the predicates of some aliases
Previously, some aliases were marked as not being available for microMIPS32R6,
but this was overridden at the top level.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D48321
llvm-svn: 335053
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips32r6/valid.s | 2 |
3 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td b/llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td index b4ac47d402c..710358cdd06 100644 --- a/llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td @@ -1677,6 +1677,9 @@ def : MipsInstAlias<"xor $rs, $imm", def : MipsInstAlias<"not $rt, $rs", (NOR_MMR6 GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>, ISA_MICROMIPS32R6; +def : MipsInstAlias<"not $rt", + (NOR_MMR6 GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>, + ISA_MICROMIPS32R6; def : MipsInstAlias<"lapc $rd, $imm", (ADDIUPC_MMR6 GPR32Opnd:$rd, simm19_lsl2:$imm)>, ISA_MICROMIPS32R6; diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index e07d186d539..5c18d5eb928 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -1287,7 +1287,7 @@ class UncondBranchMMPseudo<string opstr> : def B_MM_Pseudo : UncondBranchMMPseudo<"b">, ISA_MICROMIPS; -let Predicates = [InMicroMips] in { +let EncodingPredicates = [InMicroMips] in { def SDIV_MM_Pseudo : MultDivPseudo<SDIV_MM, ACC64, GPR32Opnd, MipsDivRem, II_DIV, 0, 1, 1>, ISA_MIPS1_NOT_32R6_64R6; def UDIV_MM_Pseudo : MultDivPseudo<UDIV_MM, ACC64, GPR32Opnd, MipsDivRemU, @@ -1374,10 +1374,10 @@ let Predicates = [InMicroMips] in { def : MipsInstAlias<"not $rt, $rs", (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>, - ISA_MICROMIPS; + ISA_MICROMIPS32_NOT_MIPS32R6; def : MipsInstAlias<"not $rt", (NOR_MM GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>, - ISA_MICROMIPS; + ISA_MICROMIPS32_NOT_MIPS32R6; def : MipsInstAlias<"bnez $rs,$offset", (BNE_MM GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>, ISA_MICROMIPS; diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s index 3a7582f615e..b48e3559c9b 100644 --- a/llvm/test/MC/Mips/micromips32r6/valid.s +++ b/llvm/test/MC/Mips/micromips32r6/valid.s @@ -390,7 +390,9 @@ and $3, 5 # CHECK: andi $3, $3, 5 # encoding: [0xd0,0x63,0x00,0x05] and $3, $4, 5 # CHECK: andi $3, $4, 5 # encoding: [0xd0,0x64,0x00,0x05] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x04,0x1a,0xd0] + # CHECK-NEXT: # <MCInst #{{.*}} NOR_MMR6 not $3 # CHECK: not $3, $3 # encoding: [0x00,0x03,0x1a,0xd0] + # CHECK-NEXT: # <MCInst #{{.*}} NOR_MMR6 or $3, 5 # CHECK: ori $3, $3, 5 # encoding: [0x50,0x63,0x00,0x05] or $3, $4, 5 # CHECK: ori $3, $4, 5 # encoding: [0x50,0x64,0x00,0x05] xor $3, 5 # CHECK: xori $3, $3, 5 # encoding: [0x70,0x63,0x00,0x05] |
