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llvm-svn: 184749
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llvm-svn: 184748
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now it includes proper functions (including interceptors)
and does not include local functions that lead to build failures
llvm-svn: 184747
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- Sort functions in the same order
- Match whitespace
- Remove commetned out code
- Make filename in comments match filename
llvm-svn: 184746
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llvm-svn: 184745
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llvm-svn: 184744
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llvm-svn: 184743
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Akin to r181712 (88e529b7) of Linux/ProcessMonitor.cpp
llvm-svn: 184742
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Revision r147613 (2341d35) renamed this file with s/Linux/POSIX/, but
header guards and comments were not updated to match.
llvm-svn: 184741
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CheckParmForFunctionDef performs standard checks for type completeness
and other things like a destructor check for the MSVC++ ABI.
llvm-svn: 184740
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llvm-svn: 184739
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to avoid compiler warnings.
llvm-svn: 184738
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llvm-svn: 184737
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llvm-svn: 184736
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llvm-svn: 184735
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This an entry point from uninstrumented code.
llvm-svn: 184734
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Since r181446 the m_private_run_lock has been used for all platforms.
llvm-svn: 184733
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All of LLVM's Python scripts only support Python 2 for widely understood
reasons.
Patch by Yonggang Luo.
llvm-svn: 184732
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llvm-svn: 184731
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-mtriple=i686-unknown-unknown.
llvm-svn: 184730
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llvm-svn: 184729
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of NVPTXTargetObjectFile. ~NVPTXTargetObjectFile() tries to delete them.
It caused crash on some hosts since r184595.
llvm-svn: 184728
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failures on MS hosts.
FIXME: A couple of tests have been suppressed.
I know it'd be bad with _MSC_VER here, though.
llvm-svn: 184727
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on win32 hosts.
llvm-svn: 184726
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This adds the bt/bf/bd(n)zt/bd(n)zf mnemonics as aliases for the
asm parser, resolving to the generic conditional patterns.
llvm-svn: 184725
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This should hopefully have fixed the stage2/stage3 miscompare on the dragonegg
testers.
"LoopVectorize: Use the dependence test utility class
We now no longer need alias analysis - the cases that alias analysis would
handle are now handled as accesses with a large dependence distance.
We can now vectorize loops with simple constant dependence distances.
for (i = 8; i < 256; ++i) {
a[i] = a[i+4] * a[i+8];
}
for (i = 8; i < 256; ++i) {
a[i] = a[i-4] * a[i-8];
}
We would be able to vectorize about 200 more loops (in many cases the cost model
instructs us no to) in the test suite now. Results on x86-64 are a wash.
I have seen one degradation in ammp. Interestingly, the function in which we
now vectorize a loop is never executed so we probably see some instruction
cache effects. There is a 2% improvement in h264ref. There is one or the other
TSCV loop kernel that speeds up.
radar://13681598"
llvm-svn: 184724
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We are creating the runtime checks using this set so we need a deterministic
iteration order.
llvm-svn: 184723
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This adds instruction patterns to cover the generic forms of
the conditional branch instructions. This allows the assembler
to support the generic mnemonics.
The compiler will still generate the various specific forms
of the instruction that were already supported.
llvm-svn: 184722
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There is currently only limited support for the "absolute" variants
of branch instructions. This patch adds support for the absolute
variants of all branches that are currently otherwise supported.
This requires adding new fixup types so that the correct variant
of relocation type can be selected by the object writer.
While the compiler will continue to usually choose the relative
branch variants, this will allow the asm parser to fully support
the absolute branches, with either immediate (numerical) or
symbolic target addresses.
No change in code generation intended.
llvm-svn: 184721
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This adds support for the bd(n)zl and bd(n)zlrl instructions.
The patterns are currently used for the asm parser only.
llvm-svn: 184720
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This patch adds support for the conditional variants of bl.
The pattern is currently used by the asm parser only.
llvm-svn: 184719
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This patch adds support for blrl and its conditional variants.
The patterns are (currently) used for the asm parser only.
llvm-svn: 184718
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llvm-svn: 184717
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definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
llvm-svn: 184716
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llvm-svn: 184715
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values are computed correctly.
llvm-svn: 184714
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{inf,-inf,NaN,-NaN}.
llvm-svn: 184713
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of them.
llvm-svn: 184712
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only access the significand of FiniteNonZero/NaN floats.
The method significandParts() is a helper method meant to ease access to
APFloat's significand by allowing the user to not need to be aware of whether or
not the APFloat is using memory allocated in the instance itself or in an
external array.
This assert says that one can only access the significand of FiniteNonZero/NaN
floats. This makes it cumbersome and more importantly dangerous when one wishes
to zero out the significand of a zero/infinity value since one will have to deal
with the aforementioned quandary related to how the memory in APFloat is
allocated.
llvm-svn: 184711
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what APFloat is actually using said macro for.
In the context of APFloat, seeing a macro called convolve suggests that APFloat
is using said value in some sort of convolution somewhere in the source code.
This is misleading.
I also added a documentation comment to the macro.
llvm-svn: 184710
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llvm-svn: 184709
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atexit.
llvm-svn: 184708
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When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.
llvm-svn: 184707
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llvm-svn: 184706
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Sorry for the unit test churn. I'll try to make the change permanently
next time.
llvm-svn: 184705
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llvm-svn: 184704
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In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8.
However the disassembler should not use this alias.
llvm-svn: 184703
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mask == 0 -> UNPRED
llvm-svn: 184702
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llvm-svn: 184701
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Also clean up LSan code, fix some comments and replace void* with uptr
to bring down the number of reinterpret_casts.
llvm-svn: 184700
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