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| author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-24 09:14:54 +0000 |
|---|---|---|
| committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-24 09:14:54 +0000 |
| commit | 8175bda3dbbadc3d5c831342dd817d62be926355 (patch) | |
| tree | c0ee684610bfb7d84d19b2d6a25a9326852cce36 | |
| parent | 5a1e0af83865667cd3381cb4a13c08176c15f7d3 (diff) | |
| download | bcm5719-llvm-8175bda3dbbadc3d5c831342dd817d62be926355.tar.gz bcm5719-llvm-8175bda3dbbadc3d5c831342dd817d62be926355.zip | |
ARM: rGPR is meant to be unpredictable, not undefined
llvm-svn: 184706
3 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index bc874f4b46a..6aaf4c06b3c 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -916,8 +916,11 @@ static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { - if (RegNo == 13 || RegNo == 15) return MCDisassembler::Fail; - return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); + DecodeStatus S = MCDisassembler::Success; + if (RegNo == 13 || RegNo == 15) + S = MCDisassembler::SoftFail; + Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); + return S; } static const uint16_t SPRDecoderTable[] = { diff --git a/llvm/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt b/llvm/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt index 4df5309b136..0fb14de84ac 100644 --- a/llvm/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt +++ b/llvm/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 2>&1 | grep "invalid instruction encoding" +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 2>&1 | grep "potentially undefined" # Opcode=1930 Name=t2LDRD_PRE Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/llvm/test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt b/llvm/test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt index 64ba3685cd9..f969b3a509e 100644 --- a/llvm/test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt +++ b/llvm/test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt @@ -1,5 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 2>&1 | grep "invalid instruction encoding" -# XFAIL: * +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 2>&1 | grep "potentially undefined" # Opcode=2124 Name=t2STRD_PRE Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 |
