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* [Hexagon] Adding V4 logic-logic instructions and tests.Colin LeMahieu2015-01-052-0/+81
| | | | llvm-svn: 225198
* [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions.Colin LeMahieu2015-01-053-0/+63
| | | | llvm-svn: 225197
* Fix lit for builds under /optFrancisco Lopes da Silva2015-01-051-2/+2
| | | | llvm-svn: 225196
* Fix about 20 tests on Windows.Zachary Turner2015-01-051-2/+5
| | | | | | | | | | Passing the argument string from dosep to dotest was failing on Windows due to the fact that Windows uses \ for its path separator. As a result, shlex.split() was treating it as an escape character. This fixes the issue by telling shlex.split() to not use posix mode when running on Windows. llvm-svn: 225195
* Fix some formatting I messed up in r225187.Dan Albert2015-01-051-1/+1
| | | | llvm-svn: 225194
* Make sure x7 and x8 are treated as argument registers for arm64.Greg Clayton2015-01-051-2/+2
| | | | llvm-svn: 225193
* [PowerPC] Remove zexts after i32 ctlzHal Finkel2015-01-053-5/+31
| | | | | | | | | The 64-bit semantics of cntlzw are not special, the 32-bit population count is stored as a 64-bit value in the range [0,32]. As a result, it is always zero extended, and it can be added to the PPCISelDAGToDAG peephole optimization as a frontier instruction for the removal of unnecessary zero extensions. llvm-svn: 225192
* Make this test a bit stricter.Rafael Espindola2015-01-051-7/+7
| | | | | | | The first function is named __cxx_global_var_init, which is a substring of the following functions @__cxx_global_var_init(1,2,3,etc). llvm-svn: 225191
* Disable warnings in this test.Rafael Espindola2015-01-051-4/+4
| | | | | | This makes it a lot easier to read the output from FileCheck when it fails. llvm-svn: 225190
* [PowerPC] Remove zexts after byte-swapping loadsHal Finkel2015-01-053-0/+46
| | | | | | | | | lhbrx and lwbrx not only load their data with byte swapping, but also clear the upper 32 bits (at least). As a result, they can be added to the PPCISelDAGToDAG peephole optimization as frontier instructions for the removal of unnecessary zero extensions. llvm-svn: 225189
* [Hexagon] Adding round reg/imm and bitsplit instructions.Colin LeMahieu2015-01-054-0/+29
| | | | llvm-svn: 225188
* Make the Unwinder -Werror clean.Dan Albert2015-01-055-95/+110
| | | | | | | Mostly just format string fixes. Tested clean on arm, x86, and x86_64 Linux. llvm-svn: 225187
* SymbolRewriter: use iplist::spliceSaleem Abdulrasool2015-01-051-1/+1
| | | | | | | | The swap implementation for iplist is currently unsupported. Simply splice the old list into place, which achieves the same purpose. This is needed in order to thread the -frewrite-map-file frontend option correctly. NFC. llvm-svn: 225186
* SymbolRewriter: 80-columnSaleem Abdulrasool2015-01-051-2/+4
| | | | | | Wrap a couple of lines. NFC. llvm-svn: 225185
* fix cross compilation to 32 bit arm targetsVince Harron2015-01-051-1/+1
| | | | llvm-svn: 225184
* [AArch64] Improve codegen of store lane instructions by avoiding GPR usage.Ahmed Bougacha2015-01-052-6/+106
| | | | | | | | | | | | | | | | | | | | We used to generate code similar to: umov.b w8, v0[2] strb w8, [x0, x1] because the STR*ro* patterns were preferred to ST1*. Instead, we can avoid going through GPRs, and generate: add x8, x0, x1 st1.b { v0 }[2], [x8] This patch increases the ST1* AddedComplexity to achieve that. rdar://16372710 Differential Revision: http://reviews.llvm.org/D6202 llvm-svn: 225183
* Fix clash of gcc toolchains in driver regression tests.Samuel Antao2015-01-057-1/+156
| | | | | | For some regression tests the path to the right toolchain is specified using the -sysroot switch. However, if clang was configured with a custom gcc toolchain (either by using GCC_INSTALL_PREFIX in cmake or the equivalent configure command), the path to the custom gcc toolchain path takes precedence to the one specified by sysroot. This causes several regression tests to fail as they will be using an unexpected path. This patch fixes this issue by adding --gcc-toolchain='' to all tests that rely on that. The empty string causes the driver to pick the path from sysroot instead. llvm-svn: 225182
* [AArch64] Improve codegen of store lane 0 instructions by directly storing ↵Ahmed Bougacha2015-01-052-0/+119
| | | | | | | | | | | | | | | | | | | | | | | the subregister. For 0-lane stores, we used to generate code similar to: fmov w8, s0 str w8, [x0, x1, lsl #2] instead of: str s0, [x0, x1, lsl #2] To correct that: for store lane 0 patterns, directly match to STR <subreg>0. Byte-sized instructions don't have the special case for a 0 index, because FPR8s are defined to have untyped content. rdar://16372710 Differential Revision: http://reviews.llvm.org/D6772 llvm-svn: 225181
* Fix dangling pointer in isDerivedFrom.Samuel Benzaquen2015-01-051-3/+3
| | | | | | | | | | | | | | | | Summary: Replace usage of StringRef with std::string in AST_MATCHER* generated matchers to make sure they keep their own copy of the string. The value could be a temporary and it causes the pointer to be dangling by the time the matcher is executed. Reviewers: klimek Subscribers: klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D6843 llvm-svn: 225180
* llvm/test/lit.cfg: have_ld_plugin_support(): Use decode() for stdout.NAKAMURA Takumi2015-01-051-1/+1
| | | | llvm-svn: 225171
* clang/CMakeLists.txt: Introduce LLVM_SHLIB_OUTPUT_INTDIR also here, or ↵NAKAMURA Takumi2015-01-051-0/+6
| | | | | | plugins tests might fail. llvm-svn: 225170
* Select lower fsub,fabs pattern to fabd on AArch64Karthik Bhat2015-01-052-0/+81
| | | | | | | | | | | | This patch lowers patterns such as- fsub v0.4s, v0.4s, v1.4s fabs v0.4s, v0.4s to fabd v0.4s, v0.4s, v1.4s on AArch64. Review: http://reviews.llvm.org/D6791 llvm-svn: 225169
* Fix formatting. NFC.Rafael Espindola2015-01-051-6/+3
| | | | llvm-svn: 225168
* Parse Tag_compatibility correctly.Charlie Turner2015-01-054-6/+12
| | | | | | | | Tag_compatibility takes two arguments, but before this patch it would erroneously accept just one, it now produces an error in that case. Change-Id: I530f918587620d0d5dfebf639944d6083871ef7d llvm-svn: 225167
* Emit the build attribute Tag_conformance.Charlie Turner2015-01-056-6/+40
| | | | | | | | | | | Claim conformance to version 2.09 of the ARM ABI. This build attribute must be emitted first amongst the build attributes when written to an object file. This is to simplify conformance detection by consumers. Change-Id: If9eddcfc416bc9ad6e5cc8cdcb05d0031af7657e llvm-svn: 225166
* Select lower sub,abs pattern to sabd on AArch64Karthik Bhat2015-01-052-0/+128
| | | | | | | | | | | | This patch lowers patterns such as- sub v0.4s, v0.4s, v1.4s abs v0.4s, v0.4s to sabd v0.4s, v0.4s, v1.4s on AArch64. Review: http://reviews.llvm.org/D6781 llvm-svn: 225165
* Fix broken test from r225159.Michael Kuperstein2015-01-051-1/+1
| | | | llvm-svn: 225164
* [PM] Don't run the machinery of invalidating all the analysis passesChandler Carruth2015-01-054-4/+27
| | | | | | | | | | | | | | | | | | | when all are being preserved. We want to short-circuit this for a couple of reasons. One, I don't really want passes to grow a dependency on actually receiving their invalidate call when they've been preserved. I'm thinking about removing this entirely. But more importantly, preserving everything is likely to be the common case in a lot of scenarios, and it would be really good to bypass all of the invalidation and preservation machinery there. Avoiding calling N opaque functions to try to invalidate things that are by definition still valid seems important. =] This wasn't really inpsired by much other than seeing the spam in the logging for analyses, but it seems better ot get it checked in rather than forgetting about it. llvm-svn: 225163
* [PM] Add names and debug logging for analysis passes to the new passChandler Carruth2015-01-058-4/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | manager. This starts to allow us to test analyses more easily, but it's really only the beginning. Some of the code here is still untestable without manual changes to create analysis passes, but I wanted to factor it into a small of chunks as possible. Next up in order to be able to test things are, in no particular order: - No-op analyses passes so we don't have to use real ones to exercise the pass maneger itself. - Automatic way of generating dummy passes that require an analysis be run, including a variant that calls a 'print' method on a pass to make it even easier to print out the results of an analysis. - Dummy passes that invalidate all analyses for their IR unit so we can test invalidation and re-runs. - Automatic way to print each analysis pass as it is re-run. - Automatic but optional verification of analysis passes everywhere possible. I'm not claiming I'll get to all of these immediately, but that's what is in the pipeline at some stage. I'm fleshing out exactly what I need and what to prioritize by working on converting analyses and then trying to test the conversion. =] llvm-svn: 225162
* clang-format: [Java] Fix incorrect detection of cast.Daniel Jasper2015-01-052-0/+6
| | | | | | | | | | | | | | After: return (a instanceof List<?>) ? aaaaaaaaaaaaaaaaaaaaaaa( aaaaaaaaaaaaaaaaaaaaa) : aaaaaaaaaaaaaaaaaaaaaaa; After: return (a instanceof List<?>) ? aaaaaaaaaaaaaaaaaaaaaaa(aaaaaaaaaaaaaaaaaaaaa) : aaaaaaaaaaaaaaaaaaaaaaa; llvm-svn: 225161
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-0516-56/+38
| | | | | | into the assert. llvm-svn: 225160
* Fixed a bug in memory dependence checking module of loop vectorization. The ↵Jiangning Liu2015-01-052-48/+83
| | | | | | | | | | | | | | | | | | | | | following loop should not be vectorized with current algorithm. {code} // loop body ... = a[i] (1) ... = a[i+1] (2) ....... a[i+1] = .... (3) a[i] = ... (4) {code} The algorithm tries to collect memory access candidates from AliasSetTracker, and then check memory dependences one another. The memory accesses are unique in AliasSetTracker, and a single memory access in AliasSetTracker may map to multiple entries in AccessAnalysis, which could cover both 'read' and 'write'. Originally the algorithm only checked 'write' entry in Accesses if only 'write' exists. This is incorrect and the consequence is it ignored all read access, and finally some RAW and WAR dependence are missed. For the case given above, if we ignore two reads, the dependence between (1) and (3) would not be able to be captured, and finally this loop will be incorrectly vectorized. The fix simply inserts a new loop to find all entries in Accesses. Since it will skip most of all other memory accesses by checking the Value pointer at the very beginning of the loop, it should not increase compile-time visibly. llvm-svn: 225159
* Convert SmallMapVector from a class to a struct.Michael Gottesman2015-01-051-5/+3
| | | | llvm-svn: 225158
* [X86] Remove the predicates from the register forms of the 2-byte inc and ↵Craig Topper2015-01-052-44/+24
| | | | | | dec instructions. Remove the 32-bit mode only versions that existed for the disassembler. Move the patterns out of the instructions so they can still be qualified with predicates. llvm-svn: 225157
* [X86] Simplify code a little by just summing flags instead of conditionally ↵Craig Topper2015-01-051-18/+7
| | | | | | incrementing. NFC llvm-svn: 225156
* [X86] Remove unnecessary redeclaration of a variable with the same ↵Craig Topper2015-01-051-1/+0
| | | | | | assignment as the beginning of the function. NFC. llvm-svn: 225155
* [X86] Remove a strange fixme referring to a hack that doesn't seem to exist ↵Craig Topper2015-01-051-3/+0
| | | | | | since the code is in a comment. Can't figure out what the body of the 'if' was supposed to be anyway. llvm-svn: 225154
* [x86] Reduce text duplication for similar operand class declarations in ↵Craig Topper2015-01-051-268/+178
| | | | | | tablegen instruction info. No functional change intended. llvm-svn: 225153
* [X86] Fix the immediate size to match the address size in the operand types ↵Craig Topper2015-01-051-7/+7
| | | | | | for the move to/from absolute memory instructions. llvm-svn: 225152
* [X86] Remove unused operand type from disassembler handling. NFCCraig Topper2015-01-051-1/+0
| | | | llvm-svn: 225151
* [PowerPC] Enable speculation of cttz/ctlzHal Finkel2015-01-052-0/+49
| | | | | | | | PPC has an instruction for ctlz with defined zero behavior, and our lowering of cttz (provided by DAGCombine) is also efficient and branchless, so speculating these makes sense. llvm-svn: 225150
* [SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, anChandler Carruth2015-01-052-11/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | assert out of the new pre-splitting in SROA. This fix makes the code do what was originally intended -- when we have a store of a load both dealing in the same alloca, we force them to both be pre-split with identical offsets. This is really quite hard to do because we can keep discovering problems as we go along. We have to track every load over the current alloca which for any resaon becomes invalid for pre-splitting, and go back to remove all stores of those loads. I've included a couple of test cases derived from PR22093 that cover the different ways this can happen. While that PR only really triggered the first of these two, its the same fundamental issue. The other challenge here is documented in a FIXME now. We end up being quite a bit more aggressive for pre-splitting when loads and stores don't refer to the same alloca. This aggressiveness comes at the cost of introducing potentially redundant loads. It isn't clear that this is the right balance. It might be considerably better to require that we only do pre-splitting when we can presplit every load and store involved in the entire operation. That would give more consistent if conservative results. Unfortunately, it requires a non-trivial change to the actual pre-splitting operation in order to correctly handle cases where we end up pre-splitting stores out-of-order. And it isn't 100% clear that this is the right direction, although I'm starting to suspect that it is. llvm-svn: 225149
* [LangRef] Correct a typoHal Finkel2015-01-051-2/+2
| | | | llvm-svn: 225148
* [PowerPC] Materialize i64 constants using rotation with maskingHal Finkel2015-01-053-33/+78
| | | | | | | | | r225135 added the ability to materialize i64 constants using rotations in order to reduce the instruction count. Sometimes we can use a rotation only with some extra masking, so that we take advantage of the fact that generating a bunch of extra higher-order 1 bits is easy using li/lis. llvm-svn: 225147
* [PM] Cleanup a place where I forgot to update the header guards whenChandler Carruth2015-01-051-2/+2
| | | | | | | | renaming a file from AssumptionTracker.h to AssumptionCache.h. Thanks to Philip Reames for noticing and pointing it out in code review! llvm-svn: 225146
* [PM] Switch the new pass manager to use a reference-based API for IRChandler Carruth2015-01-0515-141/+140
| | | | | | | | | | | | | | | | | | | | | units. This was debated back and forth a bunch, but using references is now clearly cleaner. Of all the code written using pointers thus far, in only one place did it really make more sense to have a pointer. In most cases, this just removes immediate dereferencing from the code. I think it is much better to get errors on null IR units earlier, potentially at compile time, than to delay it. Most notably, the legacy pass manager uses references for its routines and so as more and more code works with both, the use of pointers was likely to become really annoying. I noticed this when I ported the domtree analysis over and wrote the entire thing with references only to have it fail to compile. =/ It seemed better to switch now than to delay. We can, of course, revisit this is we learn that references are really problematic in the API. llvm-svn: 225145
* [PM] Wire up support for explicitly running the verifier pass.Chandler Carruth2015-01-052-0/+22
| | | | | | | | The required functionality has been there for some time, but I never managed to actually wire it into the command line registry of passes. Let's do that. llvm-svn: 225144
* [PM] Cleanup a const_cast and other machinery left over in this codeChandler Carruth2015-01-041-2/+1
| | | | | | | | | from before I removed thet non-const use of the function. The unused variable that held the const_cast was already kindly removed by Michael. llvm-svn: 225143
* clang-format: [Java] Fix incorrect recognition of annonymous classes.Daniel Jasper2015-01-042-2/+8
| | | | | | | | | | | | | | | | Before: someFunction(new Runnable() { public void run() { System.out.println(42); } }); After: someFunction(new Runnable() { public void run() { System.out.println(42); } }); llvm-svn: 225142
* clang-format: [Java] Change a few flags for Google's Java style.Daniel Jasper2015-01-041-0/+4
| | | | | | No tests added as all of these are already tested separately. llvm-svn: 225141
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