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* [PPC32] Support PLT calls for -msecure-plt -fpicFangrui Song2019-06-255-45/+65
| | | | | | | | | | | | | | | | | | | | Summary: In Secure PLT ABI, -fpic is similar to -fPIC. The differences are that: * -fpic stores the address of _GLOBAL_OFFSET_TABLE_ in r30, while -fPIC stores .got2+0x8000. * -fpic uses an addend of 0 for R_PPC_PLTREL24, while -fPIC uses 0x8000. Reviewers: hfinkel, jhibbits, joerg, nemanjai, spetrovic Reviewed By: jhibbits Subscribers: adalava, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63563 llvm-svn: 364324
* [ARM] Fix for DLS/LE CodeGenSam Parker2019-06-253-76/+57
| | | | | | | | | The expensive buildbots highlighted the mir tests were broken, which I've now updated and added --verify-machineinstrs to them. This also uncovered a couple of bugs in the backend pass, so these have also been fixed. llvm-svn: 364323
* Improve zero-size allocation with safe_malloc, etc.Xing Xue2019-06-251-3/+21
| | | | | | | | | | | | | | | | | | | | | Summary: The current implementations of the memory allocation functions mistake a nullptr returned from std::malloc, std::calloc, or std::realloc as a failure. The behaviour for each of std::malloc, std::calloc, and std::realloc when the size is 0 is implementation defined (ISO/IEC 9899:2018 7.22.3), and may return a nullptr. This patch checks if space requested is zero when a nullptr is returned, retry requesting non-zero if it is. Authored By: andusy Reviewers: hubert.reinterpretcast, xingxue, jasonliu Reviewed By: hubert.reinterpretcast, xingxue, abrachet Subscribers: abrachet, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63668 llvm-svn: 364322
* Revert r362743 "Revert "Revert "Reland D61583 [ELF] Error on relocations to ↵Hans Wennborg2019-06-2512-150/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STT_SECTION symbols if the sections were discarded""" (In effect, reverting "[ELF] Error on relocations to STT_SECTION symbols if the sections were discarded".) It caused debug info problems in LibreOffice [1] and Chromium/V8 [2]. Reverting until those can be fixed. It also reverts r362497 "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table" which was landed as a follow-up to the above. > With -r or --emit-relocs, we warn `STT_SECTION symbol should be defined` > on relocations to discarded section symbol. This was added as an error > in rLLD319404, but was not so effective before D61583 (it turned the > error to a warning). > > Relocations from .eh_frame .debug* .zdebug* .gcc_except_table to > discarded .text are very common and somewhat expected. Don't warn/error > on them. As a reference, ld.bfd has a similar logic in > _bfd_elf_default_action_discarded() to allow these cases. > > Delete invalid-undef-section-symbol.test because what it intended to > check is now covered by the updated comdat-discarded-reloc.s > > Delete relocatable-eh-frame.s because we allow relocations from > .eh_frame as a special case now. And finally it reverts r362218 "[ELF] Replace a dead test in getSymVA() with assert()" as that also depended on the main change reverted here. > Symbols relative to discarded comdat sections are Undefined instead of > Defined now (after D59649 and D61583). The `== &InputSection::Discarded` > test becomes dead. I cannot find a test related to this behavior. [1] http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190603/659848.html [2] https://bugs.chromium.org/p/chromium/issues/detail?id=978067 llvm-svn: 364321
* [SLPVectorizer] Precommit of supernode.ll test for D63661Simon Pilgrim2019-06-251-0/+327
| | | | | | | | | | This is a pre-commit of the tests introduced by the SuperNode SLP patch D63661. Committed on behalf of @vporpo (Vasileios Porpodas) Differential Revision: https://reviews.llvm.org/D63664 llvm-svn: 364320
* [SDAG] expand ctpop != 1Sanjay Patel2019-06-252-32/+17
| | | | | | | | | | | | | | | | | Change the generic ctpop expansion to more efficiently handle a check for not-a-power-of-two value: (ctpop x) != 1 --> (x == 0) || ((x & x-1) != 0) This is the inverted predicate sibling pattern that was added with: D63004 This should have been done before I changed IR canonicalization to favor this form with: rL364246 ...so if this requires revert/changing, the earlier commit may also need to modified. llvm-svn: 364319
* [AMDGPU] Null checking on TS to avoid crashing in clang tests.Michael Liao2019-06-251-1/+2
| | | | | | | - `test/Misc/backend-resource-limit-diagnostics.cl` crashes as null streamer is used. llvm-svn: 364318
* Options: Correctly check for missing argumentsPavel Labath2019-06-251-3/+5
| | | | | | | | | | | | | | | | | Relying on the value of optind for detecting missing arguments is unreliable because its value after a failed parse is an implementation detail. A more correct way to achieve this is to pass ':' at the beginning of option string, which tells getopt to return ':' for missing arguments. For this to work, I also had to add a nullptr at the end of the argv vector, as some getopt implementations did not work without that. This is also an implementation detail, as getopt should normally be called with argc+argc "as to main function" (i.e. null-terminated). Thanks to Michał Górny for testing this patch out on NetBSD. llvm-svn: 364317
* AMDGPU/GlobalISel: Fix broken testMatt Arsenault2019-06-251-3/+3
| | | | llvm-svn: 364316
* [clang-tidy] Update documentation for Qt Creator integration.Nikolai Kosjar2019-06-251-2/+4
| | | | | | | | | | Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63763 llvm-svn: 364315
* [AArch64][x86] add tests for ctpop != 1; NFCSanjay Patel2019-06-252-0/+74
| | | | | | This is the inverted predicate pattern for D63004. llvm-svn: 364314
* [X86] lowerShuffleAsSpecificZeroOrAnyExtend - add ANY_EXTEND TODO.Simon Pilgrim2019-06-251-0/+1
| | | | | | lowerShuffleAsSpecificZeroOrAnyExtend should be able to lower to ANY_EXTEND_VECTOR_INREG as well as ZER_EXTEND_VECTOR_INREG. llvm-svn: 364313
* [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D60692Fangrui Song2019-06-251-0/+1
| | | | llvm-svn: 364312
* [TargetLowering] SimplifyDemandedBits - add ANY_EXTEND_VECTOR_INREG supportSimon Pilgrim2019-06-252-3/+18
| | | | | | | | Add 'lowest' demanded elt -> bitcast fold to all *_EXTEND_VECTOR_INREG cases. Reapplies rL363856. llvm-svn: 364311
* Expand cloneLoopWithPreheader() to support cloning loop nestWhitney Tsang2019-06-253-20/+68
| | | | | | | | | | | | Summary: cloneLoopWithPreheader() currently only support innermost loop, and assert otherwise. Reviewers: Meinersbur, fhahn, kbarton Reviewed By: Meinersbur Subscribers: hiraditya, jsji, llvm-commits Tag: LLVM Differential Revision: https://reviews.llvm.org/D63446 llvm-svn: 364310
* AMDGPU/GlobalISel: Fix duplicated testMatt Arsenault2019-06-252-187/+0
| | | | | | | Somehow ended up with copies of the same tests in AMDGPU and AMDGPU/GlobalISel llvm-svn: 364309
* AMDGPU: Select G_SEXT/G_ZEXT/G_ANYEXTMatt Arsenault2019-06-256-5/+680
| | | | llvm-svn: 364308
* [llvm-objcopy][llvm-strip] Fix help text typo for --allow-broken-linksJames Henderson2019-06-252-2/+2
| | | | llvm-svn: 364307
* [docs][llvm-readobj] Improve llvm-readobj documentationJames Henderson2019-06-251-39/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a number of issues with the llvm-readobj documentation. The following points were raised in https://bugs.llvm.org/show_bug.cgi?id=42255, and have been fixed in this patch: 1. The description section claimed "The tool and its output is primarily designed for use in FileCheck-based tests" which is not really the case any more. 2. The documentation used single-dash long options for option names, but references in the help text to other options exclusively used double-dashes. Fixed by standardising on double-dashes for all long-form options. 3. The majority of options available and in the help text were not present in the documentation. This patch adds them. 4. Several aliases, both long and short, were missing, e.g. --relocs. Additionally, this patch improves the documentation by: 1. Splitting the options into categories based on the file format they are specific to. 2. Updating the Exit Status section to correctly mention that errors lead to a non-zero exit code. 3. Adding a See Also section referencing other similar LLVM tools. 4. Improving/correcting some of the descriptions of options that did not quite match up with what llvm-readobj does. Reviewed by: peter.smith, MaskRay, mtrent Differential Revision: https://reviews.llvm.org/D63719 llvm-svn: 364306
* [ARM] Re-enable misspelled RUN: lines in fullfp16.s.Simon Tatham2019-06-251-2/+2
| | | | | | | | rL364293 committed a couple of lines that just said "// RUN llvm-mc ..." without the all-important ':' after RUN, so those test lines weren't actually running anything. llvm-svn: 364305
* AMDGPU: Make amdgcn.s.get.waveid.in.workgroup inaccessiblememonlyMatt Arsenault2019-06-251-1/+1
| | | | | | | This should probably be readnone, even though the instruction looks like a load. llvm-svn: 364304
* [TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ↵Simon Pilgrim2019-06-253-70/+48
| | | | | | | | | | | | ANY_EXTEND_VECTOR_INREG Simplify ZERO_EXTEND_VECTOR_INREG if the extended bits are not required. Matches what we already do for ZERO_EXTEND. Reapplies rL363850 but now with legality checks added at rL364290 llvm-svn: 364303
* [SDAG] improve expansion of ctpop+setccSanjay Patel2019-06-251-11/+14
| | | | | | | | | This should not cause any visible change in output, but it's more efficient because we were producing non-canonical 'sub x, 1' and 'setcc ugt x, 0'. As mentioned in the TODO, we should also be handling the inverse predicate. llvm-svn: 364302
* Fix frame.s test dir-separator checksSimon Pilgrim2019-06-251-10/+10
| | | | | | Handle / and \ separators llvm-svn: 364301
* [ARM] Fix buildbot failure due to -Werror.Simon Tatham2019-06-251-1/+0
| | | | | | | | Including both 'case ARM_AM::uxtw' and 'default' in the getShiftOp switch caused a buildbot to fail with error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default] llvm-svn: 364300
* [TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_INREG -> ↵Simon Pilgrim2019-06-253-22/+29
| | | | | | | | | | | | ANY/ZERO_EXTEND_VECTOR_INREG Simplify SIGN_EXTEND_VECTOR_INREG if the extended bits are not required/known zero. Matches what we already do for SIGN_EXTEND. Reapplies rL363802 but now with legality checks added at rL364290 llvm-svn: 364299
* [ARM] MVE VPT BlocksSjoerd Meijer2019-06-256-4/+433
| | | | | | | | | | | | A minor iteration on the MVE VPT Block pass to enable more efficient VPT Block code generation: consecutive VPT predicated statements, predicated on the same condition, will be placed within the same VPT Block. This essentially is also an exercise to write some more tests for the next step, which should be more generic also merging instructions when they are not consecutive. Differential Revision: https://reviews.llvm.org/D63711 llvm-svn: 364298
* AMDGPU: Write LDS objects out as global symbols in code generationNicolai Haehnle2019-06-2529-102/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The symbols use the processor-specific SHN_AMDGPU_LDS section index introduced with a previous change. The linker is then expected to resolve relocations, which are also emitted. Initially disabled for HSA and PAL environments until they have caught up in terms of linker and runtime loader. Some notes: - The llvm.amdgcn.groupstaticsize intrinsics can no longer be lowered to a constant at compile times, which means some tests can no longer be applied. The current "solution" is a terrible hack, but the intrinsic isn't used by Mesa, so we can keep it for now. - We no longer know the full LDS size per kernel at compile time, which means that we can no longer generate a relevant error message at compile time. It would be possible to add a check for the size of individual variables, but ultimately the linker will have to perform the final check. Change-Id: If66dbf33fccfbf3609aefefa2558ac0850d42275 Reviewers: arsenm, rampitec, t-tye, b-sumner, jsjodin Subscribers: qcolombet, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61494 llvm-svn: 364297
* AMDGPU/MC: Add .amdgpu_lds directiveNicolai Haehnle2019-06-2512-37/+253
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The directive defines a symbol as an group/local memory (LDS) symbol. LDS symbols behave similar to common symbols for the purposes of ELF, using the processor-specific SHN_AMDGPU_LDS as section index. It is the linker and/or runtime loader's job to "instantiate" LDS symbols and resolve relocations that reference them. It is not possible to initialize LDS memory (not even zero-initialize as for .bss). We want to be able to link together objects -- starting with relocatable objects, but possible expanding to shared objects in the future -- that access LDS memory in a flexible way. LDS memory is in an address space that is entirely separate from the address space that contains the program image (code and normal data), so having program segments for it doesn't really make sense. Furthermore, we want to be able to compile multiple kernels in a compilation unit which have disjoint use of LDS memory. In that case, we may want to place LDS symbols differently for different kernels to save memory (LDS memory is very limited and physically private to each kernel invocation), so we can't simply place LDS symbols in a .lds section. Hence this solution where LDS symbols always stay undefined. Change-Id: I08cbc37a7c0c32f53f7b6123aa0afc91dbc1748f Reviewers: arsenm, rampitec, t-tye, b-sumner, jsjodin Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61493 llvm-svn: 364296
* [VectorLegalizer] ↵Simon Pilgrim2019-06-251-0/+26
| | | | | | | | | | | | ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_EXTEND_VECTOR_INREG - widen source vector The *_EXTEND_VECTOR_INREG opcodes were relaxed back around rL346784 to support source vector widths that are smaller than the output - it looks like the legalizers were never updated to account for this. This patch inserts the smaller source vector into an undef vector of the same width of the result before performing the shuffle+bitcast to correctly handle this. Part of the yak shaving to solve the crashes from rL364264 and rL364272 llvm-svn: 364295
* [ARM] Explicit lowering of half <-> double conversions.Simon Tatham2019-06-253-15/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an FP_EXTEND or FP_ROUND isel dag node converts directly between f16 and f32 when the target CPU has no instruction to do it in one go, it has to be done in two steps instead, going via f32. Previously, this was done implicitly, because all such CPUs had the storage-only implementation of f16 (i.e. the only thing you can do with one at all is to convert it to/from f32). So isel would legalize the f16 into an f32 as soon as it saw it, by inserting an fp16_to_fp node (or vice versa), and then the fp_extend would already be f32->f64 rather than f16->f64. But that technique can't support a target CPU which has full f16 support but _not_ f64, such as some variants of Arm v8.1-M. So now we provide custom lowering for FP_EXTEND and FP_ROUND, which checks support for f16 and f64 and decides on the best thing to do given the combination of flags it gets back. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60692 llvm-svn: 364294
* [ARM] Extra MVE-related testing.Simon Tatham2019-06-256-10/+179
| | | | | | | | | | | | | | | | | | | | | | This adds some extra RUN lines to existing test files, to check that things that worked in previous architecture versions haven't accidentally stopped working in 8.1-M. Also we add some new tests: a test of scalar floating point instructions that could be easily confused with the similar-looking vector ones at assembly time, a test of basic load/store/move access to the FP registers (which has to work even in integer-only MVE); and one final check of the really obvious case where turning off MVE should make sure MVE instructions really are rejected. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62682 llvm-svn: 364293
* [ARM] Add remaining miscellaneous MVE instructions.Simon Tatham2019-06-256-22/+451
| | | | | | | | | | | | | | | | | | This final batch includes the tail-predicated versions of the low-overhead loop instructions (LETP); the VPSEL instruction to select between two vector registers based on the predicate mask without having to open a VPT block; and VPNOT which complements the predicate mask in place. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62681 llvm-svn: 364292
* [ARM] Add MVE vector load/store instructions.Simon Tatham2019-06-2515-60/+4371
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the rest of the vector memory access instructions. It includes contiguous loads/stores, with an ordinary addressing mode such as [r0,#offset] (plus writeback variants); gather loads and scatter stores with a scalar base address register and a vector of offsets from it (written [r0,q1] or similar); and gather/scatters with a vector of base addresses (written [q0,#offset], again with writeback). Additionally, some of the loads can widen each loaded value into a larger vector lane, and the corresponding stores narrow them again. To implement these, we also have to add the addressing modes they need. Also, in AsmParser, the `isMem` query function now has subqueries `isGPRMem` and `isMVEMem`, according to which kind of base register is used by a given memory access operand. I've also had to add an extra check in `checkTargetMatchPredicate` in the AsmParser, without which our last-minute check of `rGPR` register operands against SP and PC was failing an assertion because Tablegen had inserted an immediate 0 in place of one of a pair of tied register operands. (This matches the way the corresponding check for `MCK_rGPR` in `validateTargetOperandClass` is guarded.) Apparently the MVE load instructions were the first to have ever triggered this assertion, but I think only because they were the first to have a combination of the usual Arm pre/post writeback system and the `rGPR` class in particular. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62680 llvm-svn: 364291
* [TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ↵Simon Pilgrim2019-06-2521-199/+207
| | | | | | | | | | ZERO/ANY_EXTEND As part of the fix for rL364264 + rL364272 - limit the *_EXTEND conversion to !TLO.LegalOperations || isOperationLegal cases. We'll improve X86 legality in future commits. llvm-svn: 364290
* [PowerPC] Emit XXSEL for vec_sel and code that has the same patternNemanja Ivanovic2019-06-252-0/+76
| | | | | | | | | | As pointed out in https://bugs.llvm.org/show_bug.cgi?id=41777 we do not emit a vector select even when the pretty much asks for one. This patch changes that. Differential revision: https://reviews.llvm.org/D61658 llvm-svn: 364289
* [ARM] DLS/LE low-overhead loop code generationSam Parker2019-06-2517-2/+1644
| | | | | | | | | | | | | | | | | Introduce three pseudo instructions to be used during DAG ISel to represent v8.1-m low-overhead loops. One maps to set_loop_iterations while loop_decrement_reg is lowered to two, so that we can separate the decrement and branching operations. The pseudo instructions are expanded pre-emission, where we can still decide whether we actually want to generate a low-overhead loop, in a new pass: ARMLowOverheadLoops. The pass currently bails, reverting to an sub, icmp and br, in the cases where a call or stack spill/restore happens between the decrement and branching instructions, or if the loop is too large. Differential Revision: https://reviews.llvm.org/D63476 llvm-svn: 364288
* [docs][llvm-cxxfilt] Write llvm-cxxfilt documentationJames Henderson2019-06-252-10/+79
| | | | | | | | | | | | | There was a stub for llvm-cxxfilt, but it didn't describe the options. Additionally, it was in markdown, which was causing issues, so as discussed in https://reviews.llvm.org/D63211, this change replaces the existing stub with an RST file. Reviewed by: MaskRay, mattd Differential Revision: https://reviews.llvm.org/D63722 llvm-svn: 364287
* [Codegen] TargetLowering::SimplifySetCC(): omit urem when possibleRoman Lebedev2019-06-252-14/+14
| | | | | | | | | | | | | | | | | | | | | | Summary: This addresses the regression that is being exposed by D50222 in `test/CodeGen/X86/jump_sign.ll` The missing fold, at least partially, looks trivial: https://rise4fun.com/Alive/Zsln i.e. if we are comparing with zero, and comparing the `urem`-by-non-power-of-two, and the `urem` is of something that may at most have a single bit set (or no bits set at all), the `urem` is not needed. Reviewers: RKSimon, craig.topper, xbolva00, spatel Reviewed By: xbolva00, spatel Subscribers: xbolva00, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63390 llvm-svn: 364286
* Port r363962 to COFF: Deduplicate undefined symbol diagnosticsNico Weber2019-06-254-11/+116
| | | | | | | | | | | | | | | | | | lld/coff already deduplicated undefined symbols on a TU level: It would group all references to a symbol from a single TU. This makes it so that references from all TUs to a single symbol are grouped together. Since lld/coff almost did what I thought it did already, the patch is much smaller than the elf version. The only not local change is that getSymbolLocations() now returns a vector<string> instead of a string, so that the undefined symbol reporting code can know how many references to a symbol exist in a given TU. Fixes PR42260 for lld/coff. Differential Revision: https://reviews.llvm.org/D63646 llvm-svn: 364285
* [clangd] Fix NestedNameSpecifierLoc in SelectionTreeSam McCall2019-06-252-3/+9
| | | | | | | | | | | | Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63708 llvm-svn: 364284
* [clangd] Narrow rename to local symbols.Haojian Wu2019-06-256-9/+185
| | | | | | | | | | | | | | | | | | | Summary: Previously, we performed rename for all kinds of symbols (local, global). This patch narrows the scope by only renaming symbols not being used outside of the main file (with index asisitance). Renaming global symbols is not supported at the moment (return an error). Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63426 llvm-svn: 364283
* [yaml2obj/obj2yaml] - Allow having the symbols and sections with duplicated ↵George Rimar2019-06-256-40/+499
| | | | | | | | | | | | names. The patch teaches yaml2obj/obj2yaml to support parsing/dumping the sections and symbols with the same name. A special suffix is added to a name to make it unique. Differential revision: https://reviews.llvm.org/D63596 llvm-svn: 364282
* [ExpandMemCmp] Move all options to TargetTransformInfo.Clement Courbet2019-06-2511-101/+79
| | | | | | Split off from D60318. llvm-svn: 364281
* [clangd] Cleanup the duplicated getTokenRange.Haojian Wu2019-06-253-38/+48
| | | | | | | | | | | | | | | | Summary: Also lift it to SourceCode.h, so that it can be used in other places (semantic code highlighting). Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63714 llvm-svn: 364280
* [ASTImporter] Store import errors for DeclsGabor Marton2019-06-256-23/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We add a new member which is a mapping from the already-imported declarations in the "from" context to the error status of the import of that declaration. This map contains only the declarations that were not correctly imported. The same declaration may or may not be included in ImportedDecls. This map is updated continuously during imports and never cleared (like ImportedDecls). In Import(Decl*) we use this mapping, so if there was a previous failed import we return with the existing error. We add/remove from the Lookuptable in consistency with ImportedFromDecls. When we map a decl in the 'to' context to something in the 'from' context then and only then we add it to the lookup table. When we remove a mapping then and only then we remove it from the lookup table. This patch is the first in a series of patches whose aim is to further strengthen the error handling in ASTImporter. Reviewers: a_sidorin, a.sidorin, shafik Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62373 llvm-svn: 364279
* [NFC] fix trivial typos in documentsHiroshi Inoue2019-06-252-2/+2
| | | | llvm-svn: 364278
* Add llvm-symbolizer to LLVM_TOOLCHAIN_TOOLS (PR40152)Hans Wennborg2019-06-251-0/+1
| | | | | | So that it gets installed in LLVM_INSTALL_TOOLCHAIN_ONLY builds. llvm-svn: 364277
* Remove core loading timeoutPavel Labath2019-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If target.preload-symbols is false, waiting for the process to "stop" can take an arbitrarily long amount of time, because it will cause all the debug info to be parsed (to compute the stop message showing the function, its arguments, etc). We were previously waiting for 10 seconds for the stop even to arrive, which is a pretty long time, but it's not that hard to overcome with huge debug info. Since any arbitrary limit can be theoretically overcome with huge debug_info and/or slow machine, and the stop even was sent 3 lines above the wait, if we ever do not receive the stop even means we've got a bug in lldb. Therefore, I remove the timeout on this wait completely. No test because I don't know how to reproduce this without a multi-gigabyte symbol file. Reviewers: jingham, clayborg Subscribers: aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D63730 llvm-svn: 364276
* [LLVM-C] Add LLVM-C.dll to Windows installer packageHans Wennborg2019-06-251-1/+3
| | | | | | | | | | | | This is a follow up to D56781, D56774 and D35077 to makes the LLVM-C.dll file and LLVM-C.lib be installed on Windows, just like LTO.dll and LTO.lib are. Patch by Jakob Bornecrantz! Differential revision: https://reviews.llvm.org/D63717 llvm-svn: 364275
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