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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-25 13:57:53 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-25 13:57:53 +0000 |
| commit | f4e51dd2cd5bcc101533fa84700a0afb7ae911ff (patch) | |
| tree | 9ee1df367269f1188cd72521e1c72eaea2ea2ad4 | |
| parent | 181f252d53731da9040946b7af7e920dd16d3c03 (diff) | |
| download | bcm5719-llvm-f4e51dd2cd5bcc101533fa84700a0afb7ae911ff.tar.gz bcm5719-llvm-f4e51dd2cd5bcc101533fa84700a0afb7ae911ff.zip | |
AMDGPU/GlobalISel: Fix broken test
llvm-svn: 364316
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir index 133d51297c2..3fde1f04a8c 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir @@ -1,6 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefixes=GCN %s -# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' -o /dev/null %s 2>&1 | FileCheck -check-prefixes=ERR %s +# XUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' -o /dev/null %s 2>&1 | FileCheck -check-prefixes=ERR %s # G_IMPLICIT_DEF should probably never be produced for scc. Make sure there's no crash. # ERR: remark: <unknown>:0:0: cannot select: %0:scc(s1) = G_IMPLICIT_DEF (in function: implicit_def_s1_scc) @@ -183,8 +183,8 @@ regBankSelected: true body: | bb.0: ; GCN-LABEL: name: implicit_def_s1_scc - ; GCN: [[DEF:%[0-9]+]]:scc(s1) = G_IMPLICIT_DEF - ; GCN: S_ENDPGM 0, implicit [[DEF]](s1) + ; GCN: [[DEF:%[0-9]+]]:sreg_32_xm0 = IMPLICIT_DEF + ; GCN: S_ENDPGM 0, implicit [[DEF]] %0:scc(s1) = G_IMPLICIT_DEF S_ENDPGM 0, implicit %0 ... |
