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* AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelaneMatt Arsenault2019-07-012-5/+156
| | | | llvm-svn: 364808
* AMDGPU/GlobalISel: Fail instead of assert when selecting loadsMatt Arsenault2019-07-011-5/+11
| | | | llvm-svn: 364807
* AMDGPU/GlobalISel: Complete implementation of G_GEPMatt Arsenault2019-07-016-83/+463
| | | | | | | | Also works around tablegen defect in selecting add with unused carry, but if we have to manually select GEP, might as well handle add manually. llvm-svn: 364806
* AMDGPU/GlobalISel: Select G_PHIMatt Arsenault2019-07-014-0/+457
| | | | llvm-svn: 364805
* AMDGPU/GlobalISel: Try to select VOP3 form of addMatt Arsenault2019-07-012-13/+46
| | | | | | | | | | | There are several things broken, but at least emit the right thing for gfx9. The import of the pattern with the unused carry out seems to not work. Needs a special class for clamp, because OperandWithDefaultOps doesn't really work. llvm-svn: 364804
* [X86] Add widenSubVector to size in bits helper. NFCI.Simon Pilgrim2019-07-011-4/+16
| | | | | | | | We can already widenSubVector to a specific type (of the same scalar type) - this variant just specifies the target vector size. This will be useful when CombineShuffleWithExtract relaxes the need to have the same scalar type for all shuffle operand subvector sources. llvm-svn: 364803
* Implement LWG2221: 'Formatted output for nullptr_t' Reviewed as: ↵Marshall Clow2019-07-013-1/+13
| | | | | | https://reviews.llvm.org/D63053 llvm-svn: 364802
* AMDGPU/GlobalISel: RegBankSelect for readlane/readfirstlaneMatt Arsenault2019-07-014-0/+185
| | | | llvm-svn: 364801
* [docs][llvm-readelf] Expand llvm-readelf documentationJames Henderson2019-07-012-0/+218
| | | | | | | | | | | | | | | | | | Previously, the llvm-readelf documentation was essentially just a list of differences to llvm-readobj. Since llvm-readelf is the more likely goto tool for many people migrating to the LLVM toolchain, it seems like it would be helpful to document all the switches in the llvm-readelf document too. This change expands the options listed accordingly. Additionally, they are unlikely to care what the differences are to llvm-readobj, since they won't be familiar with the latter as there is no GNU equivalent, so this change moves the "differences" section to llvm-readobj's documentation. Reviewed by: peter.smith Differential Revision: https://reviews.llvm.org/D63826 llvm-svn: 364800
* __threading_support: Remove (void) in favor of ().Bruce Mitchener2019-07-011-2/+2
| | | | | | | | | | | | | | Summary: This fixes a clang-tidy warning when building something that uses this file. Reviewers: mclow.lists, EricWF Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D43226 llvm-svn: 364799
* Fix -Wdouble-promotion warnings.Bruce Mitchener2019-07-012-3/+3
| | | | | | | | | | Reviewers: mclow.lists Subscribers: christof, ldionne, cfe-commits, libcxx-commits Differential Revision: https://reviews.llvm.org/D62782 llvm-svn: 364798
* AMDGPU/GlobalISel: Implement select for 32-bit G_ADDTom Stellard2019-07-013-2/+50
| | | | | | | | | | | | | | Reviewers: arsenm Reviewed By: arsenm Subscribers: hiraditya, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58804 llvm-svn: 364797
* [ARM] Fix MVE_VQxDMLxDH instruction classMikhail Maltsev2019-07-011-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: According to the ARMARM, the VQDMLADH, VQRDMLADH, VQDMLSDH and VQRDMLSDH instructions handle their results as follows: "The base variant writes the results into the lower element of each pair of elements in the destination register, whereas the exchange variant writes to the upper element in each pair". I.e., the initial content of the output register affects the result, as usual, we model this with an additional input. Also, for 32-bit variants Qd is not allowed to be the same register as Qm and Qn, we use @earlyclobber to indicate this. This patch also changes vpred_r to vpred_n because the instructions don't have an explicit 'inactive' operand. Reviewers: dmgreen, ostannard, simon_tatham Reviewed By: simon_tatham Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64007 llvm-svn: 364796
* AMDGPU/GlobalISel: Select G_BRCOND for vccMatt Arsenault2019-07-013-36/+80
| | | | llvm-svn: 364795
* [ARM] MVE: support QQPRRegClass and QQQQPRRegClassMikhail Maltsev2019-07-011-2/+3
| | | | | | | | | | | | | | | | | | | Summary: QQPRRegClass and QQQQPRRegClass are used by the interleaving/deinterleaving loads/stores to represent sequences of consecutive SIMD registers. Reviewers: ostannard, simon_tatham, dmgreen Reviewed By: simon_tatham Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64009 llvm-svn: 364794
* Update email address in CODE_OWNERSKrzysztof Parzyszek2019-07-011-1/+1
| | | | llvm-svn: 364793
* [InstCombine] (Y + ~X) + 1 --> Y - X fold (PR42459)Roman Lebedev2019-07-013-28/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: To be noted, this pattern is not unhandled by instcombine per-se, it is somehow does end up being folded when one runs opt -O3, but not if it's just -instcombine. Regardless, that fold is indirect, depends on some other folds, and is thus blind when there are extra uses. This does address the regression being exposed in D63992. https://godbolt.org/z/7DGltU https://rise4fun.com/Alive/EPO0 Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42459 | PR42459 ]] Reviewers: spatel, nikic, huihuiz Reviewed By: spatel Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63993 llvm-svn: 364792
* [InstCombine] Shift amount reassociation in bittest (PR42399)Roman Lebedev2019-07-012-108/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Given pattern: `icmp eq/ne (and ((x shift Q), (y oppositeshift K))), 0` we should move shifts to the same hand of 'and', i.e. rewrite as `icmp eq/ne (and (x shift (Q+K)), y), 0` iff `(Q+K) u< bitwidth(x)` It might be tempting to not restrict this to situations where we know we'd fold two shifts together, but i'm not sure what rules should there be to avoid endless combine loops. We pick the same shift that was originally used to shift the variable we picked to shift: https://rise4fun.com/Alive/6x1v Should fix [[ https://bugs.llvm.org/show_bug.cgi?id=42399 | PR42399]]. Reviewers: spatel, nikic, RKSimon Reviewed By: spatel Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63829 llvm-svn: 364791
* [Hexagon] Custom-lower UADDO(x, 1) and USUBO(x, 1)Krzysztof Parzyszek2019-07-013-2/+79
| | | | llvm-svn: 364790
* AMDGPU/GlobalISel: Select G_FRAME_INDEXMatt Arsenault2019-07-013-0/+57
| | | | llvm-svn: 364789
* AMDGPU/GFX10: fix scratch resource descriptorNicolai Haehnle2019-07-012-30/+39
| | | | | | | | | | | | | | | | | | | | Summary: The stride should depend on the wave size, not the hardware generation. Also, the 32_FLOAT format is 0x16, not 16; though that shouldn't be relevant. Change-Id: I088f93bf6708974d085d1c50967f119061da6dc6 Reviewers: arsenm, rampitec, mareko Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63808 llvm-svn: 364788
* AMDGPU/GlobalISel: Make s16 select legalMatt Arsenault2019-07-016-77/+253
| | | | | | | This is easy to handle and avoids legalization artifacts which are likely to obscure combines. llvm-svn: 364787
* AMDGPU/GlobalISel: Select G_BRCOND for scc conditionsMatt Arsenault2019-07-014-0/+228
| | | | llvm-svn: 364786
* [ASTImporter] Mark erroneous nodes in shared stGabor Marton2019-07-019-72/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Now we store the errors for the Decls in the "to" context too. For that, however, we have to put these errors in a shared state (among all the ASTImporter objects which handle the same "to" context but different "from" contexts). After a series of imports from different "from" TUs we have a "to" context which may have erroneous nodes in it. (Remember, the AST is immutable so there is no way to delete a node once we had created it and we realized the error later.) All these erroneous nodes are marked in ASTImporterSharedState::ImportErrors. Clients of the ASTImporter may use this as an input. E.g. the static analyzer engine may not try to analyze a function if that is marked as erroneous (it can be queried via ASTImporterSharedState::getImportDeclErrorIfAny()). Reviewers: a_sidorin, a.sidorin, shafik Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62376 llvm-svn: 364785
* AMDGPU/GlobalISel: Tolerate copies with no type setMatt Arsenault2019-07-012-3/+62
| | | | | | | isVCC has the same bug, but isn't used in a context where it can cause a problem. llvm-svn: 364784
* AMDGPU: Fix tests using the default alloca address spaceMatt Arsenault2019-07-012-14/+16
| | | | llvm-svn: 364783
* AMDGPU/GlobalISel: Select src modifiersMatt Arsenault2019-07-014-36/+234
| | | | llvm-svn: 364782
* [lldb] [Process/NetBSD] Use global enable bits for watchpointsMichal Gorny2019-07-0113-22/+2
| | | | | | | | | | | Set global enable bits (i.e. bits 1, 3, 5, 7) to enable watchpoints on NetBSD rather than the local enable bits (0, 2, 4, 6). The former are necessary for watchpoints to be correctly recognized by the NetBSD kernel. The latter cause them to be reported as trace points. Differential Revision: https://reviews.llvm.org/D63792 llvm-svn: 364781
* [lldb] [Process/NetBSD] Fix segfault when handling watchpointMichal Gorny2019-07-011-10/+21
| | | | | | | | | | | | | | | Fix the watchpoint/breakpoint code to search for matching thread entry in m_threads explicitly rather than assuming that it will be present at specified index. The previous code segfault since it wrongly assumed that the index will match LWP ID which was incorrect even for a single thread (where index was 0 and LWP ID was 1). While fixing that off-by-one error would help for this specific task, I believe it is better to be explicit in what we are searching for. Differential Revision: https://reviews.llvm.org/D63791 llvm-svn: 364780
* [lldb] [Process/NetBSD] Support reading YMM registers via PT_*XSTATEMichal Gorny2019-07-012-2/+97
| | | | | | | | | | | | | Provide a (conditional) support for the new PT_GETXSTATE and PT_SETXSTATE ptrace() requests, and use them to implement getting and setting YMM registers. The functions used for splitting and recombining YMM register data are based on matching functions in FreeBSD plugin, with some simplification and updates to match NetBSD structures. Differential Revision: https://reviews.llvm.org/D63545 llvm-svn: 364779
* Fixup r364512Diana Picus2019-07-011-10/+12
| | | | | | | | | | Fix stack-use-after-scope errors from r364512. One instance was already fixed in r364611 - this patch simplifies that fix and addresses one more instance of similar code. Discussed in: https://reviews.llvm.org/D63905 llvm-svn: 364778
* [RISCV] Avoid save-restore target feature warningSam Elliott2019-07-012-11/+5
| | | | | | | | | | | | | | | | | | | | | | | Summary: LLVM issues a warning if passed unknown target features. Neither I nor @asb noticed this until after https://reviews.llvm.org/D63498 landed. This patch stops passing the (unknown) "save-restore" target feature to the LLVM backend, but continues to emit a warning if a driver asks for `-msave-restore`. The default of assuming `-mno-save-restore` (and emitting no warnings) remains. Reviewers: asb Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, cfe-commits, asb Tags: #clang Differential Revision: https://reviews.llvm.org/D64008 llvm-svn: 364777
* Revert "[lldb] [Process/NetBSD] Fix constructor after r363707"Michal Gorny2019-07-011-1/+1
| | | | | | | Now that r364751 has been reverted, we need to revert this fixup as well. llvm-svn: 364776
* [UpdateTestChecks][PowerPC] Avoid empty string when scrubbing loop commentsJinsong Ji2019-07-012-55/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: SCRUB_LOOP_COMMENT_RE was introduced in https://reviews.llvm.org/D31285 This works for some loops. However, we may generate lines with loop comments only. And since we don't scrub leading white spaces, this will leave an empty line there, and FileCheck will complain it. eg: llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll:27:15: error: found empty check string with prefix 'CHECK:' ; CHECK-NEXT: This prevented us from using the `update_llc_test_checks.py` for quite some cases. We should still keep the comment token there, so that we can safely scrub the loop comment without breaking FileCheck. Reviewers: timshen, hfinkel, lebedev.ri, RKSimon Subscribers: nemanjai, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63957 llvm-svn: 364775
* [ASTImporter] Silence unused variable warning in Release builds. NFC.Benjamin Kramer2019-07-011-0/+1
| | | | llvm-svn: 364774
* Fix lookup of symbols at the same address with no size vs. sizeJan Kratochvil2019-07-013-2/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a failing testcase on Fedora 30 x86_64 (regression Fedora 29->30): PASS: ./bin/lldb ./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out -o 'settings set symbols.enable-external-lookup false' -o r -o bt -o quit * frame #0: 0x00007ffff7aa6e75 libc.so.6`__GI_raise + 325 frame #1: 0x00007ffff7a91895 libc.so.6`__GI_abort + 295 frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2 frame #3: 0x000000000040113a a.out`func_b at main.c:18:2 frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2 frame #5: 0x000000000040112e a.out`main(argc=<unavailable>, argv=<unavailable>) at main.c:32:2 frame #6: 0x00007ffff7a92f33 libc.so.6`__libc_start_main + 243 frame #7: 0x000000000040106e a.out`_start + 46 vs. FAIL - unrecognized abort() function: ./bin/lldb ./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out -o 'settings set symbols.enable-external-lookup false' -o r -o bt -o quit * frame #0: 0x00007ffff7aa6e75 libc.so.6`.annobin_raise.c + 325 frame #1: 0x00007ffff7a91895 libc.so.6`.annobin_loadmsgcat.c_end.unlikely + 295 frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2 frame #3: 0x000000000040113a a.out`func_b at main.c:18:2 frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2 frame #5: 0x000000000040112e a.out`main(argc=<unavailable>, argv=<unavailable>) at main.c:32:2 frame #6: 0x00007ffff7a92f33 libc.so.6`.annobin_libc_start.c + 243 frame #7: 0x000000000040106e a.out`.annobin_init.c.hot + 46 The extra ELF symbols are there due to Annobin (I did not investigate why this problem happened specifically since F-30 and not since F-28). It is due to: Symbol table '.dynsym' contains 2361 entries: Valu e Size Type Bind Vis Name 0000000000022769 5 FUNC LOCAL DEFAULT _nl_load_domain.cold 000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_abort.c.unlikely ... 000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_loadmsgcat.c_end.unlikely ... 000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_textdomain.c_end.unlikely 000000000002276e 548 FUNC GLOBAL DEFAULT abort 000000000002276e 548 FUNC GLOBAL DEFAULT abort@@GLIBC_2.2.5 000000000002276e 548 FUNC LOCAL DEFAULT __GI_abort 0000000000022992 0 NOTYPE LOCAL HIDDEN .annobin_abort.c_end.unlikely Differential Revision: https://reviews.llvm.org/D63540 llvm-svn: 364773
* [NFC][InstCombine] Better commutative tests for "shift amount reassociation ↵Roman Lebedev2019-07-011-30/+144
| | | | | | | | | | | | in bittest" pattern. As discussed in https://reviews.llvm.org/D63829 *if* *both* shifts are one-use, we'd most likely want to produce `lshr`, and not rely on ordering. Also, there should likely be a *separate* fold to do this reordering. llvm-svn: 364772
* [ASTImporter] Mark erroneous nodes in from ctxGabor Marton2019-07-013-22/+351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: During import of a specific Decl D, it may happen that some AST nodes had already been created before we recognize an error. In this case we signal back the error to the caller, but the "to" context remains polluted with those nodes which had been created. Ideally, those nodes should not had been created, but that time we did not know about the error, the error happened later. Since the AST is immutable (most of the cases we can't remove existing nodes) we choose to mark these nodes as erroneous. Here are the steps of the algorithm: 1) We keep track of the nodes which we visit during the import of D: See ImportPathTy. 2) If a Decl is already imported and it is already on the import path (we have a cycle) then we copy/store the relevant part of the import path. We store these cycles for each Decl. 3) When we recognize an error during the import of D then we set up this error to all Decls in the stored cycles for D and we clear the stored cycles. Reviewers: a_sidorin, a.sidorin, shafik Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62375 llvm-svn: 364771
* [Hexagon] Rework VLCR algorithmKrzysztof Parzyszek2019-07-012-59/+243
| | | | | | | | Add code to catch pattern for commutative instructions for VLCR. Patch by Suyog Sarda. llvm-svn: 364770
* AMDGPU: Convert some places to RegisterMatt Arsenault2019-07-012-9/+10
| | | | llvm-svn: 364769
* AMDGPU/GlobalISel: Fix RegBankSelect for G_FCANONICALIZEMatt Arsenault2019-07-012-0/+36
| | | | llvm-svn: 364768
* AMDGPU/GlobalISel: Fix RegBankSelect for G_BUILD_VECTORMatt Arsenault2019-07-012-1/+71
| | | | llvm-svn: 364767
* AMDGPU/GlobalISel: Fail on store to 32-bit address spaceMatt Arsenault2019-07-012-3/+9
| | | | llvm-svn: 364766
* AMDGPU/GlobalISel: Improve icmp selection coverage.Matt Arsenault2019-07-013-13/+633
| | | | | | Select s64 eq/ne scalar icmp. llvm-svn: 364765
* [NFC][InstCombine] Improve test coverage for ((~x) + y) + 1 -> y - x fold ↵Roman Lebedev2019-07-011-6/+46
| | | | | | | | fold (PR42459) So we indeed to have this fold, but only if +1 is not the last operation.. llvm-svn: 364764
* AMDGPU/GlobalISel: RegBankSelect for WWM/WQMMatt Arsenault2019-07-013-0/+64
| | | | llvm-svn: 364763
* AMDGPU/GlobalISel: Use vcc reg bank for amdgcn.wqm.voteMatt Arsenault2019-07-012-6/+6
| | | | llvm-svn: 364762
* AMDGPU/GlobalISel: Fix scc->vcc copy handlingMatt Arsenault2019-07-013-39/+111
| | | | | | | | | | | | | This was checking the size of the register with the value of the size, which happens to be exec. Also fix assuming VCC is 64-bit to fix wave32. Also remove some untested handling for physical registers which is skipped. This doesn't insert the V_CNDMASK_B32 if SCC is the physical copy source. I'm not sure if this should be trying to handle this special case instead of dealing with this in copyPhysReg. llvm-svn: 364761
* AMDGPU/GlobalISel: Use and instead of BFE with inline immediateMatt Arsenault2019-07-014-10/+148
| | | | | | | Zext from s1 is the only case where this should do anything with the current legal extensions. llvm-svn: 364760
* GlobalISel: Add GINodeEquiv for min/maxMatt Arsenault2019-07-015-0/+336
| | | | llvm-svn: 364759
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