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* Revert "[LV] Apply sink-after & interleave-groups as VPlan transformations ↵Benjamin Kramer2019-11-046-171/+125
| | | | | | (NFC)" This reverts commit 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b. Fails ASAN.
* [ARM] More MVE shuffle tests for sequences that can be converted to VMOVS. NFC.David Green2019-11-041-0/+664
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* [ARM] Add vrev32 NEON fp16 patternsDavid Green2019-11-042-44/+215
| | | | | | | Fill in the gaps for vrev32.16 f16 patterns, extending the existing i16 patterns. Differential Revision: https://reviews.llvm.org/D69508
* [InstSimplify] use FMF to improve fcmp+select foldSanjay Patel2019-11-042-31/+18
| | | | | This is part of a series of patches needed to solve PR39535: https://bugs.llvm.org/show_bug.cgi?id=39535
* [InstSimplify] add more tests for fcmp+select; NFCSanjay Patel2019-11-041-8/+36
| | | | | | The easy code fix won't catch non-canonical mismatched constant patterns, so adding extra coverage for those in case we decide that's important (but seems unlikely).
* [OpenCL] Fix address space for const method call from nonconst (PR43145)Sven van Haastregt2019-11-042-1/+15
| | | | | | Patch by Anastasia Stulova and Sven van Haastregt. Differential Revision: https://reviews.llvm.org/D68781
* [SystemZ] Add GHC calling conventionUlrich Weigand2019-11-0412-0/+261
| | | | | | | This is a special calling convention to be used by the GHC compiler. Author: Stefan Schulze Frielinghaus Differential Revision: https://reviews.llvm.org/D69024
* [InstSimplify] add more tests for fcmp+select; NFCSanjay Patel2019-11-041-0/+156
| | | | | The addition of FMF for select allows more folding for these kinds of patterns.
* [llvm-readobj] Change errors to warnings for symbol section name dumpingJames Henderson2019-11-046-39/+249
| | | | | | | | | | | | | | | Also only print each such warning once. LLVM-style output will now print "<?>" for sections it cannot identify, e.g. because the section index is invalid. GNU output continues to print the raw index. In both cases where the st_shndx value is SHN_XINDEX and the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g. because it is missing), the symbol is printed like other symbols with st_shndx >= SHN_LORESERVE. Reviewed by: grimar, MaskRay Differential Revision: https://reviews.llvm.org/D69671
* [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using ↵Simon Pilgrim2019-11-045-254/+273
| | | | | | | | | | DemandedElts mask (REAPPLIED) If we don't demand all elements, then attempt to combine to a simpler shuffle. At the moment we can only do this if Depth == 0 as combineX86ShufflesRecursively uses Depth to track whether the shuffle has really changed or not - we'll need to change this before we can properly start merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts (see D66004). This reapplies rL368307 (reverted at rL369167) after the fix for the infinite loop reported at PR43024 was applied at rG3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3
* [FIX] Removed duplicated v4f16 and v8f16 declarationsDiogo Sampaio2019-11-041-10/+10
| | | | | | | | | | | | Reviewers: RKSimon, ostannard Reviewed By: RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69795
* [RISCV] Implement the TargetLowering::getRegisterByName hookLuís Marques2019-11-045-0/+110
| | | | | | | | | | | | | | | Summary: The hook should work for any RISC-V register. Non-allocatable registers do not need to be reserved, for the remaining the hook will only succeed if you pass clang the -ffixed-xX flag. This builds upon D67185, which currently only allows reserving GPRs. Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D69130
* [hwasan] Remove lazy thread-initialisationDavid Spickett2019-11-045-83/+28
| | | | | | | | | | | | | | | | | | | | | This was an experiment made possible by a non-standard feature of the Android dynamic loader. It required introducing a flag to tell the compiler which ABI was being targeted. This flag is no longer needed, since the generated code now works for both ABI's. We leave that flag untouched for backwards compatibility. This also means that if we need to distinguish between targeted ABI's again we can do that without disturbing any existing workflows. We leave a comment in the source code and mention in the help text to explain this for any confused person reading the code in the future. Patch by Matthew Malcomson Differential Revision: https://reviews.llvm.org/D69574
* [lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKindRaphael Isemann2019-11-041-1/+0
| | | | Ocaml support was removed.
* [lldb][NFC] Remove unused ExpressionParser::ParseRaphael Isemann2019-11-043-16/+5
| | | | | | | | | | | | | | | Summary: This function is only used internally by ClangExpressionParser. By putting it in the ExpressionParser class all languages that implement ExpressionParser::Parse have to share the same signature (which forces us in downstream to add swift-specific arguments to ExpressionParser::Parse which then propagate to ClangExpressionParser and so on). Reviewers: davide Subscribers: JDevlieghere, lldb-commits Tags: #upstreaming_lldb_s_downstream_patches, #lldb Differential Revision: https://reviews.llvm.org/D69710
* [SystemZ] Improve handling of huge PC relative immediate offsets.Jonas Paulsson2019-11-044-13/+77
| | | | | | | | | | | | | | | Demand that an immediate offset to a PC relative address fits in 32 bits, or else load it into a register and perform a separate add. Verify in the assembler that such immediate offsets fit the bitwidth. Even though the final address of a Load Address Relative Long may fit in 32 bits even with a >32 bit offset (depending on where the symbol lives relative to PC), the GNU toolchain demands the offset by itself to be in range. This patch adapts the same behavior for llvm. Review: Ulrich Weigand https://reviews.llvm.org/D69749
* [LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)Gil Rapaport2019-11-046-125/+171
| | | | | | | | | | The sink-after and interleave-group vectorization decisions were so far applied to VPlan during initial VPlan construction, which complicates VPlan construction – also because of their inter-dependence. This patch refactors buildVPlanWithRecipes() to construct a simpler initial VPlan and later apply both these vectorization decisions, in order, as VPlan-to-VPlan transformations. Differential Revision: https://reviews.llvm.org/D68577
* [lldb][NFC] Make test/python_api/module_section test smallerRaphael Isemann2019-11-041-132/+2
| | | | | | | | | | | | | | | | Summary: I don't see why this test needs to compile this rather complicated file for just testing module sections. This just removes all this code with a simple "Hello world!" program which should be faster to compile Reviewers: labath, davide, JDevlieghere Reviewed By: JDevlieghere Subscribers: jfb, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D69705
* [lldb] Also disable de-registration of EHFrames in IRExecutionUnitRaphael Isemann2019-11-041-0/+2
| | | | | | | | | | | | | | | | | Summary: We disabled registration by providing an empty `registerEHFrames`, so we should also provide an empty `deregisterEHFrames` in case that function relies on `registerEHFrames` being called before. Currently `deregisterEHFrames` is a no-op anyway as it just iterates over the (empty( list of registered EHFrames and then clear the empty list. Reviewers: davide, JDevlieghere Reviewed By: JDevlieghere Subscribers: JDevlieghere, lldb-commits Tags: #upstreaming_lldb_s_downstream_patches, #lldb Differential Revision: https://reviews.llvm.org/D69713
* [lldb] Provide a getter for m_materializer_up in LLVMUserExpression instead ↵Raphael Isemann2019-11-043-2/+8
| | | | | | | | | | | | | | | | | | of relying on it being accessible. Summary: Motivated by Swift using the materializer in a few places which requires us to add this getter ourselves. We also need a setter, but let's keep this minimal to unblock the downstream reverts in Swift. Reviewers: davide Reviewed By: davide Subscribers: abidh, JDevlieghere, lldb-commits Tags: #upstreaming_lldb_s_downstream_patches, #lldb Differential Revision: https://reviews.llvm.org/D69714
* [lldb] Add trailing dots to comments in Value.cppRaphael Isemann2019-11-041-2/+2
| | | | | | | | | | | | Reviewers: JDevlieghere Reviewed By: JDevlieghere Subscribers: JDevlieghere, lldb-commits Tags: #upstreaming_lldb_s_downstream_patches, #lldb Differential Revision: https://reviews.llvm.org/D69717
* Set the floating point status register as reservedPengfei Wang2019-11-032-1/+4
| | | | | | | | | | | | | | | | | | | | Summary: This patch sets the FPSW (X87 floating-point status register) as a reserved physical register and fix the test failure caused by [[ https://reviews.llvm.org/D68854| D68854 ]]. Before this patch, some tests will fail because it implicit uses FPSW without define it. Setting the FPSW as a reserved physical register will skip liveness analysis because it is always live. Reviewers: pengfei, craig.topper Reviewed By: craig.topper Subscribers: craig.topper, hiraditya, llvm-commits Patch by LiuChen. Differential Revision: https://reviews.llvm.org/D69784
* clang/Modules: Sink CompilerInstance::KnownModules into ModuleMapDuncan P. N. Exon Smith2019-11-033-25/+30
| | | | | | | | | | | | Avoid use-after-frees when FrontendAction::BeginSourceFile is called twice on the same CompilerInstance by sinking CompilerInstance::KnownModules into ModuleMap. On the way, rename the map to CachedModuleLoads. I considered (but rejected) merging this with ModuleMap::Modules, since that only has top-level modules and this map includes submodules. This is an alternative to https://reviews.llvm.org/D58497. Thanks to nemanjai for the detailed analysis of the problem!
* [compiler-rt] [msan] Correct the __libc_thr_keycreate prototypeKamil Rytarowski2019-11-041-2/+3
| | | | Fixes build with GCC8.
* [compiler-rt] [msan] Support POSIX iconv(3) on NetBSD 9.99.17+Kamil Rytarowski2019-11-041-1/+10
| | | | Fixes build of test.
* [mips] Move test case for Octeon instructions to cnmips sub-folder. NFCSimon Atanasyan2019-11-041-0/+0
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* [mips] Add disassembler tests for `octeon` CPU. NFCSimon Atanasyan2019-11-042-0/+62
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* [mips] Add disassembler tests for `sigrie` instruction. NFCSimon Atanasyan2019-11-044-0/+4
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* [X86][SSE] combineX86ShufflesRecursively - at Depth==0, only resolve ↵Simon Pilgrim2019-11-032-6/+93
| | | | | | | | KnownZero if it removes an input. This stops infinite loops where KnownUndef elements are converted to Zeroable, resulting in KnownZero elements which are then simplified (via SimplifyDemandedElts etc.) back to KnownUndef elements........ Prep fix for PR43024 which will allow rL368307 to be re-applied.
* [SIMachineScheduler] Fixed ''then' statement is equivalent to the 'else' ↵Dávid Bolvanský2019-11-031-6/+1
| | | | statement.' warning. NFCI.
* [SILoadStoreOptimizer] Fixed typo. NFCI.Dávid Bolvanský2019-11-031-1/+1
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* Reland '[InstructionCombining] Fixed null check after dereferencing warning. ↵Dávid Bolvanský2019-11-031-2/+5
| | | | NFCI.'
* Revert "[InstructionCombining] Fixed null check after dereferencing warning. ↵Dávid Bolvanský2019-11-031-1/+0
| | | | | | NFCI." This reverts commit 8308187fd9bfa08ffad0a636d4dd1d25e7de5a76. This exposed a bug.
* [SCEV] Fixed 'Uninitialized variable 'ContainsAddRec' used.' warning. NFCI.Dávid Bolvanský2019-11-031-1/+1
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* [MemorySSA] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-0/+1
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* Revert "[InstructionCompares] Fixed null check after dereferencing warning. ↵Dávid Bolvanský2019-11-031-1/+0
| | | | | | NFCI." This reverts commit b8685cf3042f6a2e129061922bd6b18e3c42258e.
* [InstructionCompares] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-0/+1
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* [InstructionCombining] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-0/+1
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* [CHR] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-1/+1
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* [LoopUnrollRuntime] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-2/+2
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* [LoopUnrollAndJam] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-1/+3
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* [BitcodeReader] Fixed use after move warnings. NFCI.Dávid Bolvanský2019-11-031-10/+0
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* [BitcodeReader] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-1/+1
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* [BitcodeReader] Fixed null pointer dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-0/+1
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* [SelectionDAG] Fixed null check after dereferencing warning. NFCI.Dávid Bolvanský2019-11-031-1/+1
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* [opaque pointer types] Add element type argument to IRBuilder ↵Craig Topper2019-11-034-13/+11
| | | | | | | | | | | | | | | | | | | | CreatePreserveStructAccessIndex and CreatePreserveArrayAccessIndex Summary: These were the only remaining users of the GetElementPtrInst::getGEPReturnType method that gets the element type from the pointer type. Remove that method since its now dead. Reviewers: jyknight, t.p.northover, arsenm Reviewed By: arsenm Subscribers: wdng, arsenm, arphaman, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69756
* gn build: (manually) merge 3a399c09 / add76dd3cNico Weber2019-11-031-2/+0
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* [X86][SSE] combineX86ShufflesRecursively - don't bother merging shuffles ↵Simon Pilgrim2019-11-031-92/+105
| | | | | | with empty roots. NFCI. This doesn't affect actual codegen, but is a minor refactor toward fixing PR43024 where we need to avoid excess changes (folding zeroables etc.) to the shuffle mask at Depth == 0.
* [X86] Convert PICStyles::Style to scoped enum class. NFCI.Simon Pilgrim2019-11-032-11/+11
| | | | Fixes MSVC static analyzer warnings about enum safety, this enum performs no integer math so it'd be better to fix its scope.
* [DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::isImplicit()Bjorn Pettersson2019-11-032-9/+102
| | | | | | | | | | | DIExpression::isImplicit() did not handle DW_OP_LLVM_fragment correctly. It was scanning the elements in the expression by iterating from the end. But we do not know the position of ops unless we iterate from the beginning of the expression, since DW_OP:s and their operands are stored flat in the expression list. The old code also assumed that a DW_OP_LLVM_fragment only occupied one element in the expression list, but it actually occupies three elements.
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