summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPengfei Wang <pengfei.wang@intel.com>2019-11-03 23:13:51 -0800
committerPengfei Wang <pengfei.wang@intel.com>2019-11-03 23:14:34 -0800
commit8d7ccb37440e11552cb4a0bb989ddee5031700a4 (patch)
tree7fbf66ee65eb11bae85b4600b66170b50b3909af
parent31e14f41a21f9016050a20f07d5da03db2e8c13e (diff)
downloadbcm5719-llvm-8d7ccb37440e11552cb4a0bb989ddee5031700a4.tar.gz
bcm5719-llvm-8d7ccb37440e11552cb4a0bb989ddee5031700a4.zip
Set the floating point status register as reserved
Summary: This patch sets the FPSW (X87 floating-point status register) as a reserved physical register and fix the test failure caused by [[ https://reviews.llvm.org/D68854| D68854 ]]. Before this patch, some tests will fail because it implicit uses FPSW without define it. Setting the FPSW as a reserved physical register will skip liveness analysis because it is always live. Reviewers: pengfei, craig.topper Reviewed By: craig.topper Subscribers: craig.topper, hiraditya, llvm-commits Patch by LiuChen. Differential Revision: https://reviews.llvm.org/D69784
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp3
-rw-r--r--llvm/test/CodeGen/X86/pr34080-2.ll2
2 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 024a13fa931..3809a14178f 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -523,6 +523,9 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
// Set the floating point control register as reserved.
Reserved.set(X86::FPCW);
+ // Set the floating point status register as reserved.
+ Reserved.set(X86::FPSW);
+
// Set the SIMD floating point control register as reserved.
Reserved.set(X86::MXCSR);
diff --git a/llvm/test/CodeGen/X86/pr34080-2.ll b/llvm/test/CodeGen/X86/pr34080-2.ll
index cb3e22d5e1b..f56c01fbcbb 100644
--- a/llvm/test/CodeGen/X86/pr34080-2.ll
+++ b/llvm/test/CodeGen/X86/pr34080-2.ll
@@ -62,13 +62,13 @@ define void @computeJD(%struct.DateTime*) nounwind {
; CHECK-NEXT: imull $60000, 24(%ebx), %ecx # imm = 0xEA60
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: fldl 28(%ebx)
+; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: sarl $31, %eax
-; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
OpenPOWER on IntegriCloud