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* llvm-cov: Explicitly namespace llvm::make_unique to keep MSVC happyJustin Bogner2014-05-071-4/+2
| | | | | | | | This is a followup to r208171, where a call to make_unique was disambiguated for MSVC. Disambiguate two more calls, and remove the comment about it since this is what we do everywhere. llvm-svn: 208219
* Use range loop.Rafael Espindola2014-05-071-3/+2
| | | | llvm-svn: 208218
* Re-satisfy the bots. Due to a de-sync between my clang and LLVM trees, I ↵James Molloy2014-05-071-1/+1
| | | | | | didn't notice that the generated BE alignment register is now unnamed and is not called '%align_be'. llvm-svn: 208217
* [ARM64-BE] Correctly deal with single element HFAs in varargs.James Molloy2014-05-072-2/+17
| | | | | | | Just because the first "if" didn't fire, doesn't mean we can not have an HFA in the "else" clause. llvm-svn: 208216
* Ignore stack-buffer-overflow in std::_Find_elem<*> / std::num_get<...>::_GetifldTimur Iskhodzhanov2014-05-071-0/+3
| | | | | | Reviewed at http://reviews.llvm.org/D3650 llvm-svn: 208215
* [InstCombine] Add optimization of redundant insertvalue instructions.Michael Zolotukhin2014-05-073-0/+62
| | | | | | rdar://problem/11861387 llvm-svn: 208214
* [mips] Add FGR_32/FGR_64/GPR_64 adjectives and use then instead of ↵Daniel Sanders2014-05-073-161/+156
| | | | | | | | | | | | | | | | | FGRPredicates/GPRPredicates Summary: No functional change (confirmed by diffing tablegen-erated files). Depends on D3642 Reviewers: vmedic, dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3645 llvm-svn: 208213
* [mips] Add INSN_<name> adverbs and start using them instead of ↵Daniel Sanders2014-05-071-6/+8
| | | | | | | | | | | | | | | | | AdditionalPredicates overrides Summary: No functional change Depends on D3641 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3642 llvm-svn: 208212
* [msan] Fix -fsanitize=memory -fno-integrated-as.Evgeniy Stepanov2014-05-072-1/+22
| | | | llvm-svn: 208211
* AArch64/ARM64: optimise vector selects & enable testTim Northover2014-05-073-1/+248
| | | | | | | | | When performing a scalar comparison that feeds into a vector select, it's actually better to do the comparison on the vector side: the scalar route would be "CMP -> CSEL -> DUP", the vector is "CM -> DUP" since the vector comparisons are all mask based. llvm-svn: 208210
* [mips] Add ISA_<name> adverbs and start using them instead of ↵Daniel Sanders2014-05-074-42/+46
| | | | | | | | | | | | | | | | | | AdditionalPredicates overrides Summary: One small functional change. The recently added PAUSE instruction now has the HasStdEnc predicate which was accidentally removed by a Requires<>. Depends on D3640 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3641 llvm-svn: 208209
* Remove superflous semicolonTobias Grosser2014-05-071-19/+17
| | | | llvm-svn: 208208
* [sanitizer] Replace a macro with a function.Evgeniy Stepanov2014-05-074-138/+138
| | | | llvm-svn: 208207
* Update for llvm api change.Rafael Espindola2014-05-071-1/+0
| | | | llvm-svn: 208206
* Remove the UseCFI option from createAsmStreamer.Rafael Espindola2014-05-0711-46/+30
| | | | | | We were already always passing true, this just removes the option. llvm-svn: 208205
* If CMake finds a python interpreter, use itEd Maste2014-05-071-4/+6
| | | | | | | | | | | | | | The FreeBSD package building cluster installs e.g. 'python2.7', but no plain 'python' to avoid version-related issues. CMake's FindPythonInterp locates an interpreter with such a name and provides it in the PYTHON_EXECUTABLE variable. Use that if it's set, falling back to the original '/usr/bin/env python' otherwise. This is a missing part of LLDB commit r207122. Patch by Brooks Davis in FreeBSD ports commit r353052 llvm-svn: 208204
* DebugInfo: Use enum instead of unsignedEd Maste2014-05-072-11/+13
| | | | | | | | This makes debuging DebugInfo generation with LLDB a little more pleasant. Differential Revision: http://reviews.llvm.org/D3626 llvm-svn: 208203
* DebugInfo: Use enum instead of unsignedEd Maste2014-05-071-1/+3
| | | | | | | | This makes debuging DebugInfo generation with LLDB a little more pleasant. Differential Revision: http://reviews.llvm.org/D3626 llvm-svn: 208202
* [mips] Continue splitting Instruction.Predicates into smaller lists and ↵Daniel Sanders2014-05-073-29/+39
| | | | | | | | | | | | | | | | | | | re-join them with !listconcat Summary: Move IsGP64bit into GPRPredicates, and IsFP64bit/NotFP64bit into FGRPredicates No functional change (confirmed by diffing tablegen-erated files). Depends on D3639 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3640 llvm-svn: 208201
* [ARM64-BE] Fix fast-isel, and add appropriate RUN lines to appropriate tests.James Molloy2014-05-074-1/+9
| | | | llvm-svn: 208200
* [ARM64-BE] Fix variable-argument saving.James Molloy2014-05-072-1/+60
| | | | llvm-svn: 208199
* [ARM64-BE] Implement the lane-twiddling logic at AAPCS boundaries for big ↵James Molloy2014-05-073-0/+1963
| | | | | | | | | | | | | | | | endian. The AAPCS states that values passed in registers must have a value as though they had been loaded with "LDR". LDR is equivalent to "LD1.64 vX.1D" - that is, loading scalars to vector registers and loading 1-element vectors is equivalent. The logic implemented here is to ensure that at all call boundaries and during formal argument lowering all vectors are treated as their bitwidth-based floating point scalar counterpart, which is always one of f64 or f128 (v2i32 -> f64, v4i32 -> f128 etc). A BITCAST is inserted so that the appropriate REV will be generated during code generation. llvm-svn: 208198
* [mips] Move IsFP64bit/NotFP64bit to the front of the AdditionalPredicates listDaniel Sanders2014-05-071-6/+6
| | | | | | | | | | | | | | Summary: This makes it easier to prove a more complicated change in the next commit is non-functional. Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3639 llvm-svn: 208197
* [sanitizer] Intercept obstack.Evgeniy Stepanov2014-05-075-1/+110
| | | | llvm-svn: 208196
* [msan] Fix __msan_check_mem_is_initialized and prettify its output.Evgeniy Stepanov2014-05-077-5/+46
| | | | llvm-svn: 208195
* [ARM64-BE] Implement the crazy bitcast handling for big endian vectors.James Molloy2014-05-072-46/+1426
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because we've canonicalised on using LD1/ST1, every time we do a bitcast between vector types we must do an equivalent lane reversal. Consider a simple memory load followed by a bitconvert then a store. v0 = load v2i32 v1 = BITCAST v2i32 v0 to v4i16 store v4i16 v2 In big endian mode every memory access has an implicit byte swap. LDR and STR do a 64-bit byte swap, whereas LD1/ST1 do a byte swap per lane - that is, they treat the vector as a sequence of elements to be byte-swapped. The two pairs of instructions are fundamentally incompatible. We've decided to use LD1/ST1 only to simplify compiler implementation. LD1/ST1 perform the equivalent of a sequence of LDR/STR + REV. This makes the original code sequence: v0 = load v2i32 v1 = REV v2i32 (implicit) v2 = BITCAST v2i32 v1 to v4i16 v3 = REV v4i16 v2 (implicit) store v4i16 v3 But this is now broken - the value stored is different to the value loaded due to lane reordering. To fix this, on every BITCAST we must perform two other REVs: v0 = load v2i32 v1 = REV v2i32 (implicit) v2 = REV v2i32 v3 = BITCAST v2i32 v2 to v4i16 v4 = REV v4i16 v5 = REV v4i16 v4 (implicit) store v4i16 v5 This means an extra two instructions, but actually in most cases the two REV instructions can be combined into one. For example: (REV64_2s (REV64_4h X)) === (REV32_4h X) There is also no 128-bit REV instruction. This must be synthesized with an EXT instruction. Most bitconverts require some sort of conversion. The only exceptions are: a) Identity conversions - vNfX <-> vNiX b) Single-lane-to-scalar - v1fX <-> fX or v1iX <-> iX Even though there are hundreds of changed lines, I have a fairly high confidence that they are somewhat correct. The changes to add two REV instructions per bitcast were pretty mechanical, and once I'd done that I threw the resulting .td at a script I wrote which combined the two REVs together (and added an EXT instruction, for f128) based on an instruction description I gave it. This was much less prone to error than doing it all manually, plus my brain would not just have melted but would have vapourised. llvm-svn: 208194
* [ARM64-BE] Predicate VLDR/VSTR for vectors as little-endian only. We must ↵James Molloy2014-05-071-95/+131
| | | | | | use LD1/ST1 on big-endian. llvm-svn: 208193
* [ARM64-BE] Make big endian (scalar) argument passing work correctly.James Molloy2014-05-076-15/+67
| | | | | | | | | | This completes the port of r204814 (cpirker "AArch64_BE function argument passing for ARM ABI") from AArch64 to ARM64, and fixes a bunch of issues found during later development along the way. The biggest of these was that the alignment fixup logic wasn't replicated into all the places it should have been. llvm-svn: 208192
* Remove unnecessary struct in return typeTobias Grosser2014-05-071-2/+2
| | | | llvm-svn: 208191
* Catch all functions containing a certain stringTobias Grosser2014-05-071-3/+4
| | | | llvm-svn: 208190
* MergeFunctions Pass, introduced total ordering among values.Stepan Dyatkovskiy2014-05-071-41/+96
| | | | | | | | | | | | | | | | | | | This is a third patch of patch series that improves MergeFunctions performance time from O(N*N) to O(N*log(N)). This patch description: Being comparing functions we need to compare values we meet at left and right sides. Its easy to sort things out for external values. It just should be the same value at left and right. But for local values (those were introduced inside function body) we have to ensure they were introduced at exactly the same place, and plays the same role. In short, patch introduces values serial numbering and comparison routine. The last one compares two values by their serial numbers. llvm-svn: 208189
* AArch64/ARM64: run test on ARM64 too.Tim Northover2014-05-071-0/+1
| | | | llvm-svn: 208188
* AArch64/ARM64: put annotation in testTim Northover2014-05-073-0/+3
| | | | | | | It makes finding already covered tests much easier with "grep -L arm64". llvm-svn: 208187
* AArch64/ARM64: disable test directory if ARM64 not presentTim Northover2014-05-071-1/+1
| | | | llvm-svn: 208186
* ARM: Fix assertion caused by passing bitfield struct using ↵Oliver Stannard2014-05-072-3/+8
| | | | | | | | | | | | ABIArgInfo::getExpandWithPadding In cases where a struct must, according to the AAPCS, not be split between general purpose and floating point registers, we use ABIArgInfo::getExpandWithPadding to add the padding arguments. However, ExpandWithPadding does not work if the struct contains bitfields, so we instead must use ABIArgInfo::getDirect. llvm-svn: 208185
* [mips] Split Instruction.Predicates into smaller lists and re-join them with ↵Daniel Sanders2014-05-077-77/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | !listconcat Summary: The overall idea is to chop the Predicates list into subsets that are usually overridden independently. This allows subclasses to partially override the predicates of their superclasses without having to re-add all the existing predicates. This patch starts the process by moving HasStdEnc into a new EncodingPredicates list and almost everything else into AdditionalPredicates. It has revealed a couple likely bugs where 'let Predicates' has removed the HasStdEnc predicate. No functional change (confirmed by diffing tablegen-erated files). Depends on D3549, D3506 Reviewers: vmedic Differential Revision: http://reviews.llvm.org/D3550 llvm-svn: 208184
* [tablegen] Add !listconcat operator with the similar semantics as !strconcatDaniel Sanders2014-05-078-4/+63
| | | | | | | | | | | | | | | | | | | | Summary: It concatenates two or more lists. In addition to the !strconcat semantics the lists must have the same element type. My overall aim is to make it easy to append to Instruction.Predicates rather than override it. This can be done by concatenating lists passed as arguments, or by concatenating lists passed in additional fields. Reviewers: dsanders Reviewed By: dsanders Subscribers: hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D3506 llvm-svn: 208183
* Replace llvm::IRBuilder with PollyIRBuilderTobias Grosser2014-05-071-3/+3
| | | | | Contributed-by: Yabin Hu <yabin.hwu@gmail.com> llvm-svn: 208182
* Remove unnecessary explicit typing in std::make_pairTobias Grosser2014-05-072-4/+3
| | | | | Contributed-by: Yabin Hu <yabin.hwu@gmail.com> llvm-svn: 208181
* Add the missing 'LoopToScev' parameterTobias Grosser2014-05-071-1/+1
| | | | | Contributed-by: Yabin Hu <yabin.hwu@gmail.com> llvm-svn: 208180
* [mips] Move HasStdEnc to the front of the predicates lists.Daniel Sanders2014-05-075-61/+61
| | | | | | | | | | | | | | | | | | Summary: This will make it easier to prove that a more complicated change in the following commit is non-functional. No functional change. Depends on D3506 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3549 llvm-svn: 208179
* Use nullptr instead of 0 for const char * value.Yaron Keren2014-05-071-5/+5
| | | | llvm-svn: 208178
* [BUG][REFACTOR]Zinovy Nis2014-05-074-43/+49
| | | | | | | | | 1) Fix for printing debug locations for absolute paths. 2) Location printing is moved into public method DebugLoc::print() to avoid re-inventing the wheel. Differential Revision: http://reviews.llvm.org/D3513 llvm-svn: 208177
* clang-format: Be slightly more aggressive on single-line functions.Daniel Jasper2014-05-072-2/+11
| | | | | | | | | | | | | | So that JS functions can also be merged into a single line. Before: var func = function() { return 1; }; After: var func = function() { return 1; }; llvm-svn: 208176
* clang-format: Fix corner cases for comments in if conditions.Daniel Jasper2014-05-073-3/+21
| | | | | | | | | | | | Before: if ( // a x + 3) { .. After: if ( // a x + 3) { .. llvm-svn: 208175
* Print stats on displayed and ignored warnings.Alexander Kornienko2014-05-078-26/+83
| | | | | | | | | | | | | | | | Summary: Also displays a hint to use -header-filter='.*' in case any warnings are in non-user code. This will help discoverability of this option. Reviewers: klimek Reviewed By: klimek Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D3621 llvm-svn: 208174
* Second patch of patch series that improves MergeFunctions performance time ↵Stepan Dyatkovskiy2014-05-071-4/+278
| | | | | | | | | | | | | | | | | from O(N*N) to O(N*log(N)). The idea is to introduce total ordering among functions set. It allows to build binary tree and perform function look-up procedure in O(log(N)) time. This patch description: Introduced total ordering among constants implemented in cmpConstants method. Method performs lexicographical comparison between constants represented as hypothetical numbers of next format: <bitcastability-trait><raw-bit-contents> Please, read cmpConstants declaration comments for more details. llvm-svn: 208173
* [asan] Include asm instrumentation source in Makefile build.Evgeniy Stepanov2014-05-071-3/+5
| | | | llvm-svn: 208172
* Work-around MSVS build breakage due to r208148Timur Iskhodzhanov2014-05-071-2/+4
| | | | llvm-svn: 208171
* Drop libgcc and default to libc++ for NetBSD/ARM on 6.99.40+.Joerg Sonnenberger2014-05-074-12/+57
| | | | | | | Don't bother with keeping the old support for x86_64 in 6.99.23+, just use a single range. Update test cases for the always-on --eh-frame-hdr. llvm-svn: 208170
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