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| author | James Molloy <james.molloy@arm.com> | 2014-05-07 12:33:55 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2014-05-07 12:33:55 +0000 |
| commit | d3c401a2d0096431b24d29a7f25b71d633230795 (patch) | |
| tree | 9b6e81bebaec8e85d591539ce4e07a6a5956edf3 | |
| parent | 36132057da7749fdef028e1d1910c8117108e63b (diff) | |
| download | bcm5719-llvm-d3c401a2d0096431b24d29a7f25b71d633230795.tar.gz bcm5719-llvm-d3c401a2d0096431b24d29a7f25b71d633230795.zip | |
[ARM64-BE] Fix fast-isel, and add appropriate RUN lines to appropriate tests.
llvm-svn: 208200
4 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64FastISel.cpp b/llvm/lib/Target/ARM64/ARM64FastISel.cpp index 1af50739099..78cde1c22c9 100644 --- a/llvm/lib/Target/ARM64/ARM64FastISel.cpp +++ b/llvm/lib/Target/ARM64/ARM64FastISel.cpp @@ -1593,6 +1593,11 @@ bool ARM64FastISel::SelectRet(const Instruction *I) { EVT RVEVT = TLI.getValueType(RV->getType()); if (!RVEVT.isSimple()) return false; + + // Vectors (of > 1 lane) in big endian need tricky handling. + if (RVEVT.isVector() && RVEVT.getVectorNumElements() > 1) + return false; + MVT RVVT = RVEVT.getSimpleVT(); if (RVVT == MVT::f128) return false; diff --git a/llvm/test/CodeGen/ARM64/big-endian-bitconverts.ll b/llvm/test/CodeGen/ARM64/big-endian-bitconverts.ll index 51ea42611c2..cb8708b9267 100644 --- a/llvm/test/CodeGen/ARM64/big-endian-bitconverts.ll +++ b/llvm/test/CodeGen/ARM64/big-endian-bitconverts.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s +; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -O1 -o - | FileCheck %s +; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -O0 -fast-isel=true -o - | FileCheck %s ; CHECK-LABEL: test_i64_f64: define void @test_i64_f64(double* %p, i64* %q) { diff --git a/llvm/test/CodeGen/ARM64/big-endian-vector-callee.ll b/llvm/test/CodeGen/ARM64/big-endian-vector-callee.ll index 9416f07a3cb..5b9ccace882 100644 --- a/llvm/test/CodeGen/ARM64/big-endian-vector-callee.ll +++ b/llvm/test/CodeGen/ARM64/big-endian-vector-callee.ll @@ -1,4 +1,5 @@ ; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s +; RUN: llc -mtriple arm64_be < %s -fast-isel=true -arm64-load-store-opt=false -o - | FileCheck %s ; CHECK-LABEL: test_i64_f64: define i64 @test_i64_f64(double %p) { diff --git a/llvm/test/CodeGen/ARM64/big-endian-vector-caller.ll b/llvm/test/CodeGen/ARM64/big-endian-vector-caller.ll index 917e64aae52..194a3213925 100644 --- a/llvm/test/CodeGen/ARM64/big-endian-vector-caller.ll +++ b/llvm/test/CodeGen/ARM64/big-endian-vector-caller.ll @@ -1,4 +1,5 @@ ; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s +; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -fast-isel=true -O0 -o - | FileCheck %s ; CHECK-LABEL: test_i64_f64: declare i64 @test_i64_f64_helper(double %p) |
