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* [llvm-exegesis] Add a Configuration object for Benchmark.Guillaume Chatelet2018-06-076-29/+43
| | | | | | | | | | | | Summary: This is the first step to have the BenchmarkRunner create and measure many different configurations (different initial values for instance). Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47826 llvm-svn: 334169
* Disable recursive interceptors in signal(3)/MSanKamil Rytarowski2018-06-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: signal(3) on NetBSD calls internally sigaction(2). Without disabling the recursive interceptor, there are false positives about uninitialized memory reads inside libc. This change fixes execution of such programs as sh(1) and vmstat(1) in the NetBSD userland. Sponsored by <The NetBSD Foundation> Reviewers: eugenis, vitalybuka, joerg Reviewed By: vitalybuka Subscribers: llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D47650 llvm-svn: 334168
* [llvm-exegesis] Improve error reporting.Guillaume Chatelet2018-06-074-43/+58
| | | | | | | | | | | | Summary: BenchmarkResult IO functions now return an Error or Expected so caller can deal take proper action. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47868 llvm-svn: 334167
* Fix a missing lambda return type that tripped the buildersPhilip Pfaffe2018-06-071-1/+1
| | | | llvm-svn: 334166
* [llvm-exegesis] Serializes instruction's operand in BenchmarkResult's key.Guillaume Chatelet2018-06-073-28/+106
| | | | | | | | | | | | Summary: Follow up patch to https://reviews.llvm.org/D47764. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47785 llvm-svn: 334165
* [X86][NFC] Fix harmless typos in BDW/ZnVer1 sched models.Clement Courbet2018-06-072-11/+11
| | | | | | See D46356 for context. llvm-svn: 334164
* [BranchFolding] Fix live-in's when hoisting codeKarl-Johan Karlsson2018-06-074-24/+69
| | | | | | | | | | | | | | | | | | | | | Summary: When the branch folder hoist code into a predecessor it adjust live-in's in the blocks it hoist code from. However it fail to handle hoisted code that contain a defed register that originally is live-in in the block through a super register. This is fixed by replacing the live-in handling code with calls to utility functions in LivePhysRegs. Reviewers: kparzysz, gberry, MatzeB, uweigand, aprantl Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47529 llvm-svn: 334163
* [clangd] Make workspace/symbols actually rank its results.Sam McCall2018-06-072-5/+52
| | | | | | | | | | | | Summary: The index doesn't actually return results in ranked order. Reviewers: hokein Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47821 llvm-svn: 334162
* [SystemZ] Build Load And Test from scratch in convertToLoadAndTest.Jonas Paulsson2018-06-071-10/+16
| | | | | | | | | | This is needed to get CC operand in right place, as expected by the SchedModel. Review: Ulrich Weigand https://reviews.llvm.org/D47820 llvm-svn: 334161
* Change return value of trivial visibility check.Richard Trieu2018-06-072-3/+24
| | | | | | | | | Previous, if no Decl's were checked, visibility was set to false. Switch it so that in cases of no Decl's, return true. These are the Decl's after being filtered. Also remove an unreachable return statement since it is directly after another return statement. llvm-svn: 334160
* [X86] Add back _mask, _maskz, and _mask3 builtins for some 512-bit ↵Craig Topper2018-06-075-617/+600
| | | | | | | | | | | | | | | | | | | | | | | fmadd/fmsub/fmaddsub/fmsubadd builtins. Summary: We recently switch to using a selects in the intrinsics header files for FMA instructions. But the 512-bit versions support flavors with rounding mode which must be an Integer Constant Expression. This has forced those intrinsics to be implemented as macros. As it stands now the mask and mask3 intrinsics evaluate one of their macro arguments twice. If that argument itself is another intrinsic macro, we can end up over expanding macros. Or if its something we can CSE later it would show up multiple times when it shouldn't. I tried adding __extension__ around the macro and making it an expression statement and declaring a local variable. But whatever name you choose for the local variable can never be used as the name of an input to the macro in user code. If that happens you would end up with the same name on the LHS and RHS of an assignment after expansion. We might be safe if we use __ in front of the variable names because those names are reserved and user code shouldn't use that, but I wasn't sure I wanted to make that claim. The other option which I've chosen here, is to add back _mask, _maskz, and _mask3 flavors of the builtin which we will expand in CGBuiltin.cpp to replicate the argument as needed and insert any fneg needed on the third operand to make a subtract. The _maskz isn't truly necessary if we have an unmasked version or if we use the masked version with a -1 mask and wrap a select around it. But I've chosen to make things more uniform. I separated out the scalar builtin handling to avoid too many things going on in EmitX86FMAExpr. It was different enough due to the extract and insert that the minor duplication of the CreateCall was probably worth it. Reviewers: tkrupa, RKSimon, spatel, GBuella Reviewed By: tkrupa Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47724 llvm-svn: 334159
* [libFuzzer] make the corpus elements aware of their data flow tracesKostya Serebryany2018-06-076-5/+72
| | | | llvm-svn: 334158
* [WebAssembly] Add --export-all flagSam Clegg2018-06-075-5/+64
| | | | | | | | | | | | | This causes all symbols to be exported in the final wasm binary even if they were not compiled with default visibility. This feature is useful for the emscripten toolchain that has a corresponding EXPORT_ALL feature which allows the JS code to interact with all C function. Differential Revision: https://reviews.llvm.org/D47806 llvm-svn: 334157
* [libFuzzer] simplify a test, hopefully to fix the botKostya Serebryany2018-06-071-2/+2
| | | | llvm-svn: 334156
* ClangTidy fix - 'clang::Sema::checkAllowedCUDAInitializer' has a definition ↵Han Shen2018-06-071-1/+1
| | | | | | with different parameter names. llvm-svn: 334155
* [COFF] report file containing unsupported relocationBob Haarman2018-06-071-4/+8
| | | | | | | | | | | | | | | | Summary: When reporting an unsupported relocation type, let's also report the file we encountered it in to aid diagnosis. Reviewers: ruiu, rnk Reviewed By: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45911 llvm-svn: 334154
* Change the wording of RTTI errors to make them more generic.Sunil Srivastava2018-06-072-4/+4
| | | | | | | | | | | | | | | | An attempt to use dynamic_cast while rtti is disabled, used to emit the error: cannot use dynamic_cast with -fno-rtti and a similar one for typeid. This patch changes that to: use of dynamic_cast requires -frtti Differential Revision: https://reviews.llvm.org/D47291 llvm-svn: 334153
* [sanitizer] Don't use internal_unlink on WindowsVitaly Buka2018-06-071-8/+12
| | | | llvm-svn: 334152
* [ODRHash] Adjust info stored for FunctionTemplateDecl.Richard Trieu2018-06-072-1/+15
| | | | | | | Avoid storing information for definitions since those can be out-of-line and vary between modules even when the declarations are the same. llvm-svn: 334151
* SpeculativeExecution Pass: Set PreserveCFG to avoid unnecessary analyses ↵Michael Zolotukhin2018-06-074-6/+2
| | | | | | | | | invalidation. The pass doesn't touch CFG in any way, only moves instructions between blocks. llvm-svn: 334150
* Add definition for ELF dynamic tag DT_SYMTAB_SHNDX.Peter Collingbourne2018-06-071-0/+2
| | | | | | | | | | | | DT_SYMTAB_SHNDX is defined in generic-abi: http://www.sco.com/developers/gabi/latest/ch5.dynamic.html Patch by Rahul Chaudhry! Differential Revision: https://reviews.llvm.org/D47803 llvm-svn: 334149
* Expand the file comment for the error handlers.Rui Ueyama2018-06-071-11/+52
| | | | | | Differential Revision: https://reviews.llvm.org/D47790 llvm-svn: 334148
* llvm-readobj: fix printing number of relocations in Android packed format.Peter Collingbourne2018-06-072-1/+11
| | | | | | | | | | | | | With '-elf-output-style=GNU -relocations', a header containing the number of entries is printed before all the relocation entries in the section. For Android packed format, we need to perform the unpacking first before we can get the actual number of relocations in the section. Patch by Rahul Chaudhry! Differential Revision: https://reviews.llvm.org/D47800 llvm-svn: 334147
* [libFuzzer] remove an experimental flag -use_feature_frequencyKostya Serebryany2018-06-065-30/+1
| | | | llvm-svn: 334146
* [Driver] Stop passing -fseh-exceptions for x86_64-windows-msvcShoaib Meenai2018-06-062-2/+9
| | | | | | | | | | | -fseh-exceptions is only meaningful for MinGW targets, and that driver already has logic to pass either -fdwarf-exceptions or -fseh-exceptions as appropriate. -fseh-exceptions is just a no-op for MSVC triples, and passing it to cc1 causes unnecessary confusion. Differential Revision: https://reviews.llvm.org/D47850 llvm-svn: 334145
* [Fuzzer] Use private libc++ even for FuchsiaPetr Hosek2018-06-061-7/+2
| | | | | | | | | | | On Fuchsia, we use libc++ compiled with ASan for our ASan built executable which means we cannot use the same libc++ for libFuzzer when building fuzz targets, instead we'll link a custom internal libc++ into Fuchsia's build of libFuzzer like we already do on Linux. Differential Revision: https://reviews.llvm.org/D47835 llvm-svn: 334144
* [CUDA] Check initializers of instantiated template variables.Artem Belevich2018-06-065-52/+85
| | | | | | | | | We were already performing checks on non-template variables, but the checks on templated ones were missing. Differential Revision: https://reviews.llvm.org/D45231 llvm-svn: 334143
* [AMDGPU] Improve reciprocal handlingStanislav Mekhanoshin2018-06-062-7/+472
| | | | | | | | | | | | | | | | | | | | | | | When denormals are supported we are producing a full division for 1.0f / x. That still can be replaced by the faster version: bool c = fabs(x) > 0x1.0p+96f; float s = c ? 0x1.0p-32f : 1.0f; x *= s; return s * v_rcp_f32(x) in case if requested accuracy is 2.5ulp or less. The same version is used if denormals are not supported for non 1.0 numerators, where just v_rcp_f32 is then used for 1.0 numerator. The optimization of 1/x is extended to the case -1/x, which is the same except for the resulting sign bit. OpenCL conformance passed with both enabled and disabled denorms. Differential Revision: https://reviews.llvm.org/D47805 llvm-svn: 334142
* [ThinLTO/lld] Document constant bool ModuleSummaryIndex parameter (NFC)Teresa Johnson2018-06-061-1/+1
| | | | | | Makes this consistent with other ModuleSummaryIndex constructor calls. llvm-svn: 334141
* [ThinLTO] Rename index IsAnalysis flag to HaveGVs (NFC)Teresa Johnson2018-06-069-41/+42
| | | | | | | | | With the upcoming patch to add summary parsing support, IsAnalysis would be true in contexts where we are not performing module summary analysis. Rename to the more specific and approprate HaveGVs, which is essentially what this flag is indicating. llvm-svn: 334140
* [CMake] Passthrough additional flags to custom libcxx CMake buildPetr Hosek2018-06-062-11/+28
| | | | | | | | This is needed when we're cross-compiling compiler-rt. Differential Revision: https://reviews.llvm.org/D47834 llvm-svn: 334139
* [sanitizer] Replace deprecated mktemp with mkstempVitaly Buka2018-06-061-1/+1
| | | | llvm-svn: 334138
* [InstCombine] fold another shifty abs pattern to cmp+sel (PR36036)Sanjay Patel2018-06-063-13/+32
| | | | | | | | | | | | | | | | | | | | | | The bug report: https://bugs.llvm.org/show_bug.cgi?id=36036 ...requests a DAG change for this, but an IR canonicalization probably handles most cases. If we still want to match this pattern in the backend, there's a proposal for that too: D47831 Alive proofs including nsw/nuw cases that were first noted in: D46988 https://rise4fun.com/Alive/Kmp This patch is largely copied from the existing code that was initially added with: D40984 ...but I didn't see much gain from trying to share code. llvm-svn: 334137
* [CMake] Pass additional CMake tools to external projectsPetr Hosek2018-06-062-4/+24
| | | | | | | | | This is needed when the external projects try to use other tools besides just the compiler and the linker. Differential Revision: https://reviews.llvm.org/D47833 llvm-svn: 334136
* Correct aligment computation for shared object symbols.Han Shen2018-06-067-7/+93
| | | | | | | | | | The original computation for shared object symbol alignment is wrong when st_value equals 0. It is very unusual for dso symbols to have st_value equal 0. But when it happens, it causes obscure run time bugs. Differential Revision: https://reviews.llvm.org/D47602 llvm-svn: 334135
* [OpTree] Introduce shortcut for computing the def->target mapping. NFCI.Michael Kruse2018-06-063-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the schedule has not changed and the operand tree root uses a value defined in an ancestor loop, the def-to-target mapping is trivial. For instance, the SCoP for (int i < 0; i < N; i+=1) { DefStmt: D = ...; for (int j < 0; j < N; j+=1) { TargetStmt: use(D); } } has DefStmt-to-TargetStmt mapping of { DefStmt[i] -> TargetStmt[i,j] } This should apply on the majority of def-to-target mappings. This patch detects this case and directly constructs the expected mapping. It assumes that the mapping never crosses the loop header DefStmt is in, which ForwardOpTree does not support at the moment anyway. Differential Revision: https://reviews.llvm.org/D47752 llvm-svn: 334134
* [InstCombine] add tests for another abs() pattern (PR36036); NFCSanjay Patel2018-06-061-0/+56
| | | | llvm-svn: 334133
* AMDGPU: Custom lower v2f16 fneg/fabs with illegal f16Matt Arsenault2018-06-065-38/+97
| | | | | | | | | | | | Fixes terrible code on targets without f16 support. The legalization creates a mess that is difficult to recover from. Also should avoid randomly breaking these tests multiple times in sequence in future commits. Some regressions in cases where it happens to be better to pull the source modifier after the conversion. llvm-svn: 334132
* [llvm-strip] Expose --discard-all optionAlexander Shaposhnikov2018-06-063-3/+26
| | | | | | | | | | Expose objcopy's --discard-all option in llvm-strip. Test plan: make check-all Differential revision: https://reviews.llvm.org/D47750 llvm-svn: 334131
* [sanitizer] Cleanup ReadFileToVector and ReadFileToBufferVitaly Buka2018-06-065-45/+109
| | | | | | | | | | | | | | | Summary: Added unit-test. Fixed behavior of max_len argument. Call read syscall with all available buffer, not just a page. Reviewers: eugenis Subscribers: kubamracek, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D46618 llvm-svn: 334130
* Remove an unrelated file accidentally submitted as part of r334095.Rui Ueyama2018-06-061-5797/+0
| | | | llvm-svn: 334129
* [HIP] Fix unbundlingYaxun Liu2018-06-062-4/+28
| | | | | | | | | | | | | | | | | | | | HIP uses clang-offload-bundler to bundle intermediate files for host and different gpu archs together. When a file is unbundled, clang-offload-bundler should be called only once, and the objects for host and different gpu archs should be passed to the next jobs. This is because Driver maintains CachedResults which maps triple-arch string to output files for each job. This patch fixes a bug in Driver::BuildJobsForActionNoCache which uses incorrect key for CachedResults for HIP which causes clang-offload-bundler being called mutiple times and incorrect output files being used. It only affects HIP. Differential Revision: https://reviews.llvm.org/D47555 llvm-svn: 334128
* [InstCombine] PR37603: low bit mask canonicalizationRoman Lebedev2018-06-063-42/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is [[ https://bugs.llvm.org/show_bug.cgi?id=37603 | PR37603 ]]. https://godbolt.org/g/VCMNpS https://rise4fun.com/Alive/idM When doing bit manipulations, it is quite common to calculate some bit mask, and apply it to some value via `and`. The typical C code looks like: ``` int mask_signed_add(int nbits) { return (1 << nbits) - 1; } ``` which is translated into (with `-O3`) ``` define dso_local i32 @mask_signed_add(int)(i32) local_unnamed_addr #0 { %2 = shl i32 1, %0 %3 = add nsw i32 %2, -1 ret i32 %3 } ``` But there is a second, less readable variant: ``` int mask_signed_xor(int nbits) { return ~(-(1 << nbits)); } ``` which is translated into (with `-O3`) ``` define dso_local i32 @mask_signed_xor(int)(i32) local_unnamed_addr #0 { %2 = shl i32 -1, %0 %3 = xor i32 %2, -1 ret i32 %3 } ``` Since we created such a mask, it is quite likely that we will use it in `and` next. And then we may get rid of `not` op by folding into `andn`. But now that i have actually looked: https://godbolt.org/g/VTUDmU _some_ backend changes will be needed too. We clearly loose `bzhi` recognition. Reviewers: spatel, craig.topper, RKSimon Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47428 llvm-svn: 334127
* [InstCombine][NFC] PR37603: low bit mask canonicalization testsRoman Lebedev2018-06-061-0/+316
| | | | | | Differential Revision: https://reviews.llvm.org/D47427 llvm-svn: 334126
* [X86] Emit BZHI when mask is ~(-1 << nbits))Roman Lebedev2018-06-062-113/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In D47428, i propose to choose the `~(-(1 << nbits))` as the canonical form of low-bit-mask formation. As it is seen from these tests, there is a reason for that. AArch64 currently better handles `~(-(1 << nbits))`, but not the more traditional `(1 << nbits) - 1` (sic!). The other way around for X86. It would be much better to canonicalize. This patch is completely monkey-typing. I don't really understand how this works :) I have based it on `// x & (-1 >> (32 - y))` pattern. Also, when we only have `BMI`, i wonder if we could use `BEXTR` with `start=0` ? Related links: https://bugs.llvm.org/show_bug.cgi?id=36419 https://bugs.llvm.org/show_bug.cgi?id=37603 https://bugs.llvm.org/show_bug.cgi?id=37610 https://rise4fun.com/Alive/idM Reviewers: craig.topper, spatel, RKSimon, javed.absar Reviewed By: craig.topper Subscribers: kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D47453 llvm-svn: 334125
* [NFC][X86][AArch64] Reorganize/cleanup BZHI test patternsRoman Lebedev2018-06-063-653/+3135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In D47428, i propose to choose the `~(-(1 << nbits))` as the canonical form of low-bit-mask formation. As it is seen from these tests, there is a reason for that. AArch64 currently better handles `~(-(1 << nbits))`, but not the more traditional `(1 << nbits) - 1` (sic!). The other way around for X86. It would be much better to canonicalize. It would seem that there is too much tests, but this is most of all the auto-generated possible variants of C code that one would expect for BZHI to be formed, and then manually cleaned up a bit. So this should be pretty representable, which somewhat good coverage... Related links: https://bugs.llvm.org/show_bug.cgi?id=36419 https://bugs.llvm.org/show_bug.cgi?id=37603 https://bugs.llvm.org/show_bug.cgi?id=37610 https://rise4fun.com/Alive/idM Reviewers: javed.absar, craig.topper, RKSimon, spatel Reviewed By: RKSimon Subscribers: kristof.beyls, llvm-commits, RKSimon, craig.topper, spatel Differential Revision: https://reviews.llvm.org/D47452 llvm-svn: 334124
* [Hexagon] Implement vector-pair zero as V6_vsubw_dvKrzysztof Parzyszek2018-06-064-4/+58
| | | | llvm-svn: 334123
* Fix MSVC 'not all control paths return a value' warning. NFCI.Simon Pilgrim2018-06-061-0/+1
| | | | llvm-svn: 334122
* [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 ↵Craig Topper2018-06-062-1/+4
| | | | | | | | | | are used as the index. These encodings correspond to the cases in the normal encoding scheme where there is no index and our modrm reading code initially decodes it as such. The VSIB handling code tried to compensate for this, but failed to add the base needed to make later code do the right thing. Fixes PR37712. llvm-svn: 334121
* [X86] Rename vy512mem->vy512xmem and vz256xmem->vz256mem.Craig Topper2018-06-063-18/+18
| | | | | | | | | | | The index size is represented by the letter after the 'v'. The number represents the memory size. If an 'x' appears after the number its means the index register can be from VR128X/VR256X instead of VR128/VR256. As vy512mem uses a VR256X index it should have an x. And vz256mem uses a VR512 index so it shouldn't have an x. I admit these names kind of suck and are confusing. llvm-svn: 334120
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