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authorClement Courbet <courbet@google.com>2018-06-07 07:37:49 +0000
committerClement Courbet <courbet@google.com>2018-06-07 07:37:49 +0000
commit9212ef0a0a9a9787bcf578fc9f00cdfb52bd4ff0 (patch)
tree566bde5c16685d4d552b6a683e0d388d7be0d887
parentabb11f805f3a2297a3968c5daf625cd882ca0fb3 (diff)
downloadbcm5719-llvm-9212ef0a0a9a9787bcf578fc9f00cdfb52bd4ff0.tar.gz
bcm5719-llvm-9212ef0a0a9a9787bcf578fc9f00cdfb52bd4ff0.zip
[X86][NFC] Fix harmless typos in BDW/ZnVer1 sched models.
See D46356 for context. llvm-svn: 334164
-rwxr-xr-xllvm/lib/Target/X86/X86SchedBroadwell.td2
-rw-r--r--llvm/lib/Target/X86/X86ScheduleZnver1.td20
2 files changed, 11 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index 1e5a6e3bb7d..27bbf147c68 100755
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -152,7 +152,7 @@ defm : BWWriteResPair<WriteBZHI, [BWPort15], 1>;
defm : X86WriteRes<WriteLoad, [BWPort23], 5, [1], 1>;
defm : X86WriteRes<WriteStore, [BWPort237, BWPort4], 1, [1,1], 1>;
defm : X86WriteRes<WriteStoreNT, [BWPort237, BWPort4], 1, [1,1], 2>;
-defm : X86WriteRes<WriteMove, [BWPort0156], 1, [1,1], 1>;
+defm : X86WriteRes<WriteMove, [BWPort0156], 1, [1], 1>;
// Idioms that clear a register, like xorps %xmm0, %xmm0.
// These can often bypass execution ports completely.
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
index 4450bf6b114..5ba22a85efb 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -197,12 +197,12 @@ defm : X86WriteRes<WriteFLoadX, [ZnAGU], 8, [1], 1>;
defm : X86WriteRes<WriteFLoadY, [ZnAGU], 8, [1], 1>;
defm : X86WriteRes<WriteFMaskedLoad, [ZnAGU,ZnFPU01], 8, [1,1], 1>;
defm : X86WriteRes<WriteFMaskedLoadY, [ZnAGU,ZnFPU01], 8, [1,2], 2>;
-defm : X86WriteRes<WriteFStore, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteFStoreX, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteFStoreY, [ZnAGU], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStore, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteFStoreX, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteFStoreY, [ZnAGU], 1, [1], 1>;
defm : X86WriteRes<WriteFStoreNT, [ZnAGU,ZnFPU2], 8, [1,1], 1>;
-defm : X86WriteRes<WriteFStoreNTX, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteFStoreNTY, [ZnAGU], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStoreNTX, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteFStoreNTY, [ZnAGU], 1, [1], 1>;
defm : X86WriteRes<WriteFMaskedStore, [ZnAGU,ZnFPU01], 4, [1,1], 1>;
defm : X86WriteRes<WriteFMaskedStoreY, [ZnAGU,ZnFPU01], 5, [1,2], 2>;
defm : X86WriteRes<WriteFMove, [ZnFPU], 1, [1], 1>;
@@ -292,11 +292,11 @@ defm : X86WriteRes<WriteVecLoadNT, [ZnAGU], 8, [1], 1>;
defm : X86WriteRes<WriteVecLoadNTY, [ZnAGU], 8, [1], 1>;
defm : X86WriteRes<WriteVecMaskedLoad, [ZnAGU,ZnFPU01], 8, [1,2], 2>;
defm : X86WriteRes<WriteVecMaskedLoadY, [ZnAGU,ZnFPU01], 9, [1,3], 2>;
-defm : X86WriteRes<WriteVecStore, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteVecStoreX, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteVecStoreY, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteVecStoreNT, [ZnAGU], 1, [1,1], 1>;
-defm : X86WriteRes<WriteVecStoreNTY, [ZnAGU], 1, [1,1], 1>;
+defm : X86WriteRes<WriteVecStore, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteVecStoreX, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteVecStoreY, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteVecStoreNT, [ZnAGU], 1, [1], 1>;
+defm : X86WriteRes<WriteVecStoreNTY, [ZnAGU], 1, [1], 1>;
defm : X86WriteRes<WriteVecMaskedStore, [ZnAGU,ZnFPU01], 4, [1,1], 1>;
defm : X86WriteRes<WriteVecMaskedStoreY, [ZnAGU,ZnFPU01], 5, [1,2], 2>;
defm : X86WriteRes<WriteVecMove, [ZnFPU], 1, [1], 1>;
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