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* [Docs] Remove SVN checkout from LLDB build stepsJonas Devlieghere2019-05-171-51/+0
| | | | | | | | | | | | | | This removes several older paragraphs in the LLDB build steps for Unix systems which suggested checking out various components via SVN. Since there's a separate page about getting the LLDB source which only mentions Git, it seems appropriate to remove this older info from the build docs. Patch by: J. Ryan Stinnett Differential revision: https://reviews.llvm.org/D62041 llvm-svn: 361046
* [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiersDmitry Preobrazhensky2019-05-173-33/+40
| | | | | | | | | | See bug 41298: https://bugs.llvm.org/show_bug.cgi?id=41298 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61009 llvm-svn: 361045
* [DAGCombiner] visitShiftByConstant(): drop bogus signbit checkRoman Lebedev2019-05-174-27/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: That check claims that the transform is illegal otherwise. That isn't true: 1. For `ISD::ADD`, we only process `ISD::SHL` outer shift => sign bit does not matter https://rise4fun.com/Alive/K4A 2. For `ISD::AND`, there is no restriction on constants: https://rise4fun.com/Alive/Wy3 3. For `ISD::OR`, there is no restriction on constants: https://rise4fun.com/Alive/GOH 3. For `ISD::XOR`, there is no restriction on constants: https://rise4fun.com/Alive/ml6 So, why is it there then? This changes the testcase that was touched by @spatel in rL347478, but i'm not sure that test tests anything particular? Reviewers: RKSimon, spatel, craig.topper, jojo, rengolin Reviewed By: spatel Subscribers: javed.absar, llvm-commits, spatel Tags: #llvm Differential Revision: https://reviews.llvm.org/D61918 llvm-svn: 361044
* [InstCombine] canShiftBinOpWithConstantRHS(): drop bogus signbit checkRoman Lebedev2019-05-174-43/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In D61918 i was looking at dropping it in DAGCombiner `visitShiftByConstant()`, but as @craig.topper pointed out, it was copied from here. That check claims that the transform is illegal otherwise. That isn't true: 1. For `ISD::ADD`, we only process `ISD::SHL` outer shift => sign bit does not matter https://rise4fun.com/Alive/K4A 2. For `ISD::AND`, there is no restriction on constants: https://rise4fun.com/Alive/Wy3 3. For `ISD::OR`, there is no restriction on constants: https://rise4fun.com/Alive/GOH 3. For `ISD::XOR`, there is no restriction on constants: https://rise4fun.com/Alive/ml6 So, why is it there then? As far as i can tell, it dates all the way back to original check-in rL7793. I think we should just drop it. Reviewers: spatel, craig.topper, efriedma, majnemer Reviewed By: spatel Subscribers: llvm-commits, craig.topper Tags: #llvm Differential Revision: https://reviews.llvm.org/D61938 llvm-svn: 361043
* [analyzer] Remove the default value arg from getChecker*OptionKristof Umann2019-05-1718-81/+102
| | | | | | | | | | | | | | | | | | | Since D57922, the config table contains every checker option, and it's default value, so having it as an argument for getChecker*Option is redundant. By the time any of the getChecker*Option function is called, we verified the value in CheckerRegistry (after D57860), so we can confidently assert here, as any irregularities detected at this point must be a programmer error. However, in compatibility mode, verification won't happen, so the default value must be restored. This implies something else, other than adding removing one more potential point of failure -- debug.ConfigDumper will always contain valid values for checker/package options! Differential Revision: https://reviews.llvm.org/D59195 llvm-svn: 361042
* Fix tests from r361013 on X86 bots.Russell Gallop2019-05-172-0/+4
| | | | llvm-svn: 361041
* [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_forkDmitry Preobrazhensky2019-05-175-11/+30
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=41888 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D62016 llvm-svn: 361040
* [libcxxabi] Add a test for invalid assumptions on the alignment of exceptionsLouis Dionne2019-05-171-0/+34
| | | | | | rdar://problem/49864414 llvm-svn: 361039
* [X86][AVX] Remove LowerCTTZ's AVX1 custom vector handling.Simon Pilgrim2019-05-171-7/+0
| | | | | | We can now rely on generic expansion to handle this. llvm-svn: 361038
* [LibTooling] Add support to Transformer for composing rules as an ordered ↵Yitzhak Mandelbaum2019-05-173-31/+276
| | | | | | | | | | | | | | | | | | | | choice. This revision updates `RewriteRule` to support multiple subrules that are interpreted as an ordered-choice (apply the first one that matches). With this feature, users can write the rules that appear later in the list of subrules knowing that previous rules' patterns *have not matched*, freeing them from reasoning about those cases in the current pattern. Reviewers: ilya-biryukov Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61335 llvm-svn: 361037
* [ELF] -r: fix R_*_NONE to section symbols on Elf*_Rel targetsFangrui Song2019-05-173-1/+15
| | | | | | | | | | | | | | | | | On Elf*_Rel targets, for a relocation to a section symbol, an R_ABS is added which will be used by relocateOne() to compute the implicit addend. Addends of R_*_NONE should be ignored, so don't emit an R_ABS. This fixes crashes on X86 and ARM because their relocateOne() do not handle R_*_NONE. Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D62052 llvm-svn: 361036
* [X86][AVX] isNOT - add extract_subvector(xor X, -1) -> extract_subvector(X) ↵Simon Pilgrim2019-05-172-88/+97
| | | | | | | | fold. Prep work for the removal of the remaining x86 CTTZ vector lowering. llvm-svn: 361035
* Extract ASTDumper to a header fileStephen Kelly2019-05-172-46/+57
| | | | | | | | | | | | | | | | | | Summary: This class has member APIs which are useful to clients. Make it possible to use those APIs without adding them to dump() member functions. Doing so does not scale. The optional arguments to dump() should be designed to be useful in a debugging context. Reviewers: aaron.ballman Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61835 llvm-svn: 361034
* Add a Visit overload for DynTypedNode to ASTNodeTraverserStephen Kelly2019-05-173-0/+239
| | | | | | | | | | | | Reviewers: aaron.ballman Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61834 llvm-svn: 361033
* Fix Wdocumentation warnings. NFCI.Simon Pilgrim2019-05-171-5/+1
| | | | llvm-svn: 361032
* [AMDGPU][MC] Enabled expressions for most operands which accept integer valuesDmitry Preobrazhensky2019-05-1711-229/+542
| | | | | | | | | | See bug 40873: https://bugs.llvm.org/show_bug.cgi?id=40873 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D60768 llvm-svn: 361031
* AMDGPU: Fix unused variable warnings in release buildsMatt Arsenault2019-05-171-12/+9
| | | | llvm-svn: 361030
* [ELF] Don't align PT_TLS's p_memszFangrui Song2019-05-172-26/+0
| | | | | | | | | | | | | | | The code was added in r252352, probably to address some layout issues. Actually PT_TLS's p_memsz doesn't need to be aligned on either variant. ld.bfd doesn't do that. In case of larger alignment (e.g. 64 for Android Bionic on AArch64, see D62055), this may make the overhead smaller. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62059 llvm-svn: 361029
* AMDGPU/GlobalISel: Legalize G_FCEILMatt Arsenault2019-05-173-2/+312
| | | | llvm-svn: 361028
* AMDGPU/GlobalISel: Legalize G_INTRINSIC_TRUNCMatt Arsenault2019-05-173-26/+278
| | | | llvm-svn: 361027
* AMDGPU/GlobalISel: Legalize G_FRINTMatt Arsenault2019-05-173-0/+204
| | | | llvm-svn: 361026
* AMDGPU/GlobalISel: Legalize G_FCOPYSIGNMatt Arsenault2019-05-173-0/+484
| | | | llvm-svn: 361025
* [MergeICmps][NFC] Add more debug.Clement Courbet2019-05-171-0/+9
| | | | llvm-svn: 361024
* AMDGPU/GlobalISel: RegBankSelect for llvm.amdgcn.s.buffer.loadMatt Arsenault2019-05-172-0/+195
| | | | llvm-svn: 361023
* AMDGPU/GlobalISel: Use subreg index instead of extra unmergeMatt Arsenault2019-05-172-32/+18
| | | | | | | This saves instructions and extra steps, but I'm not sure about introducing subregister indexes at this point. llvm-svn: 361022
* AMDGPU/GlobalISel: Use waterfall loop for buffer_loadMatt Arsenault2019-05-174-42/+597
| | | | | | | This adds support for more complex waterfall loops that need to handle operands > 32-bits, and multiple operands. llvm-svn: 361021
* GlobalISel: Fix missing version of customForMatt Arsenault2019-05-171-0/+7
| | | | | | Add the list of pairs analagous, like legalFor and customFor has. llvm-svn: 361020
* GlobalISel: Add fp<->int casts to MachineIRBuilderMatt Arsenault2019-05-172-0/+44
| | | | llvm-svn: 361019
* GlobalISel: Add MIRBuilder wrappers for bitcount instructionsMatt Arsenault2019-05-172-0/+52
| | | | | | Various expansions use these. llvm-svn: 361018
* [MinGW] Include --enable-auto-import in the help listingMartin Storsjo2019-05-172-1/+5
| | | | | | | | | Libtool concludes that the linker doesn't support shared libraries, unless this flag is listed in the output of --help. Differential Revision: https://reviews.llvm.org/D62053 llvm-svn: 361017
* [MinGW] Implement the -v and --version flags for the MinGW driverMartin Storsjo2019-05-173-2/+23
| | | | | | Differential Revision: https://reviews.llvm.org/D62030 llvm-svn: 361016
* [MinGW] Implement --help for the MinGW driverMartin Storsjo2019-05-172-2/+16
| | | | | | Differential Revision: https://reviews.llvm.org/D62029 llvm-svn: 361015
* [MinGW] Allow requesting PDB output without giving a file nameMartin Storsjo2019-05-173-2/+11
| | | | | | | | | | | | | | | | | | | | | When integrating PDB output in mingw targeting build systems, it might be a lot of extra work to specify unique file names for the pdb output. Therefore allow omitting the actual file name and let it implicitly be the same name as the linker output, with a pdb extension. As the current form of the pdb option takes a separate parameter value, e.g. "-pdb out.pdb", it is impractical to leave out the parameter value. Therefore, introduce a second syntax for the option, with an equals sign, like -pdb=out.pdb, where the value easily can be omitted. The form -pdb= for requesting pdb files with an implicit name should work fine, even though it looks a bit unconventional in that form. Differential Revision: https://reviews.llvm.org/D62004 llvm-svn: 361014
* [ELF][test] Reorganize some R_*_NONE testsFangrui Song2019-05-1711-114/+99
| | | | | | | | | | | | | | | Change R_{386,AARCH64}_NONE yaml2obj tests/icf10.test to use assembly Add relocation-none-{arm,x86_64}.s. Check the referenced section survives under --gc-sections. Check -r copies R_X86_64_NONE R_AARCH64_NONE. (Elf*_Rel arches currently have a bug) Delete the dtrace tests as they are covered by the R_X86_64_NONE test. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62051 llvm-svn: 361013
* [X86] Pull out IsNOT helper. NFCI.Simon Pilgrim2019-05-171-8/+16
| | | | | | Return the input value for the NOT pattern: (xor X, -1) -> X llvm-svn: 361012
* [analyzer] Validate checker option names and valuesKristof Umann2019-05-175-18/+209
| | | | | | | | | | Validate whether the option exists, and also whether the supplied value is of the correct type. With this patch, invoking the analyzer should be, at least in the frontend mode, a lot safer. Differential Revision: https://reviews.llvm.org/D57860 llvm-svn: 361011
* minidump: Use MemoryList parsing code from llvmPavel Labath2019-05-173-42/+23
| | | | llvm-svn: 361010
* Re-land r360859: "[MergeICmps] Simplify the code."Clement Courbet2019-05-179-225/+225
| | | | | | | | | | With a fix for PR41917: The predecessor list was changing under our feet. - for (BasicBlock *Pred : predecessors(EntryBlock_)) { + while (!pred_empty(EntryBlock_)) { + BasicBlock* const Pred = *pred_begin(EntryBlock_); llvm-svn: 361009
* [AMDGPU] detect WaW hazards when moving/merging load/store instructionsRhys Perry2019-05-172-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In order to combine memory operations efficiently, the load/store optimizer might move some instructions around. It's usually safe to move instructions down past the merged instruction because the pass checks if memory operations can be re-ordered. Though, the current logic doesn't handle Write-after-Write hazards. This fixes a reflection issue with Monster Hunter World and DXVK. v2: - rebased on top of master - clean up the test case - handle WaW hazards correctly Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=40130 Original patch by Samuel Pitoiset. Reviewers: tpr, arsenm, nhaehnle Reviewed By: nhaehnle Subscribers: ronlieb, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye Differential Revision: https://reviews.llvm.org/D61313 llvm-svn: 361008
* [Lex] Allow to consume tokens while preprocessingIlya Biryukov2019-05-1726-108/+168
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: By adding a hook to consume all tokens produced by the preprocessor. The intention of this change is to make it possible to consume the expanded tokens without re-runnig the preprocessor with minimal changes to the preprocessor and minimal performance penalty when preprocessing without recording the tokens. The added hook is very low-level and reconstructing the expanded token stream requires more work in the client code, the actual algorithm to collect the tokens using this hook can be found in the follow-up change. Reviewers: rsmith Reviewed By: rsmith Subscribers: eraman, nemanjai, kbarton, jsji, riccibruno, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59885 llvm-svn: 361007
* [analyzer] Insert checker options into AnalyzerOption::ConfigTableKristof Umann2019-05-174-7/+63
| | | | | | | | | | | | | The more entries we have in AnalyzerOptions::ConfigTable, the more helpful debug.ConfigDumper is. With this patch, I'm pretty confident that it'll now emit the entire state of the analyzer, minus the frontend flags. It would be nice to reserve the config table specifically to checker options only, as storing the regular analyzer configs is kinda redundant. Differential Revision: https://reviews.llvm.org/D57922 llvm-svn: 361006
* [AArch64][SVE2] Asm: add saturating multiply-add long instructionsCullen Rhodes2019-05-179-0/+744
| | | | | | | | | | | | | | | | | Summary: Patch adds support for indexed and unpredicated vectors forms of the following instructions: * SQDMLALB, SQDMLALT, SQDMLSLB, SQDMLSLT The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D61997 llvm-svn: 361005
* [NFC] Fix line endings in OpenCL testsSven van Haastregt2019-05-172-30/+30
| | | | llvm-svn: 361004
* [AArch64][SVE2] Asm: add integer multiply-add long instructionsCullen Rhodes2019-05-1718-0/+1513
| | | | | | | | | | | | | | | | | Summary: Patch adds support for indexed and unpredicated vectors forms of the following instructions: * SMLALB, SMLALT, UMLALB, UMLALT, SMLSLB, SMLSLT, UMLSLB, UMLSLT The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D61951 llvm-svn: 361003
* [AArch64][SVE2] Asm: add integer multiply long instructionsCullen Rhodes2019-05-1714-0/+934
| | | | | | | | | | | | | | | | | Summary: Patch adds support for indexed and unpredicated vectors forms of the following instructions: * SMULLB, SMULLT, UMULLB, UMULLT, SQDMULLB, SQDMULLT The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D61936 llvm-svn: 361002
* [MergeICmps] Add test from PR41917.Clement Courbet2019-05-171-0/+76
| | | | llvm-svn: 361001
* Make DWARFContext dwo-aware and port debug_info sections overPavel Labath2019-05-179-34/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The previous attempt and moving section handling over to DWARFContext (D59611) failed because it did not take into account the dwo sections correctly. All DWARFContexts (even those in SymbolFileDWARFDwo) used the main module for loading the sections, but in the dwo scenario some sections should come from the dwo file. This patch fixes that by making the DWARFContext aware of whether it a dwo context or a regular one. A dwo context gets two sections lists, and it knows where to look for a particular type of a section. This isn't fully consistent with how the llvm DWARFContext behaves, because that one leaves it up to the user to know whether it should ask for a dwo section or not. However, for the time being, it seems useful to have a single entity which knows how to peice together the debug info in dwo and non-dwo scenarios. The rough roadmap for the future is: - port over the rest of the sections to DWARFContext - find a way to get rid of SymbolFileDWARFDwo/Dwp/DwpDwo. This will likely involve adding the ability for the DWARFContext to spawn dwo sub-contexts, similarly to how it's done in llvm. - get rid of the special handling of the "dwo" contexts by making sure everything knows whether it should ask for the .dwo version of the section or not (similarly to how llvm's DWARFUnits do that) To demonstrate how the DWARFContext should behave in this new world, I port the debug_info section (which is debug_info.dwo in the dwo file) handling to DWARFContext. The rest of the sections will come in subsequent patches. Reviewers: aprantl, clayborg, JDevlieghere Subscribers: zturner, lldb-commits Differential Revision: https://reviews.llvm.org/D62012 llvm-svn: 361000
* Suppress false-positive GCC -Wreturn-type warning.Richard Smith2019-05-171-0/+1
| | | | llvm-svn: 360999
* Fix crash if, during evaluation of __builtin_object_size, we try to loadRichard Smith2019-05-172-0/+12
| | | | | | through an invalid base. llvm-svn: 360998
* Fix alignment check to check the alignment of the intended type.Richard Smith2019-05-171-1/+1
| | | | llvm-svn: 360997
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