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* Quick fix for the test from rL272014 "[LAA] Improve non-wrapping pointerAndrey Turetskiy2016-06-071-1/+1
| | | | | | | | detection by handling loop-invariant case" (s couple of buildbots failed). Patch by Roman Shirokiy. llvm-svn: 272019
* Avoid Shadowing warnings in the associative containers tests. Thanks to STL ↵Marshall Clow2016-06-074-4/+8
| | | | | | for the patch. llvm-svn: 272018
* Revert "[MBP] Reduce code size by running tail merging in MBP."Haicheng Wu2016-06-076-185/+35
| | | | | | | This reverts commit r271930, r271915, r271923. They break a thumb selfhosting bot. llvm-svn: 272017
* [X86][AVX512] Added 512-bit integer vector non-temporal load testsSimon Pilgrim2016-06-071-1/+195
| | | | llvm-svn: 272016
* [ARM] Accept conditional versions of BXNS and BLXNSOliver Stannard2016-06-072-0/+15
| | | | | | | | | These instructions end in "S" but are not flag-setting, so they need including in the list of special cases in the assembly parser. Differential Revision: http://reviews.llvm.org/D21077 llvm-svn: 272015
* [LAA] Improve non-wrapping pointer detection by handling loop-invariant case.Andrey Turetskiy2016-06-073-4/+146
| | | | | | | | | | | | | This fixes PR26314. This patch adds new helper “isNoWrap” with detection of loop-invariant pointer case. Patch by Roman Shirokiy. Ref: https://llvm.org/bugs/show_bug.cgi?id=26314 Differential Revision: http://reviews.llvm.org/D17268 llvm-svn: 272014
* [Linker/IRMover] Simplify the code a bit. NFCI.Davide Italiano2016-06-071-25/+7
| | | | llvm-svn: 272013
* [clang][AVX512][Intrinsics] Adding intrinsics reduce_[round]_{ss|sd} to clangMichael Zuckerman2016-06-073-0/+146
| | | | | | Differential Revision: http://reviews.llvm.org/D21014 llvm-svn: 272012
* [X86][SSE] Add general lowering of nontemporal vector loads (fixed bad merge)Simon Pilgrim2016-06-071-9/+37
| | | | | | | | | | | | | | Currently the only way to use the (V)MOVNTDQA nontemporal vector loads instructions is through the int_x86_sse41_movntdqa style builtins. This patch adds support for lowering nontemporal loads from general IR, allowing us to remove the movntdqa builtins in a future patch. We currently still fold nontemporal loads into suitable instructions, we should probably look at removing this (and nontemporal stores as well) or at least make the target's folding implementation aware that its dealing with a nontemporal memory transaction. There is also an issue that VMOVNTDQA only acts on 128-bit vectors on pre-AVX2 hardware - so currently a normal ymm load is still used on AVX1 targets. Differential Review: http://reviews.llvm.org/D20965 llvm-svn: 272011
* [X86][SSE] Add general lowering of nontemporal vector loadsSimon Pilgrim2016-06-075-400/+745
| | | | | | | | | | | | | | Currently the only way to use the (V)MOVNTDQA nontemporal vector loads instructions is through the int_x86_sse41_movntdqa style builtins. This patch adds support for lowering nontemporal loads from general IR, allowing us to remove the movntdqa builtins in a future patch. We currently still fold nontemporal loads into suitable instructions, we should probably look at removing this (and nontemporal stores as well) or at least make the target's folding implementation aware that its dealing with a nontemporal memory transaction. There is also an issue that VMOVNTDQA only acts on 128-bit vectors on pre-AVX2 hardware - so currently a normal ymm load is still used on AVX1 targets. Differential Review: http://reviews.llvm.org/D20965 llvm-svn: 272010
* [PM] Preserve GlobalsAA for SROA.Davide Italiano2016-06-071-1/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D21040 llvm-svn: 272009
* [sanitizer] Fix build for new GLIBC msghdr/cmsghdr definitionAdhemerval Zanella2016-06-071-0/+44
| | | | | | | | | | | | | | | GLIBC now follows POSIX [1] for both msghdr and cmsghdr definitions, which means that msg_iovlen, msg_controllen, and cmsg_len are no longer size_t but sockelen_t for 64-bits architectures. The final struct size does not change, since paddings were added. This patch fixes the build issue against GLIBC 2.24 socket.h header by using the same definition for internal __sanitizer_msghdr and __sanitizer_cmsghdr. [1] http://pubs.opengroup.org/onlinepubs/9699919799/ llvm-svn: 272008
* [Thumb-1] Add optimized constant materialization for integers [256..512)James Molloy2016-06-073-0/+24
| | | | | | We can materialize these integers using a MOV; ADDi8 pair. llvm-svn: 272007
* [AVX512] Fix load opcode for fast isel.Igor Breger2016-06-072-1/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D21067 llvm-svn: 272006
* [PowerPC] Support multiple return values with fast iselUlrich Weigand2016-06-072-1/+22
| | | | | | | | | | | | | | | Using an LLVM IR aggregate return value type containing three or more integer values causes an abort in the fast isel pass. This patch adds two more registers to RetCC_PPC64_ELF_FIS to allow returning up to four integers with fast isel, just the same as is currently supported with regular isel (RetCC_PPC). This is needed for Swift and (possibly) other non-clang frontends. Fixes PR26190. llvm-svn: 272005
* [include-fixer] try to make vim header selection more friendly.Eric Liu2016-06-071-20/+35
| | | | | | | | | | | | Summary: use 'input()' to get user's input so that we can support more options. Reviewers: hokein, bkramer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D21019 llvm-svn: 272004
* [X86][SSE] Improved blend+zero target shuffle combining to use combined ↵Simon Pilgrim2016-06-074-38/+59
| | | | | | | | | | shuffle mask directly We currently only combine to blend+zero if the target value type has 8 elements or less, but this was missing a lot of cases where the combined mask had been widened. This change makes it so we use the combined mask to determine the blend value type, allowing us to catch more widened cases. llvm-svn: 272003
* [ARM] Shrink post-indexed LDR and STR to LDM/STMJames Molloy2016-06-072-0/+94
| | | | | | | | | | | | | | A Thumb-2 post-indexed LDR instruction such as: ldr.w r0, [r1], #4 Can be rewritten as: ldm.n r1!, {r0} LDMs can be more expensive than LDRs on some cores, so this has been enabled only in minsize mode. llvm-svn: 272002
* [FIX] Model the rounding behaviour of SRem correctlyJohannes Doerfert2016-06-073-12/+115
| | | | llvm-svn: 272001
* [ARM] Transform LDMs into writeback form to save code sizeJames Molloy2016-06-072-3/+44
| | | | | | | | | | | | | | If we have an LDM that uses only low registers and doesn't write to its base register: ldm.w r0, {r1, r2, r3} And that base register is dead after the LDM, then we can convert it to writeback form and use a narrow encoding: ldm.n r0!, {r1, r2, r3} Obviously, this introduces a new register write and so can cause WAW hazards, so I've enabled it only in minsize mode. This is a code size trick that ARM Compiler 5 ("armcc") does that we don't. llvm-svn: 272000
* Remove some leftover empty directories.Kuba Brecka2016-06-070-0/+0
| | | | llvm-svn: 271999
* [llvm-readobj] - Teach llvm-readobj to dump .gnu.version_r sectionsGeorge Rimar2016-06-073-0/+88
| | | | | | | | | | SHT_GNU_verneed (.gnu.version_r) is a version dependency section. It was the last symbol versioning relative section that was not dumped, now it is. Differential revision: http://reviews.llvm.org/D21024 llvm-svn: 271998
* [ARM] Incorrect relocation type for Thumb2 B<cond>.wPeter Smith2016-06-072-1/+3
| | | | | | | | | | | | | | | | | The Thumb2 conditional branch B<cond>.W has a different encoding (T3) to the unconditional branch B.W (T4) as it needs to record <cond>. As the encoding is different the B<cond>.W is given a different relocation type. ELF for the ARM Architecture 4.6.1.6 (Table-13) states that R_ARM_THM_JUMP19 should be used for B<cond>.W. At present the MC layer is using the R_ARM_THM_JUMP24 from B.W. This change makes B<cond>.W use R_ARM_THM_JUMP19 and alters the existing test that checks for R_ARM_THM_JUMP24 to expect R_ARM_THM_JUMP19. llvm-svn: 271997
* [InstCombine][AVX2] Add support for simplifying AVX2 per-element shifts to ↵Simon Pilgrim2016-06-072-58/+165
| | | | | | | | | | | | | | | | | | native shifts Unlike native shifts, the AVX2 per-element shift instructions VPSRAV/VPSRLV/VPSLLV handle out of range shift values (logical shifts set the result to zero, arithmetic shifts splat the sign bit). If the shift amount is constant we can sometimes convert these instructions to native shifts: 1 - if all shift amounts are in range then the conversion is trivial. 2 - out of range arithmetic shifts can be clamped to the (bitwidth - 1) (a legal shift amount) before conversion. 3 - logical shifts just return zero if all elements have out of range shift amounts. In addition, UNDEF shift amounts are handled - either as an UNDEF shift amount in a native shift or as an UNDEF in the logical 'all out of range' zero constant special case for logical shifts. Differential Revision: http://reviews.llvm.org/D19675 llvm-svn: 271996
* Reapply [Coverage] Fix an assertion failure if the definition of an unused ↵Igor Kudrin2016-06-074-11/+70
| | | | | | | | | | | | | | | function spans multiple files. We have an assertion failure if, for example, the definition of an unused inline function starts in one macro and ends in another. This patch fixes the issue by finding the common ancestor of the start and end locations of that function's body and changing the locations accordingly. Thanks to NAKAMURA Takumi for helping with fixing the test failure on Windows. Differential Revision: http://reviews.llvm.org/D20997 llvm-svn: 271995
* Add missing REQUIRES: arm from test. To fix tests building without ARM.Peter Smith2016-06-071-0/+1
| | | | llvm-svn: 271994
* Initial support for ARM in lld.Peter Smith2016-06-0720-0/+1036
| | | | | | | | | | | | | | | | | | | | | | | | Add support for an ARM Target and the initial set of relocations and PLT entries that are necessary for an ARM only hello world to link. This has been tested against an ARM only sysroot from the 4.2.0 CodeSourcery Lite release. Tests have been added to test/ELF for the support that has been implemented. Main limitations: - No Thumb support - Relocations incomplete - No C++ exceptions support - No TLS support - No range extension or interworking veneer (thunk) support - No Build Attribute support - No Big-endian support The deprecated relocations R_ARM_PLT32 and R_ARM_PC24 have been implemented as these are used by the 4.2.0 CodeSourcery Lite release. llvm-svn: 271993
* [clang-tidy] readability-identifier-naming - Support for Type AliasesAlexander Kornienko2016-06-072-2/+17
| | | | | | | | | | | | | | Summary: Added support for Type Alias declarations. Reviewers: alexfh Subscribers: cfe-commits Patch by James Reynolds! Differential Revision: http://reviews.llvm.org/D20856 llvm-svn: 271992
* [clang-tidy] Ignore the deleted function in misc-definitions-in-headers.Haojian Wu2016-06-072-6/+10
| | | | | | | | | | Reviewers: alexfh Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D21059 llvm-svn: 271991
* [InstCombine][SSE] Add MOVMSK constant folding (PR27982)Simon Pilgrim2016-06-072-0/+235
| | | | | | | | | | This patch adds support for folding undef/zero/constant inputs to MOVMSK instructions. The SSE/AVX versions can be fully folded, but the MMX version can only handle undef inputs. Differential Revision: http://reviews.llvm.org/D20998 llvm-svn: 271990
* [include-fixer] Mention more details in the document.Haojian Wu2016-06-072-2/+13
| | | | | | | | | | Reviewers: bkramer Subscribers: Eugene.Zelenko, cfe-commits, ioeric Differential Revision: http://reviews.llvm.org/D20467 llvm-svn: 271989
* [AVX512] Allow avx2 and sse41 nontemporal load intrinsics to select EVEX ↵Craig Topper2016-06-072-11/+13
| | | | | | encoded instructions when VLX is enabled. llvm-svn: 271988
* [AVX512] Remove unnecessary mayLoad, mayStore, hasSidEffects flags from ↵Craig Topper2016-06-072-580/+488
| | | | | | instructions that have patterns that imply them. Add the same set of flags to instructions that don't have patterns to imply them. llvm-svn: 271987
* [AVX512] Add NoVLX to a couple patterns that have VLX equivalents. Ordering ↵Craig Topper2016-06-071-1/+1
| | | | | | of the patterns in the .td file protects this, but its better to be explicit. llvm-svn: 271986
* [Kaleidoscope] Update Chapter 3 of the "Implementing a Language" tutorial toLang Hames2016-06-071-8/+14
| | | | | | | | | take into account modernizations in r246002 and r270381. Patch based on http://reviews.llvm.org/D20954 by Miroslav Hrncir. Thanks Miroslav! llvm-svn: 271985
* Revert "[analyzer] Reapply r271907 (2nd try)."Devin Coughlin2016-06-0715-1548/+0
| | | | | | | | Even with the fix in r271981, ASan is finding a stack use after return. This reverts commits r271977 and r271981. llvm-svn: 271984
* [pdb] Fix broken unit tests after r271982.Zachary Turner2016-06-071-11/+13
| | | | llvm-svn: 271983
* [pdb] Use MappedBlockStream to parse the PDB directory.Zachary Turner2016-06-0723-143/+247
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to efficiently write PDBs, we need to be able to make a StreamWriter class similar to a StreamReader, which can transparently deal with writing to discontiguous streams, and we need to use this for all writing, similar to how we use StreamReader for all reading. Most discontiguous streams are the typical numbered streams that appear in a PDB file and are described by the directory, but the exception to this, that until now has been parsed by hand, is the directory itself. MappedBlockStream works by querying the directory to find out which blocks a stream occupies and various other things, so naturally the same logic could not possibly work to describe the blocks that the directory itself resided on. To solve this, I've introduced an abstraction IPDBStreamData, which allows the client to query for the list of blocks occupied by the stream, as well as the stream length. I provide two implementations of this: one which queries the directory (for indexed streams), and one which queries the super block (for the directory stream). This has the side benefit of vastly simplifying the code to parse the directory. Whereas before a mini state machine was rolled by hand, now we simply use FixedStreamArray to read out the stream sizes, then build a vector of FixedStreamArrays for the stream map, all in just a few lines of code. Reviewed By: ruiu Differential Revision: http://reviews.llvm.org/D21046 llvm-svn: 271982
* [analyzer] Speculative fix for r271907.Devin Coughlin2016-06-071-1/+1
| | | | | | | | Fix a compilation error on the bots involving brace initialization. Differential Revision: http://reviews.llvm.org/D12761 llvm-svn: 271981
* [LibFuzzer] s/dataflow sanitizer/DataflowSanitizer/Dan Liew2016-06-071-2/+2
| | | | llvm-svn: 271980
* [LibFuzzer] Disable building and running LSan tests on Apple platforms ↵Dan Liew2016-06-074-0/+18
| | | | | | | | because LSan is not currently supported. Differential Revision: http://reviews.llvm.org/D20947 llvm-svn: 271979
* [OPENCL] Fix wrongly vla error for OpenCL array.Xiuli Pan2016-06-073-2/+24
| | | | | | | | | | | | | | | | | Summary: OpenCL should support array with const value size length, those const varibale in global and constant address space and variable in constant address space. Fixed test case error. Reviewers: Anastasia, yaxunl, bader Subscribers: bader, cfe-commits Differential Revision: http://reviews.llvm.org/D20090 llvm-svn: 271978
* [analyzer] Reapply r271907 (2nd try).Devin Coughlin2016-06-0715-0/+1548
| | | | | | | | | | | | | | Second try at reapplying "[analyzer] Add checker for correct usage of MPI API in C and C++." Special thanks to Dan Liew for helping test the fix for the template specialization compiler error with gcc. The original patch is by Alexander Droste! Differential Revision: http://reviews.llvm.org/D12761 llvm-svn: 271977
* Revert [Coverage] Fix an assertion failure if the definition of an unused ↵Igor Kudrin2016-06-074-70/+11
| | | | | | | | function spans multiple files. r271969 The test case fails on Windows. llvm-svn: 271976
* Revert "[OPENCL] Fix wrongly vla error for OpenCL array."Xiuli Pan2016-06-073-24/+2
| | | | | | | | Test case break on system-z. This reverts commit 9a7212e1e87f1396952d74f8c62314a775ccbb1c. llvm-svn: 271975
* ARM: correct TLS access on WoASaleem Abdulrasool2016-06-076-19/+54
| | | | | | | | | | | | TLS access requires an offset from the TLS index. The index itself is the section-relative distance of the symbol. For ARM, the relevant relocation (IMAGE_REL_ARM_SECREL) is applied as a constant. This means that the value may not be an immediate and must be lowered into a constant pool. This offset will not be base relocated. We were previously emitting the actual address of the symbol which would be base relocated and would therefore be the vaue offset by the ImageBase + TLS Offset. llvm-svn: 271974
* ARM: clang-format a couple of switches, add commentsSaleem Abdulrasool2016-06-073-15/+25
| | | | | | | clang-format a couple of switches in preparation for a future change. Add some enumeration comments llvm-svn: 271973
* ARM: normalise space in the patternsSaleem Abdulrasool2016-06-071-8/+7
| | | | | | Just adjust the whitespace for the selection patterns. NFC. llvm-svn: 271972
* [OPENCL] Fix wrongly vla error for OpenCL array.Xiuli Pan2016-06-073-2/+24
| | | | | | | | | | | | | Summary: OpenCL should support array with const value size length, those const varibale in global and constant address space and variable in constant address space. Reviewers: Anastasia, yaxunl, bader Subscribers: bader, cfe-commits Differential Revision: http://reviews.llvm.org/D20090 llvm-svn: 271971
* Add support for using armv7 compact unwind informationJason Molenda2016-06-074-56/+324
| | | | | | | | | | | | | | | as an asynchronous unwind plan source. Two small fixes to the compact unwind dumper tool for armv7 encodings. A change to DWARFCallFrameInfo to strip the 0th bit on addresses in eh_frame sections when armv7. In the clang generated examples I have, the 0th bit is set for thumb functions and that's causing the unwinder to pick the wrong function for eh_frame info. llvm-svn: 271970
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