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| author | Oliver Stannard <oliver.stannard@arm.com> | 2016-06-07 14:58:48 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2016-06-07 14:58:48 +0000 |
| commit | 8de5f24d1085a01d41233b0dc0c67d9c6033d743 (patch) | |
| tree | 1bff40c988a863fed6f259cadcc6f74d88ef6ae5 | |
| parent | 9f02c586703061b6fa42a36c748306d262b29b97 (diff) | |
| download | bcm5719-llvm-8de5f24d1085a01d41233b0dc0c67d9c6033d743.tar.gz bcm5719-llvm-8de5f24d1085a01d41233b0dc0c67d9c6033d743.zip | |
[ARM] Accept conditional versions of BXNS and BLXNS
These instructions end in "S" but are not flag-setting, so they need including
in the list of special cases in the assembly parser.
Differential Revision: http://reviews.llvm.org/D21077
llvm-svn: 272015
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/thumbv8m.s | 14 |
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index b9207a02c9e..281c3fab61c 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5420,6 +5420,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic, Mnemonic == "fsts" || Mnemonic == "fcpys" || Mnemonic == "fdivs" || Mnemonic == "fmuls" || Mnemonic == "fcmps" || Mnemonic == "fcmpzs" || Mnemonic == "vfms" || Mnemonic == "vfnms" || Mnemonic == "fconsts" || + Mnemonic == "bxns" || Mnemonic == "blxns" || (Mnemonic == "movs" && isThumb()))) { Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 1); CarrySetting = true; diff --git a/llvm/test/MC/ARM/thumbv8m.s b/llvm/test/MC/ARM/thumbv8m.s index fe7a2df85b9..a0830a227a1 100644 --- a/llvm/test/MC/ARM/thumbv8m.s +++ b/llvm/test/MC/ARM/thumbv8m.s @@ -146,12 +146,26 @@ sg // CHECK: bxns r0 @ encoding: [0x04,0x47] bxns r0 +// UNDEF-BASELINE: error: invalid operand for instruction +// UNDEF-BASELINE: error: conditional execution not supported in Thumb1 +// CHECK-MAINLINE: it eq @ encoding: [0x08,0xbf] +// CHECK-MAINLINE: bxnseq r1 @ encoding: [0x0c,0x47] +it eq +bxnseq r1 + // CHECK: bxns lr @ encoding: [0x74,0x47] bxns lr // CHECK: blxns r0 @ encoding: [0x84,0x47] blxns r0 +// UNDEF-BASELINE: error: invalid operand for instruction +// UNDEF-BASELINE: error: conditional execution not supported in Thumb1 +// CHECK-MAINLINE: it eq @ encoding: [0x08,0xbf] +// CHECK-MAINLINE: blxnseq r1 @ encoding: [0x8c,0x47] +it eq +blxnseq r1 + // CHECK: tt r0, r1 @ encoding: [0x41,0xe8,0x00,0xf0] tt r0, r1 |
