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* [diagtool] Change default tree behavior to print only flagsJonas Devlieghere2017-09-052-15/+32
| | | | | | | | | | | | | | This patch changes the default behavior of `diagtool tree` to only display warning flags and not the internal warnings flags. The latter is an implementation detail of the compiler and usually not what the users wants. Furthermore, flags that are enabled by default are now also printed in green. Originally, this was only the case for the diagnostic names. Differential revision: https://reviews.llvm.org/D37390 llvm-svn: 312546
* [NFC] Loop modernization in diagtoolJonas Devlieghere2017-09-055-62/+57
| | | | | | Precommit for https://reviews.llvm.org/D37390 llvm-svn: 312545
* Split opt-remark YAML and opt output testing on this testAdam Nemet2017-09-051-2/+5
| | | | | | This prepares for https://reviews.llvm.org/D33514 llvm-svn: 312544
* [AVX512] Remove patterns for (v8f32 (X86vzmovl (insert_subvector undef, ↵Craig Topper2017-09-052-8/+1
| | | | | | | | (v4f32 (scalar_to_vector FR32X:)), (iPTR 0)))) and the same for v4f64. We don't have this same pattern for AVX2 so I don't believe we should have it for AVX512. We also didn't have it for v16f32. llvm-svn: 312543
* [Preprocessor] Correct internal token parsing of newline characters in CRLFErich Keane2017-09-051-2/+3
| | | | | | | | | Correct implementation: Apparently I managed in r311683 to submit the wrong version of the patch for this, so I'm correcting it now. Differential Revision: https://reviews.llvm.org/D37079 llvm-svn: 312542
* AMDGPU/NFC: Cleanup/refactor SIMemoryLegalizer [2]:Konstantin Zhuravlyov2017-09-051-151/+174
| | | | | | | | | | - Make SIMemOpInfo a class - Add accessor methods to SIMemOpInfo - Move get*Info methods to SIMemOpInfo Differential Revision: https://reviews.llvm.org/D37395 llvm-svn: 312541
* AMDGPU/NFC: Cleanup/refactor SIMemoryLegalizer [1]:Konstantin Zhuravlyov2017-09-051-46/+50
| | | | | | | | | - Rename MemOpInfo -> SIMemOpInfo - Move SIMemOpInfo class out of SIMemoryLegalizer class Differential Revision: https://reviews.llvm.org/D37394 llvm-svn: 312540
* Read blocktime value set by kmp_set_blocktime() before reading from ↵Jonathan Peyton2017-09-052-5/+9
| | | | | | | | | | KMP_BLOCKTIME Patch by Hansang Bae Differential Revision: https://reviews.llvm.org/D37403 llvm-svn: 312539
* Minor code cleanup of Klocwork issuesJonathan Peyton2017-09-0514-149/+126
| | | | | | | | | | | Minor code cleanup of Klocwork issues. Fatal messages are given no return attribute. Define and use KMP_NORETURN to work for multiple C++ versions. Patch by Terry Wilmarth Differential Revision: https://reviews.llvm.org/D37275 llvm-svn: 312538
* [AMDGPU] Added extra test checks to make D19325 diff clearerSimon Pilgrim2017-09-051-5/+11
| | | | llvm-svn: 312537
* [clang-format] Fix lines=all case in clang-format.pyKrasimir Georgiev2017-09-051-1/+1
| | | | llvm-svn: 312536
* add the option IndentPPDirectives to the release notes. Landed in r312125Sylvestre Ledru2017-09-051-2/+15
| | | | llvm-svn: 312535
* [X86] Limit store merge size when implicitfloat is enabled (PR34421)Simon Pilgrim2017-09-053-0/+57
| | | | | | | | As suggested by @niravd : https://bugs.llvm.org/show_bug.cgi?id=34421#c2 Differential Revision: https://reviews.llvm.org/D37464 llvm-svn: 312534
* [Bash-autocomplete] Fix crash when invoking --autocomplete without value.Raphael Isemann2017-09-052-6/+17
| | | | | | | | | | | | | | | | Summary: Currently clang segfaults when invoked with `clang --autocomplete=`. This patch adds the necessary boundary checks and some tests for corner cases like this. Reviewers: yamaguchi Reviewed By: yamaguchi Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D37465 llvm-svn: 312533
* Make run-clang-tidy compatible with Python 3.xKevin Funk2017-09-051-5/+11
| | | | | | | | | | | | | | | Reviewers: alexfh Reviewed By: alexfh Subscribers: cfe-commits, JDevlieghere Tags: #clang-tools-extra Differential Revision: https://reviews.llvm.org/D37138 Change-Id: I89a95d1e082e566e7e64c2a5ca4123c543e6b1be llvm-svn: 312532
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-09-051-10/+10
| | | | llvm-svn: 312531
* [X86] Regenerate scalar rotation testsSimon Pilgrim2017-09-052-69/+207
| | | | llvm-svn: 312530
* [X86][AVX512] Use AVX512 attributes instead of -mcpu in vector shift testsSimon Pilgrim2017-09-059-38/+76
| | | | llvm-svn: 312529
* [X86][AVX512] Use AVX512 attributes instead of -mcpuSimon Pilgrim2017-09-053-8/+18
| | | | llvm-svn: 312528
* Fix test/DebugInfo/dwarfdump-decompression-invalid-size.testJonas Devlieghere2017-09-051-0/+2
| | | | llvm-svn: 312527
* [Decompression] Fail gracefully when out of memoryJonas Devlieghere2017-09-054-4/+31
| | | | | | | | | | | | This patch adds failing gracefully when running out of memory when allocating a buffer for decompression. This provides a work-around for: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3224 Differential revision: https://reviews.llvm.org/D37447 llvm-svn: 312526
* Removed dead code (PR34467). NFCI.Simon Pilgrim2017-09-051-3/+0
| | | | | | The for loop already checks that Idx < NumOfArgs. llvm-svn: 312525
* [AMDGPU] Implement infrastructure to set options in AMDGPUToolChainAndrey Kasaurov2017-09-053-3/+73
| | | | | | | | | | | | In current OpenCL implementation some options are set in OpenCL RT/Driver, which causes discrepancy between online and offline paths. Implement infrastructure to move options from OpenCL RT/Driver to AMDGPUToolChain using overloaded TranslateArgs() method. Create map for default options values, as Options.td doesn't support default values (in contrast with OPTIONS.def). Add two driver options: -On and -mNN (like -O3, -m64). Some minor formatting changes to follow the clang-format style. Differential Revision: https://reviews.llvm.org/D37386 llvm-svn: 312524
* [X86][AVX512] _mm512_stream_load_si512 should take a void const* argument ↵Simon Pilgrim2017-09-052-1/+7
| | | | | | | | | | | | (PR33977) Based off the Intel Intrinsics guide, we should expect a void const* argument. Prevents 'passing 'const void *' to parameter of type 'void *' discards qualifiers' warnings. Differential Revision: https://reviews.llvm.org/D37449 llvm-svn: 312523
* [ARM] GlobalISel: Minor cleanups in inst selectorDiana Picus2017-09-051-11/+10
| | | | | | | | Use the STI member of ARMInstructionSelector instead of TII.getSubtarget() and also make use of STI's methods instead of checking the object format manually. llvm-svn: 312522
* [ARM] GlobalISel: Support global variables for RWPIDiana Picus2017-09-054-27/+123
| | | | | | | | | In RWPI code, globals that are not read-only are accessed relative to the SB register (R9). This is achieved by explicitly generating an ADD instruction between SB and an offset that we either load from a constant pool or movw + movt into a register. llvm-svn: 312521
* [X86] Add hasSideEffects=0 and mayLoad=1 to some instructions that recently ↵Craig Topper2017-09-051-1/+3
| | | | | | had their patterns removed. llvm-svn: 312520
* [InstCombine] Add test cases for folding (select (icmp ne/eq (and X, C1), ↵Craig Topper2017-09-051-1/+800
| | | | | | | | | | (bitwiseop Y, C2), Y -> (bitwiseop Y, (shl/shr (and X, C1), C3)) or similar. This is possible if C1 and C2 are both powers of 2. Or if binop is 'and' then ~C2 needs to be a power of 2. We already support this for 'or', but we should be able to support 'and' and 'xor'. This will be enhanced by D37274. llvm-svn: 312519
* [InstCombine] Move foldSelectICmpAnd helper function earlier in the file to ↵Craig Topper2017-09-051-105/+105
| | | | | | enable reuse in a future patch. llvm-svn: 312518
* [InstCombine] In foldSelectIntoOp, avoid creating a Constant before we know ↵Craig Topper2017-09-051-17/+18
| | | | | | | | | | for sure we're going to use it and avoid an unnecessary call to m_APInt. Instead of creating a Constant and then calling m_APInt with it (which will always return true). Just create an APInt initially, and use that for the checks in isSelect01 function. If it turns out we do need the Constant, create it from the APInt. This is a refactor for a future patch that will do some more checks of the constant values here. llvm-svn: 312517
* [ORC] Add some more docs/comments to the RemoteObjectLayer.Lang Hames2017-09-051-5/+54
| | | | llvm-svn: 312516
* [ORC] Exclude RemoteObjectLayer from the ExecutionEngine module, as modulesLang Hames2017-09-051-0/+1
| | | | | | | | | | | | | | | | | | builds seem to be having trouble with it. http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/11401 When trying to link lli-child-target, the linker reports missing symbols for the 'Name' members of 'rpc::Function<OrcRPCNegotiate, FunctionIdT(std::string)>' (base class for OrcRPCNegotiate) and 'rpc::Function<OrcRPCResponse, void()>' (base class for OrcRPCResponse), despite there being definitions for these immediately below the rpc::Function class template. This looks like the same bug that bit OrcRemoteTargetClient/Server in r286920. <rdar://problem/34249745> llvm-svn: 312515
* [PowerPC] eliminate redundant compare instructionHiroshi Inoue2017-09-052-0/+1021
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If multiple conditional branches are executed based on the same comparison, we can execute multiple conditional branches based on the result of one comparison on PPC. For example, if (a == 0) { ... } else if (a < 0) { ... } can be executed by one compare and two conditional branches instead of two pairs of a compare and a conditional branch. This patch identifies a code sequence of the two pairs of a compare and a conditional branch and merge the compares if possible. To maximize the opportunity, we do canonicalization of code sequence before merging compares. For the above example, the input for this pass looks like: cmplwi r3, 0 beq 0, .LBB0_3 cmpwi r3, -1 bgt 0, .LBB0_4 So, before merging two compares, we canonicalize it as cmpwi r3, 0 ; cmplwi and cmpwi yield same result for beq beq 0, .LBB0_3 cmpwi r3, 0 ; greather than -1 means greater or equal to 0 bge 0, .LBB0_4 The generated code should be cmpwi r3, 0 beq 0, .LBB0_3 bge 0, .LBB0_4 Differential Revision: https://reviews.llvm.org/D37211 llvm-svn: 312514
* [ORC] Drop callB wrapper from the remote object layer added in r312511.Lang Hames2017-09-051-12/+0
| | | | | | This snippet was accidentally in the final commit, but is unused. llvm-svn: 312513
* Emit static constexpr member as available_externally definitionMehdi Amini2017-09-052-0/+110
| | | | | | | | | | | | | | | | | | By exposing the constant initializer, the optimizer can fold many of these constructs. This is a recommit of r311857 that was reverted in r311898 because an assert was hit when building Chromium. We have to take into account that the GlobalVariable may be first created with a different type than the initializer. This can happen for example when the variable is a struct with tail padding while the initializer does not have padding. In such case, the variable needs to be destroyed an replaced with a new one with the type of the initializer. Differential Revision: https://reviews.llvm.org/D34992 llvm-svn: 312512
* [ORC] Add a pair of ORC layers that forward object-layer operations via RPC.Lang Hames2017-09-057-1/+1142
| | | | | | | | | | | | | | | | | This patch introduces RemoteObjectClientLayer and RemoteObjectServerLayer, which can be used to forward ORC object-layer operations from a JIT stack in the client to a JIT stack (consisting only of object-layers) in the server. This is a new way to support remote-JITing in LLVM. The previous approach (supported by OrcRemoteTargetClient and OrcRemoteTargetServer) used a remote-mapping memory manager that sat "beneath" the JIT stack and sent fully-relocated binary blobs to the server. The main advantage of the new approach is that relocatable objects can be cached on the server and re-used (if the code that they represent hasn't changed), whereas fully-relocated blobs can not (since the addresses they have been permanently bound to will change from run to run). llvm-svn: 312511
* NewGVN: Fix PR 34430 - we need to look through predicateinfo copies to ↵Daniel Berlin2017-09-052-31/+80
| | | | | | detect self-cycles of phi nodes. We also need to not ignore certain types of arguments when testing whether the phi has a backedge or was originally constant. llvm-svn: 312510
* NewGVN: Fix PR 34452 by passing instruction all the way down when we do ↵Daniel Berlin2017-09-052-7/+58
| | | | | | aggregate value simplification llvm-svn: 312509
* NewGVN: Detect copies through predicateinfoDaniel Berlin2017-09-051-1/+12
| | | | llvm-svn: 312508
* NewGVN: Change where check for original instruction in phi of ops leader ↵Daniel Berlin2017-09-051-3/+8
| | | | | | finding is done. Where we had it before, we would stop looking when we hit the original instruction, but skip it. Now we skip it and keep looking. llvm-svn: 312507
* Always allocate room for a ModuleDecl on the TranslationUnitDecl.Richard Smith2017-09-051-2/+3
| | | | | | Sometimes we create the ASTContext and thus the TranslationUnitDecl before we know the LangOptions. This should fix the asan buildbot failures after r312467. llvm-svn: 312506
* [x86] add tests for vector store merge opportunity; NFCSanjay Patel2017-09-041-0/+139
| | | | llvm-svn: 312504
* [x86] auto-generate complete checks; NFCSanjay Patel2017-09-041-7/+21
| | | | llvm-svn: 312503
* [x86] add/regenerate complete checks; NFCSanjay Patel2017-09-043-78/+146
| | | | llvm-svn: 312502
* [ABI] Rewrite RegisterIsCalleeSaved.Davide Italiano2017-09-041-46/+11
| | | | | | | | | | | | | | | | | | The goal of this patch is twofold: First, it removes a wrong comment (at least, not correctly describing what the function does). Then, it rewrites the function to use a StringSwitch where the registers are enumerated explicitly instead of being computed programmatically. Other than being much shorter, it's much easier to read (and given the ABI won't change anytime soon, I don't think there's need to generalize). While here, I added an assert that the register name is always empty, as the previous implementation of the function assumed so. Differential Revision: https://reviews.llvm.org/D37420 llvm-svn: 312501
* [ORC] Refactor OrcRemoteTarget code to expose its RPC API, reduceLang Hames2017-09-046-411/+349
| | | | | | | | | | | | | | | | | | | | | | code duplication in the client, and improve error propagation. This patch moves the OrcRemoteTarget rpc::Function declarations from OrcRemoteTargetRPCAPI into their own namespaces under llvm::orc::remote so that they can be used in new contexts (in particular, a remote-object-file adapter layer that I will commit shortly). Code duplication in OrcRemoteTargetClient (especially in loops processing the code, rw-data and ro-data allocations) is removed by moving the loop bodies into their own functions. Error propagation is (slightly) improved by adding an ErrorReporter functor to the OrcRemoteTargetClient -- Errors that can't be returned (because they occur in destructors, or behind stable APIs that don't provide error returns) can be sent to the ErrorReporter instead. Some methods in the Client API are also changed to make better use of the Expected class: returning Expected<T>s rather than returning Errors and taking T&s to store the results. llvm-svn: 312500
* Add MINGW_LIBRARIES to the linker flagsMartin Storsjo2017-09-041-0/+1
| | | | | | | | | | This is essential when building with -nodefaultlibs. This is similar to what already is done in libcxxabi in SVN r302760. Differential revision: https://reviews.llvm.org/D37207 llvm-svn: 312498
* [x86] add test for unnecessary cmp + masked store; NFCSanjay Patel2017-09-041-0/+28
| | | | | | | | | As noted in PR11210: https://bugs.llvm.org/show_bug.cgi?id=11210 ...fixing this should allow us to eliminate x86-specific masked store intrinsics in IR. (Although more testing will be needed to confirm that.) llvm-svn: 312496
* [MIPS] Convert template parameters to function arguments. NFCSimon Atanasyan2017-09-041-22/+23
| | | | | | | | Pass BSIZE and SHIFT as a function arguments to the `writeRelocation` routine. It does not make a sense to have so many `writeRelocation's` instances. llvm-svn: 312495
* [MIPS] Add curly brackets to improve code readability. NFC.Simon Atanasyan2017-09-041-2/+2
| | | | llvm-svn: 312494
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