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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-09-05 12:32:16 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-09-05 12:32:16 +0000
commit60ea09eaca2d3a1ea84525771343756fa251c213 (patch)
treebd3ff4dde07cf544662a6386848ceacb57ecfb37
parent8dbd745b09c9f65fefc2ffac14e8f7f288766861 (diff)
downloadbcm5719-llvm-60ea09eaca2d3a1ea84525771343756fa251c213.tar.gz
bcm5719-llvm-60ea09eaca2d3a1ea84525771343756fa251c213.zip
Strip trailing whitespace. NFCI.
llvm-svn: 312531
-rwxr-xr-xllvm/lib/Target/X86/X86EvexToVex.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86EvexToVex.cpp b/llvm/lib/Target/X86/X86EvexToVex.cpp
index 6472bbbc901..ca59d287dab 100755
--- a/llvm/lib/Target/X86/X86EvexToVex.cpp
+++ b/llvm/lib/Target/X86/X86EvexToVex.cpp
@@ -118,8 +118,8 @@ bool EvexToVexInstPass::runOnMachineFunction(MachineFunction &MF) {
/// EVEX encoded instrs by VEX encoding when possible.
for (MachineBasicBlock &MBB : MF) {
- // Traverse the basic block.
- for (MachineInstr &MI : MBB)
+ // Traverse the basic block.
+ for (MachineInstr &MI : MBB)
Changed |= CompressEvexToVexImpl(MI);
}
@@ -147,18 +147,18 @@ bool EvexToVexInstPass::CompressEvexToVexImpl(MachineInstr &MI) const {
// Check for EVEX instructions only.
if ((Desc.TSFlags & X86II::EncodingMask) != X86II::EVEX)
return false;
-
- // Check for EVEX instructions with mask or broadcast as in these cases
- // the EVEX prefix is needed in order to carry this information
+
+ // Check for EVEX instructions with mask or broadcast as in these cases
+ // the EVEX prefix is needed in order to carry this information
// thus preventing the transformation to VEX encoding.
if (Desc.TSFlags & (X86II::EVEX_K | X86II::EVEX_B))
return false;
-
+
// Check for non EVEX_V512 instrs only.
// EVEX_V512 instr: bit EVEX_L2 = 1; bit VEX_L = 0.
if ((Desc.TSFlags & X86II::EVEX_L2) && !(Desc.TSFlags & X86II::VEX_L))
- return false;
-
+ return false;
+
// EVEX_V128 instr: bit EVEX_L2 = 0, bit VEX_L = 0.
bool IsEVEX_V128 =
(!(Desc.TSFlags & X86II::EVEX_L2) && !(Desc.TSFlags & X86II::VEX_L));
@@ -213,11 +213,11 @@ bool EvexToVexInstPass::CompressEvexToVexImpl(MachineInstr &MI) const {
if (isHiRegIdx(Reg))
return false;
}
-
+
const MCInstrDesc &MCID = TII->get(NewOpc);
MI.setDesc(MCID);
MI.setAsmPrinterFlag(AC_EVEX_2_VEX);
- return true;
+ return true;
}
INITIALIZE_PASS(EvexToVexInstPass, EVEX2VEX_NAME, EVEX2VEX_DESC, false, false)
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