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* ExecutionEngine: add R_AARCH64_ABS{16,32}Saleem Abdulrasool2017-09-192-0/+25
| | | | | | | | | | Add support for the R_AARCH64_ABS{16,32} relocations in the execution engine. This is primarily used for DWARF debug information relocations and needed by the LLVM JIT to support JITing for lldb. Patch by Alex Langford! llvm-svn: 313654
* Fix ClangDiagnosticHandler::is*RemarkEnabled membersAdam Nemet2017-09-192-4/+16
| | | | | | | Apparently these weren't really working. I added test coverage and fixed the typo in the name and the parameter. llvm-svn: 313653
* Set ANDROID when any android abi is used, not just androideabiFrancis Ricci2017-09-191-1/+1
| | | | | | | | | | | Reviewers: compnerd, beanz Subscribers: srhines, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D38044 Change-Id: Idab521f187aba18977818d91503763e0e9d3aa0e llvm-svn: 313652
* Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86 ↵Krzysztof Parzyszek2017-09-193-222/+45
| | | | | | | | backend)" It breaks a lot of bots due to missing "__iterator_category". llvm-svn: 313651
* Ensure that armhf builtins library is created when using an hf abiFrancis Ricci2017-09-191-0/+5
| | | | | | | | | | | | Reviewers: beanz, compnerd Reviewed By: compnerd Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D38045 llvm-svn: 313650
* Move "(void)variable" closer to the assertion that uses it, NFCKrzysztof Parzyszek2017-09-191-1/+1
| | | | llvm-svn: 313649
* [cmake] Add SOURCE_DIR argument to llvm_check_source_file_listShoaib Meenai2017-09-191-4/+16
| | | | | | | | | The motivation is to be able to check sources outside the current directory. See D31363 for example usage. Differential Revision: https://reviews.llvm.org/D37859 llvm-svn: 313648
* Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)Krzysztof Parzyszek2017-09-193-45/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The introduction of parameterized register classes in r313271 caused the matcher generation code in TableGen to run much slower, particularly so in the unoptimized (debug) build. This patch recovers some of the lost performance. Summary of changes: - Cache the set of legal types in TypeInfer::getLegalTypes. The contents of this set do not change. - Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally this would not be necessary, but in the debug build TableGen is not optimized, so this helps a little bit. - Add an early exit from TypeSetByHwMode::operator== for the case when one or both arguments are "simple", i.e. only have one mode. This saves some time in GenerateVariants. - Finally, replace the underlying storage type in TypeSetByHwMode::SetType with MachineValueTypeSet based on std::array instead of std::set. This significantly reduces the number of memory allocation calls. I've done a number of experiments with the underlying type of InfoByHwMode. The type is a map, and for targets that do not use the parameterization, this map has only one entry. The best (unoptimized) performance, somewhat surprisingly came from std::map, followed closely by std::unordered_map. DenseMap was the slowest by a large margin. Various hand-crafted solutions (emulating enough of the map interface not to make sweeping changes to the users) did not yield any observable improvements. llvm-svn: 313647
* Tweak orphan section placement.Rafael Espindola2017-09-192-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | Given a linker script that ends in .some_sec { ...} ; __stack_start = .; . = . + 0x2000; __stack_end = .; lld would put orphan sections like .comment before __stack_end, corrupting the intended meaning. The reason we don't normally move orphans past assignments to . is to avoid breaking rx_sec : { *(rx_sec) } . = ALIGN(0x1000); /* The RW PT_LOAD starts here*/ but in this case, there is nothing after and it seems safer to put the orphan section last. This seems to match bfd's behavior and is convenient for writing linker scripts that care about the layout of SHF_ALLOC sections, but not of any non SHF_ALLOC sections. llvm-svn: 313646
* [mips][compiler-rt] UnXFAIL test.Simon Dardis2017-09-191-2/+0
| | | | | | lsan and asan were reporting leaks caused by a glibc configuration issue. llvm-svn: 313645
* [X86] Convert X86ISD::SELECT to ISD::VSELECT just before instruction ↵Craig Topper2017-09-193-22/+3
| | | | | | | | | | selection to avoid duplicate patterns Similar to what we do for X86ISD::SHRUNKBLEND just turn X86ISD::SELECT into ISD::VSELECT. This allows us to remove the duplicated TRUNC patterns. Differential Revision: https://reviews.llvm.org/D38022 llvm-svn: 313644
* Resubmit "Fix llvm-lit script generation in libcxx."Zachary Turner2017-09-194-6/+20
| | | | | | | | After speaking with the libcxx owners, they agreed that this is a bug in the bot that needs to be fixed by the bot owners, and the CMake changes are correct. llvm-svn: 313643
* Fix build of TaskPoolTest with xcodebuildFrancis Ricci2017-09-191-1/+1
| | | | llvm-svn: 313642
* [sanitizer] Don't define common ReportDeadlySignal on FuchsiaPetr Hosek2017-09-191-2/+2
| | | | | | | | | | This causes a linker error because of duplicate symbol since ReportDeadlySignal is defined both in sanitizer_common_libcdep and sanitizer_fuchsia. Differential Revision: https://reviews.llvm.org/D37952 llvm-svn: 313641
* Re-land r313400 "[DebugInfo] Insert DW_OP_deref when spilling indirect ↵Reid Kleckner2017-09-195-38/+362
| | | | | | | | | | | | | | DBG_VALUEs" I forgot to zero out the BitVector when reusing it between UserValues. Later uses of the same location number for a different UserValue would falsely indicate that they were spilled. Usually this would lead to incorrect debug info, but in some cases they would indicate something nonsensical like a memory location based on a vector register (Q8 on ARM). llvm-svn: 313640
* [PowerPC Peephole] Constants into a join add, use ADDI over LI/ADD.Tony Jiang2017-09-192-0/+176
| | | | | | | | | | Two blocks prior to the join each perform an li and the the join block has an add using the initialized register. Optimize each predecessor block to instead use addi and delete the li's and add. Differential Revision: https://reviews.llvm.org/D36734 llvm-svn: 313639
* [AArch64] Extend tests of loads and stores of register pairsEvandro Menezes2017-09-192-2/+45
| | | | | | Include instances of FP register pairs. llvm-svn: 313638
* Use ThreadLauncher to launch TaskPool threadsFrancis Ricci2017-09-199-10/+21
| | | | | | | | | | | | | | | | | | Summary: This allows for the stack size to be configured, which isn't possible with std::thread. Prevents overflowing the stack when performing complex operations in the task pool on darwin, where the default pthread stack size is only 512kb. This also moves TaskPool from Utility to Host. Reviewers: labath, tberghammer, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D37930 llvm-svn: 313637
* [Power9] Add missing Power9 instructions.Tony Jiang2017-09-197-442/+120
| | | | | | | The following 8 instructions are implemented in this patch. addpcis(subpcis, lnia), darn, maddhd, maddhdu, maddld, setb llvm-svn: 313636
* dwarfdump: Delay parsing abbreviations until they're neededDavid Blaikie2017-09-194-16/+40
| | | | | | | | | | | This speeds up dumping specific DIEs by not parsing abbreviations for units that are not used. (this is also handy to have in eventually to speed up llvm-symbolizer for .dwp files, where parsing most of the DWP file can be avoided by using the index) llvm-svn: 313635
* Revert r313600 due to bot failures on Green Dragon.Mike Edwards2017-09-191-0/+2
| | | | | | http://green.lab.llvm.org/green/job/clang-stage1-configure-RA_check/35585/ llvm-svn: 313634
* [globalisel] Add a G_BSWAP instruction and support bswap using it.Daniel Sanders2017-09-195-1/+74
| | | | llvm-svn: 313633
* [X86][SSE] Add 'redundant pand' test case from PR34620Simon Pilgrim2017-09-191-0/+19
| | | | llvm-svn: 313632
* [x86] regenerate checks; NFCSanjay Patel2017-09-191-13/+76
| | | | llvm-svn: 313631
* [SLP] Reduce test, NFC.Alexey Bataev2017-09-191-134/+56
| | | | llvm-svn: 313630
* [globalisel] Add support for intrinsic_voidDaniel Sanders2017-09-192-0/+31
| | | | llvm-svn: 313629
* [Sema] Disallow assigning record lvalues with nested const-qualified fields.Bjorn Pettersson2017-09-197-16/+141
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: According to C99 6.3.2.1p1, structs and unions with nested const-qualified fields (that is, const-qualified fields declared at some recursive level of the aggregate) are not modifiable lvalues. However, Clang permits assignments of these lvalues. With this patch, we both prohibit the assignment of records with const-qualified fields and emit a best-effort diagnostic. This fixes https://bugs.llvm.org/show_bug.cgi?id=31796 . Committing on behalf of bevinh (Bevin Hansson). Reviewers: rtrieu, rsmith, bjope Reviewed By: bjope Subscribers: Ka-Ka, rogfer01, bjope, fhahn, cfe-commits Differential Revision: https://reviews.llvm.org/D37254 llvm-svn: 313628
* [globalisel] Add support for intrinsic_w_chain.Daniel Sanders2017-09-193-3/+33
| | | | | | This maps directly to G_INTRINSIC_W_SIDE_EFFECTS. llvm-svn: 313627
* [Nios2] Subtarget, basic infrastructure for frame, instructions and registersNikolai Bozhenov2017-09-1915-20/+545
| | | | | | | | | | | | | | This is the second minimal patch keeping Nios2 target buildable. I'm adding subtarget here and other stuff for frame lowering, instruction, register information methods. I do not add any test cases, as still there are missing parts like DAG selector and assembly printing. I plan to include them into the next patch. Patch by Andrei Grischenko <andrei.l.grischenko@intel.com> Differential Revision: https://reviews.llvm.org/D37256 llvm-svn: 313626
* [x86] Lowering Mask Set1 intrinsics to LLVM IRJina Nahias2017-09-1915-345/+2282
| | | | | | | | This patch, together with a matching clang patch (https://reviews.llvm.org/D37668), implements the lowering of X86 mask set1 intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37669 llvm-svn: 313625
* Lowering Mask Set1 intrinsics to LLVM IRJina Nahias2017-09-1910-172/+655
| | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D37669), implements the lowering of X86 mask set1 intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37668 llvm-svn: 313624
* [GPUJIT] Improved temporary file handling.Philipp Schaad2017-09-191-8/+7
| | | | | | | | | | | | | | Summary: Imporved the way the GPUJIT handles temporary files for Intel's Beignet. Reviewers: bollu, grosser Reviewed By: grosser Subscribers: philip.pfaffe, pollydev Differential Revision: https://reviews.llvm.org/D37691 llvm-svn: 313623
* Fix formatting of lambda introducers with initializers.Manuel Klimek2017-09-193-54/+18
| | | | | | | | | | | | | | | | | | | | | Most of the work was already done when we introduced a look-behind based lambda introducer detection. This patch finishes the transition by completely relying on the simple lambda introducer detection and simply recursing into normal brace-parsing code to parse until the end of the introducer. This fixes initializers in lambdas, including nested lambdas. Before: auto a = [b = [c = 42]{}]{}; auto b = [c = &i + 23]{}; After: auto a = [b = [c = 42] {}] {}; auto b = [c = &i + 23] {}; llvm-svn: 313622
* [ELF] - Do not merge sections from SHT_GROUP when -relocatableGeorge Rimar2017-09-192-6/+43
| | | | | | | | | | | | | | | | | | | This is PR34506. Imagine we have 2 sections the same name but different COMDAT groups: .section .foo,"axG",@progbits,bar,comdat .section .foo,"axG",@progbits,zed,comdat When linking relocatable we do not merge SHT_GROUP sections. But still would merge both input sections .foo into single output section .foo. As a result we will have 2 different SHT_GROUPs containing the same section, what is wrong. Patch fixes the issue, preventing merging SHF_GROUP sections with any others. Differential revision: https://reviews.llvm.org/D37574 llvm-svn: 313621
* [ELF] - Don't crash when --emit-relocs is used with --gc-sectionsGeorge Rimar2017-09-192-1/+35
| | | | | | | | | We crashed when --emit-relocs was used and relocated section was collected by GC. Differential revision: https://reviews.llvm.org/D37561 llvm-svn: 313620
* [ELF] - Introduce std::vector<InputFile *> global arrays.George Rimar2017-09-1911-68/+45
| | | | | | | | | | | | This patch removes lot of static Instances arrays from different input file classes and introduces global arrays for access instead. Similar to arrays we have for InputSections/OutputSectionCommands. It allows to iterate over input files in a non-templated code. Differential revision: https://reviews.llvm.org/D35987 llvm-svn: 313619
* [ARM] Use ADDCARRY / SUBCARRYRoger Ferrer Ibanez2017-09-195-35/+320
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a preparatory step for D34515. This change: - makes nodes ISD::ADDCARRY and ISD::SUBCARRY legal for i32 - lowering is done by first converting the boolean value into the carry flag using (_, C) ← (ARMISD::ADDC R, -1) and converted back to an integer value using (R, _) ← (ARMISD::ADDE 0, 0, C). An ARMISD::ADDE between the two operations does the actual addition. - for subtraction, given that ISD::SUBCARRY second result is actually a borrow, we need to invert the value of the second operand and result before and after using ARMISD::SUBE. We need to invert the carry result of ARMISD::SUBE to preserve the semantics. - given that the generic combiner may lower ISD::ADDCARRY and ISD::SUBCARRYinto ISD::UADDO and ISD::USUBO we need to update their lowering as well otherwise i64 operations now would require branches. This implies updating the corresponding test for unsigned. - add new combiner to remove the redundant conversions from/to carry flags to/from boolean values (ARMISD::ADDC (ARMISD::ADDE 0, 0, C), -1) → C - fixes PR34045 - fixes PR34564 Differential Revision: https://reviews.llvm.org/D35192 llvm-svn: 313618
* Test commit.Andrei Elovikov2017-09-191-1/+0
| | | | llvm-svn: 313617
* AMDGPU: Run internalize symbols at -O0Matt Arsenault2017-09-192-36/+69
| | | | | | | | The relocations used for externally visible functions aren't supported, so the direct call emitted ends up hitting a linker error. llvm-svn: 313616
* [ubsan-minimal] Test exported symbol set against RTUBsanVedant Kumar2017-09-191-0/+16
| | | | | | | | | | | Check that the symbol sets exported by the minimal runtime and the full runtime match (making exceptions for special cases as needed). This test uses some possibly non-standard nm options, and needs to inspect the symbols in runtime dylibs. I haven't found a portable way to do this, so it's limited to x86-64/Darwin for now. llvm-svn: 313615
* [ubsan-minimal] Make the interface more compatible with RTUBSanVedant Kumar2017-09-192-6/+27
| | | | | | | | | | | | | | This eliminates a few inconsistencies between the symbol sets exported by RTUBSan and RTUBSan_minimal: * Handlers for nonnull_return were missing from the minimal RT, and are now added in. * The minimal runtime exported recoverable handlers for builtin_unreachable and missing_return. These are not supposed to exist, and are now removed. llvm-svn: 313614
* [X86][Skylake] Adding the scheduling information for the SkylakeClient targetGadi Haber2017-09-1917-853/+5047
| | | | | | | | | | | | | | This patch adds the instruction scheduling information for the SkylakeClient (SKL) architecture target by adding the file X86SchedSkylakeClient.td located under the X86 Target. We used the scheduling information retrieved from the Skylake architects in order to create the file. The scheduling information includes latency, number of micro-Ops and used ports by each SKL instruction. The patch continues the scheduling replacement and insertion effort started with the SNB target in r307529 and r310792 and for HSW in r311879. Please expect some performance fluctuations due to code alignment effects. Reviewers: craig.topper, zvi, chandlerc, igorb, aymanmus, RKSimon, delena Differential Revision: https://reviews.llvm.org/D37294 llvm-svn: 313613
* [X86] Remove some unnecessary patterns for truncate with X86ISD::SELECT and ↵Craig Topper2017-09-191-6/+0
| | | | | | | | undef preserved source. We canonicalize undef preserved sources to zero during intrinsic lowering. llvm-svn: 313612
* [LLVM] [RegionInfo] Introduce getExitingBlocks to get all predecessors of ↵Hongbin Zheng2017-09-192-0/+28
| | | | | | | | | | Exit in the current region. This function will return true if all predecessors of Exit are in the current region, false otherwise. Differential Revision: https://reviews.llvm.org/D36210 llvm-svn: 313611
* [X86] Add VPERMPD/VPERMQ and VPERMPS/VPERMD to the execution domain fixing ↵Craig Topper2017-09-1930-549/+571
| | | | | | table. llvm-svn: 313610
* docs: Fix formatting in HowToReleaseLLVMTom Stellard2017-09-191-8/+8
| | | | | | This is a follow up to r313608. llvm-svn: 313609
* docs: Add instructions for how to submit a merge requestTom Stellard2017-09-191-0/+22
| | | | | | | | | | | | Reviewers: hansw, hans Reviewed By: hans Subscribers: hans, llvm-commits Differential Revision: https://reviews.llvm.org/D37936 llvm-svn: 313608
* Revert "Fix llvm-lit script generation in libcxx."Zachary Turner2017-09-194-20/+6
| | | | | | | | | | | | This reverts commit 4ad71811d45268d81b60f27e3b8b2bcbc23bd7b9. There is a bot that is checking out libcxx and lit with nothing else and then running lit.py against the test tree. Since there's no LLVM source tree, there's no LLVM CMake. CMake actually reports this as a warning saying unsupported libcxx configuration, but I guess someone is depending on it anyway. llvm-svn: 313607
* Fix llvm-lit script generation in libcxx.Zachary Turner2017-09-194-6/+20
| | | | | | Differential Revision: https://reviews.llvm.org/D37997 llvm-svn: 313606
* Allow public Triple deduction from ObjectFiles.Vlad Tsyrklevich2017-09-193-20/+30
| | | | | | | | | | | | | | | Move logic that allows for Triple deduction from an ObjectFile object out of llvm-objdump.cpp into a public factory, found in the ObjectFile class. This should allow other tools in the future to use this logic without reimplementation. Patch by Mitch Phillips Differential Revision: https://reviews.llvm.org/D37719 llvm-svn: 313605
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