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* Revert r275223, which committed the wrong thing.Sean Callanan2016-07-121-3/+0
| | | | llvm-svn: 275237
* Add -m elf32_x86_64.Rui Ueyama2016-07-123-1/+44
| | | | | | | | | | | Patch by H.J. Lu. This patch adds -m elf32_x86_64 to lld. But it doesn't generate working x32 binaries. Differential Revision: http://reviews.llvm.org/D22268 llvm-svn: 275236
* Add ILP32 support to X86_64TargetInfo.Rui Ueyama2016-07-121-33/+55
| | | | | | | | | | | Patch by H.J. Lu. As x86-64 psABI supports both LP64 and ILP32, this patch adds <ELFT> template to X86_64TargetInfo. Differential Revision: http://reviews.llvm.org/D22287 llvm-svn: 275235
* Simplify. NFC.Rui Ueyama2016-07-121-5/+3
| | | | | | | Config->Pic is true if (Config->Pie || Config->Shared) is true, so this extra check was redundant. llvm-svn: 275234
* [CUDA] Use the multi-element remove function in EraseUnwantedCUDAMatches.Justin Lebar2016-07-121-2/+4
| | | | | | | | | | | | | | | | Summary: Bug pointed out by Benjamin Kramer in r264008. I think the bug is benign because by the time this is called, we should only have at most two overloads to consider (either a host and a device overload, or a host+device overload, but not all three). Reviewers: tra Subscribers: cfe-commits, bkramer Differential Revision: http://reviews.llvm.org/D21914 llvm-svn: 275233
* [CUDA] Add additional testcases for EraseUnwantedCUDAMatches.Justin Lebar2016-07-122-0/+49
| | | | | | | | | | | | | | | | | Summary: Specifically, this patch adds testcases for all three calls to EraseUnwantedCUDAMatches. The addr-of-overloaded-fn test I accidentally neutered in r264207, which moved much of CodeGenCUDA/function-overload.cu into SemaCUDA/function-overload.cu. The coverage from overloaded-delete test is new. Reviewers: tra Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D21913 llvm-svn: 275232
* [CUDA] Don't assume that destructors can't be overloaded.Justin Lebar2016-07-122-2/+18
| | | | | | | | | | | | | | | Summary: You can overload a destructor in CUDA, and SemaOverload needs to be tweaked not to crash when it sees an explicit call to an overloaded destructor. Reviewers: rsmith Subscribers: cfe-commits, tra Differential Revision: http://reviews.llvm.org/D21912 llvm-svn: 275231
* [LV] Do not invalidate use-lists we're iterating over.Michael Kuperstein2016-07-121-14/+15
| | | | | | Should make sanitizers happier. llvm-svn: 275230
* Remove assert since it was crashing the mutli process driver tests. Made the ↵Greg Clayton2016-07-121-5/+16
| | | | | | code behave correctly when indexes are out of range or the collection is empty and is "log enable lldb unwind" is enabled, log an error message. llvm-svn: 275226
* This doesn't compiler on Darwin. Skipping it.Greg Clayton2016-07-121-0/+1
| | | | llvm-svn: 275225
* Add missing files for r275222Dehao Chen2016-07-122-0/+2
| | | | | | | | | | | | | | New pass manager for LICM. Summary: Port LICM to the new pass manager. Reviewers: davidxl, silvas Subscribers: krasin, vitalybuka, silvas, davide, sanjoy, llvm-commits, mehdi_amini Differential Revision: http://reviews.llvm.org/D21772 llvm-svn: 275224
* Mark TagDecls as having external visible storage, like ContainerDecls.Sean Callanan2016-07-121-0/+3
| | | | | | | | | The lookup tables can get out of date during the lifetime of the object so we need to preserve LLDB's ability to answer questions about TagDecls' contents. <rdar://problem/20751935> llvm-svn: 275223
* New pass manager for LICM.Dehao Chen2016-07-1229-68/+174
| | | | | | | | | | | | Summary: Port LICM to the new pass manager. Reviewers: davidxl, silvas Subscribers: krasin, vitalybuka, silvas, davide, sanjoy, llvm-commits, mehdi_amini Differential Revision: http://reviews.llvm.org/D21772 llvm-svn: 275222
* GlobalISel: freeze reserved regs after IRTranslator.Tim Northover2016-07-122-1/+6
| | | | | | | | | | We can freeze the registers after the MachineFrameInfo has been configured (by telling it about calls, inline asm, ...). This doesn't happen at all yet, but will be part of IR translation. Fixes -verify-machineinstrs assertion. llvm-svn: 275221
* AMDGPU: Follow up to r275203Matt Arsenault2016-07-126-39/+218
| | | | | | I meant to squash this into it. llvm-svn: 275220
* Remove unused variable to fix bot failure from r275216Teresa Johnson2016-07-121-2/+1
| | | | | | | Remove unused variable added in r275216. Should fix bot failure: http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/24665 llvm-svn: 275219
* The test case I added is PowerPC specific but I accidentallyNemanja Ivanovic2016-07-121-0/+0
| | | | | | | | had it in the wrong directory. Moved it to CodeGen/PowerPC. Sorry about the noise. llvm-svn: 275218
* [LV] Remove wrong assumption about LCSSAMichael Kuperstein2016-07-122-5/+25
| | | | | | | | | The LCSSA pass itself will not generate several redundant PHI nodes in a single exit block. However, such redundant PHI nodes don't violate LCSSA form, and may be introduced by passes that preserve LCSSA, and/or preserved by the LCSSA pass itself. So, assuming a single PHI node per exit block is not safe. llvm-svn: 275217
* Refactor indirect call promotion profitability analysis (NFC)Teresa Johnson2016-07-127-63/+201
| | | | | | | | | | | | | | | Summary: Refactored the profitability analysis out of the IC promotion pass and into lib/Analysis so that it can be accessed by the summary index builder in a follow-on patch to enable IC promotion in ThinLTO (D21932). Reviewers: davidxl, xur Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22182 llvm-svn: 275216
* [Power9] Add codegen for VSX word insert/extract instructionsNemanja Ivanovic2016-07-126-8/+1190
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D20239 It adds exploitation of XXINSERTW and XXEXTRACTUW instructions that are useful in some cases for inserting and extracting vector elements of v4[if]32 vectors. llvm-svn: 275215
* Review fixes to lit documentationPiotr Padlewski2016-07-122-33/+2
| | | | | | | | | | Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22245 llvm-svn: 275214
* [LoopAccessAnalysis] Some minor cleanupsDavid Majnemer2016-07-121-20/+16
| | | | | | | | | Use range-base for loops. Use auto when appropriate. No functional change is intended. llvm-svn: 275213
* [X86][AVX] Add support for target shuffle combining to VPERM2F128/VPERM2I128Simon Pilgrim2016-07-123-10/+57
| | | | llvm-svn: 275212
* Add more tests for LWG#2582. No code changes needed, just tests.Marshall Clow2016-07-1226-20/+48
| | | | llvm-svn: 275211
* libc++: name anonymous structsJF Bastien2016-07-121-9/+9
| | | | | | As discussed in http://reviews.llvm.org/D22073 llvm-svn: 275210
* [sanitizers] Allocate 12MB for stack instead of 134MBReid Kleckner2016-07-122-2/+4
| | | | | | | | | | The thread registry test was failing to allocate 25 threads with stack size 134MB, which is pretty reasonable. Also print the error code in our pthread wrappers in case this happens again. llvm-svn: 275209
* [SCCP] Constant fold structs if all the lattice value are constant.Davide Italiano2016-07-122-9/+107
| | | | | | Differential Revision: http://reviews.llvm.org/D22269 llvm-svn: 275208
* [asan] Fix interception unittest on Windows64.Etienne Bergeron2016-07-122-0/+11
| | | | | | | | | | | | | mov edi,edi is _not_ NOP in 64-bit, use 66,90h instead. This bug was causing interception unittest to crash on Windows64 (windows 8 and windows 10). Credits to etienneb for finding the root cause. Patch by: Wei Wang Differential Revision: http://reviews.llvm.org/D22274 llvm-svn: 275207
* [ELF] Support for setting the base addressPetr Hosek2016-07-125-2/+75
| | | | | | | | The -image-base option allows for overriding the base address. Differential Revision: http://reviews.llvm.org/D22116 llvm-svn: 275206
* [LoopVectorize] Assorted cleanupsDavid Majnemer2016-07-121-223/+184
| | | | | | | | | Use range-based for loops instead of doing everything manually. Use auto when appropriate. No functional change is intended. llvm-svn: 275205
* X86FixupBWInsts: No need for forward liveness analysis.Matthias Braun2016-07-122-72/+0
| | | | | | | | | | With r274952 and r275201 in place there are no cases left where a forward liveness analysis yields different results than a backward one. So we can remove the forward stepping logic. Differential Revision: http://reviews.llvm.org/D22083 llvm-svn: 275204
* AMDGPU: Fix verifier error with kill intrinsicMatt Arsenault2016-07-123-70/+272
| | | | | | | Don't create a terminator in the middle of the block. We should probably get rid of this intrinsic. llvm-svn: 275203
* [PM] Port LoopIdiomRecognize Pass to new PMDehao Chen2016-07-127-38/+116
| | | | | | | | | | | | Summary: Port LoopIdiomRecognize Pass to new PM Reviewers: davidxl Subscribers: davide, sanjoy, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D22250 llvm-svn: 275202
* BranchFolding: Use LivePhysReg to update live in lists.Matthias Braun2016-07-122-29/+30
| | | | | | | | | | | | | | | Use LivePhysRegs with a backwards walking algorithm to update live in lists, this way the results do not depend on the presence of kill flags anymore. This patch also reduces the number of registers added as live-in. Previously all pristine registers as well as all sub registers of a super register were added resulting in unnecessarily large live in lists. This fixed https://llvm.org/PR25263. Differential Revision: http://reviews.llvm.org/D22027 llvm-svn: 275201
* AMDGPU: Set isConvergent on v_cmpx* instructionsMatt Arsenault2016-07-121-2/+3
| | | | | | | No test since these aren't used now, except for one place in a pre-emit pass. llvm-svn: 275200
* Tweaks to the NSIndexPath formatter to enhance stabilityEnrico Granata2016-07-121-89/+118
| | | | | | rdar://problem/25767901 llvm-svn: 275199
* Add logging to Linux Host::GetProcessAndStatInfo.Oleksiy Vyalov2016-07-121-4/+16
| | | | llvm-svn: 275198
* AMDGPU: Add LLVM IR Intrinsic for v_lerp_u8Wei Ding2016-07-123-0/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D22239 llvm-svn: 275197
* Fix printing of debugging information in LiveIntervals::shrinkToUsesKrzysztof Parzyszek2016-07-121-1/+1
| | | | | | | Print VNI->def before calling VNI->markUnused(), since markUnused makes the def invalid. llvm-svn: 275196
* AArch64: fix return type of vqmovun_high_*.Tim Northover2016-07-122-1/+8
| | | | | | These should be returning an unsigned quantity. llvm-svn: 275195
* Add print/dump routines to LiveInterval::SubRangeKrzysztof Parzyszek2016-07-122-10/+27
| | | | llvm-svn: 275194
* [PGO] Don't include full file path in static function profile counter namesXinliang David Li2016-07-122-3/+23
| | | | | | | Patch by Jake VanAdrighem Differential Revision: http://reviews.llvm.org/D22028 llvm-svn: 275193
* add tests for missing DeMorgan's Law foldsSanjay Patel2016-07-121-0/+55
| | | | llvm-svn: 275192
* Fix for the mingw builderDavid Majnemer2016-07-121-1/+1
| | | | llvm-svn: 275191
* [ItaniumMangle] Correctly mangle BuiltinTemplateDeclsDavid Majnemer2016-07-122-1/+17
| | | | | | | | | | A BuiltinTemplateDecl has no underlying templated decl and as such they cannot be relied upon for mangling. The ItaniumMangler had some bugs here which lead to crashes. This fixes PR28519. llvm-svn: 275190
* Add CHECK line to test case. NFC.Michael Kruse2016-07-121-2/+7
| | | | | | | | | | Check not only that the compiler is not crashing, but also whether the probablematic part (The sequence of instructions simplified to '4') is reflected in the output. Thanks to Tobias for the hint. llvm-svn: 275189
* auto-generate checksSanjay Patel2016-07-121-20/+23
| | | | llvm-svn: 275188
* auto-generate checksSanjay Patel2016-07-121-12/+13
| | | | llvm-svn: 275187
* auto-generate checksSanjay Patel2016-07-121-159/+190
| | | | llvm-svn: 275186
* Increase "process load" timeoutPavel Labath2016-07-121-0/+1
| | | | | | | | | | Loading a dynamic library can take quite a long time, since it triggers a number of shared-library-event stops for dependent libraries. This is especially true for remote targets due to communication latency. Increase the default 500ms timeout to account for that. Committing as obvious. llvm-svn: 275185
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