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| author | Sanjay Patel <spatel@rotateright.com> | 2016-07-12 16:21:55 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-07-12 16:21:55 +0000 |
| commit | 3900191ecc12cfc6ad94f59dea6422c57a64e1b6 (patch) | |
| tree | 7a59e11b1c724e38b3727ad1de4b6fd354bbe838 | |
| parent | 93dffe629a4bc1361a1319ee8725c7ac92327de7 (diff) | |
| download | bcm5719-llvm-3900191ecc12cfc6ad94f59dea6422c57a64e1b6.tar.gz bcm5719-llvm-3900191ecc12cfc6ad94f59dea6422c57a64e1b6.zip | |
auto-generate checks
llvm-svn: 275188
| -rw-r--r-- | llvm/test/Transforms/InstCombine/zext.ll | 43 |
1 files changed, 23 insertions, 20 deletions
diff --git a/llvm/test/Transforms/InstCombine/zext.ll b/llvm/test/Transforms/InstCombine/zext.ll index b62c626c95c..d431dbdfde1 100644 --- a/llvm/test/Transforms/InstCombine/zext.ll +++ b/llvm/test/Transforms/InstCombine/zext.ll @@ -1,45 +1,48 @@ -; Tests to make sure elimination of casts is working correctly +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s define i64 @test_sext_zext(i16 %A) { - %c1 = zext i16 %A to i32 ; <i32> [#uses=1] - %c2 = sext i32 %c1 to i64 ; <i64> [#uses=1] - ret i64 %c2 - -; CHECK-LABEL: @test_sext_zext -; CHECK-NOT: %c1 -; CHECK: %c2 = zext i16 %A to i64 -; CHECK: ret i64 %c2 +; CHECK-LABEL: @test_sext_zext( +; CHECK-NEXT: [[C2:%.*]] = zext i16 %A to i64 +; CHECK-NEXT: ret i64 [[C2]] +; + %c1 = zext i16 %A to i32 + %c2 = sext i32 %c1 to i64 + ret i64 %c2 } define <2 x i64> @test2(<2 x i1> %A) { +; CHECK-LABEL: @test2( +; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> %A to <2 x i64> +; CHECK-NEXT: [[ZEXT:%.*]] = xor <2 x i64> [[TMP1]], <i64 1, i64 1> +; CHECK-NEXT: ret <2 x i64> [[ZEXT]] +; %xor = xor <2 x i1> %A, <i1 true, i1 true> %zext = zext <2 x i1> %xor to <2 x i64> ret <2 x i64> %zext - -; CHECK-LABEL: @test2 -; CHECK-NEXT: zext <2 x i1> %A to <2 x i64> -; CHECK-NEXT: xor <2 x i64> %1, <i64 1, i64 1> } define <2 x i64> @test3(<2 x i64> %A) { +; CHECK-LABEL: @test3( +; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %A, <i64 23, i64 42> +; CHECK-NEXT: ret <2 x i64> [[AND]] +; %trunc = trunc <2 x i64> %A to <2 x i32> %and = and <2 x i32> %trunc, <i32 23, i32 42> %zext = zext <2 x i32> %and to <2 x i64> ret <2 x i64> %zext - -; CHECK-LABEL: @test3 -; CHECK-NEXT: and <2 x i64> %A, <i64 23, i64 42> } define <2 x i64> @test4(<2 x i64> %A) { +; CHECK-LABEL: @test4( +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i64> %A, <i64 4294967295, i64 4294967295> +; CHECK-NEXT: [[XOR:%.*]] = and <2 x i64> [[TMP1]], <i64 23, i64 42> +; CHECK-NEXT: ret <2 x i64> [[XOR]] +; %trunc = trunc <2 x i64> %A to <2 x i32> %and = and <2 x i32> %trunc, <i32 23, i32 42> %xor = xor <2 x i32> %and, <i32 23, i32 42> %zext = zext <2 x i32> %xor to <2 x i64> ret <2 x i64> %zext - -; CHECK-LABEL: @test4 -; CHECK-NEXT: xor <2 x i64> %A, <i64 4294967295, i64 4294967295> -; CHECK-NEXT: and <2 x i64> %1, <i64 23, i64 42> } + |
