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* [ORC] Make some more operations on VSO private. These should be done via aLang Hames2018-05-211-34/+14
| | | | | | MaterializationResponsibility instance. llvm-svn: 332919
* [LKH] Add a replacement RTDyldLayer.Lang Hames2018-05-213-0/+151
| | | | llvm-svn: 332918
* Reapply r332907 "[GlobalISel] Improving InstructionSelect's performance by ↵Roman Tereshin2018-05-214-1049/+1251
| | | | | | | | | | | | reducing MatchTable..." Apparently the compile time problem was caused by the fact that not all compilers / STL implementations can automatically convert std::unique_ptr<Derived> to std::unique_ptr<Base>. Fixed (hopefully) by making sure it's std::unique_ptr<Derived>&& (rvalue ref) to std::unique_ptr<Base> conversion instead. llvm-svn: 332917
* [X86] Remove 128/256-bit cvtdq2ps, cvtudq2ps, cvtqq2pd, cvtuqq2pd intrinsics.Craig Topper2018-05-2115-261/+431
| | | | | | These can all be implemented with sitofp/uitofp instructions. llvm-svn: 332916
* [llvm-objcopy] Add --strip-unneeded optionPaul Semel2018-05-215-4/+175
| | | | | | | | This option removes symbols that are not needed by relocations. Differential Revision: https://reviews.llvm.org/D46896 llvm-svn: 332915
* Fix the Xcode project for the refactoring of theJim Ingham2018-05-211-0/+18
| | | | | | DWARF reader. llvm-svn: 332914
* Add missing include for cstdint to Visibility.hRaphael Isemann2018-05-211-0/+1
| | | | | | | | | | Summary: We use uint8_t in this header, so we need to include cstdint. Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47164 llvm-svn: 332913
* Revert r332907 "[GlobalISel] Improving InstructionSelect's performance by ↵Roman Tereshin2018-05-214-1251/+1049
| | | | | | | | reducing MatchTable..." There is a compile time error I didn't see locally, investigating now. llvm-svn: 332912
* Add missing x86-registered-target.Peter Collingbourne2018-05-211-0/+1
| | | | llvm-svn: 332911
* Fix warning from r332654 with LLVM_ATTRIBUTE_USEDDiego Caballero2018-05-211-2/+2
| | | | | | | | | r332654 tried to fix an unused function warning with a void cast. This approach worked for clang and gcc but not for MSVC. This commit replaces the void cast with the LLVM_ATTRIBUTE_USED approach. llvm-svn: 332910
* [X86] Remove a builtin that should have been removed in r332882.Craig Topper2018-05-212-2/+0
| | | | llvm-svn: 332909
* Unbreak kaleidoscope example.Peter Collingbourne2018-05-211-1/+1
| | | | llvm-svn: 332908
* [GlobalISel] Improving InstructionSelect's performance by reducing ↵Roman Tereshin2018-05-214-1049/+1251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MatchTable, mostly NFC, perf patch 1 This patch starts a series of patches that decrease time spent by GlobalISel in its InstructionSelect pass by roughly 60% for -O0 builds for large inputs as measured on sqlite3-amalgamation (http://sqlite.org/download.html) targeting AArch64. The performance improvements are achieved solely by reducing the number of matching GIM_* opcodes executed by the MatchTable's interpreter during the selection by approx. a factor of 30, which also brings contribution of this particular part of the selection process to the overall runtime of InstructionSelect pass down from approx. 60-70% to 5-7%, thus making further improvements in this particular direction not very profitable. The improvements described above are expected for any target that doesn't have many complex patterns. The targets that do should strictly benefit from the changes, but by how much exactly is hard to estimate beforehand. It's also likely that such target WILL benefit from further improvements to MatchTable, most likely the ones that bring it closer to a perfect decision tree. This commit specifically is rather large mostly NFC commit that does necessary preparation work and refactoring, there will be a following series of small patches introducing a specific optimization each shortly after. This commit specifically is expected to cause a small compile time regression (around 2.5% of InstructionSelect pass time), which should be fixed by the next commit of the series. Every commit planned shares the same Phabricator Review. Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar Reviewed By: qcolombet Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D44700 llvm-svn: 332907
* Fix another make_unique ambiguity.Peter Collingbourne2018-05-211-1/+2
| | | | llvm-svn: 332906
* [DAGCombiner] isAllOnesConstantOrAllOnesSplatConstant(): look through bitcastsRoman Lebedev2018-05-212-23/+23
| | | | | | | | | | | | Summary: As pointed out in D46528, we errneously transform cases like `xor X, -1`, even though we use said function. It's because the `-1` is actually a bitcast there. So i think we can just look through it in the function. Differential Revision: https://reviews.llvm.org/D47156 llvm-svn: 332905
* [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.Roman Lebedev2018-05-218-337/+314
| | | | | | | | | | | | | | | Summary: This **appears** to be the last missing piece for the masked merge pattern handling in the backend. This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]]. [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly. Previously, `andps`+`andnps` / `bsl` would be generated. (see `@out`) Now, they would no longer be generated (see `@in`), and we need to make sure that they are generated. Differential Revision: https://reviews.llvm.org/D46528 llvm-svn: 332904
* [X86][AArch64][NFC] Add tests for vector masked merge unfoldingRoman Lebedev2018-05-215-1/+6010
| | | | | | | | | | | | | Summary: This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]]. [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly. Previously, `andps`+`andnps` / `bsl` would be generated. (see `@out`) Now, they would no longer be generated (see `@in`). Differential Revision: https://reviews.llvm.org/D46008 llvm-svn: 332903
* Implement deduction guides for vectorMarshall Clow2018-05-213-7/+184
| | | | llvm-svn: 332901
* [ORC] Preserve Materializing symbol flag during resolution.Lang Hames2018-05-211-3/+4
| | | | llvm-svn: 332899
* [ORC] Lookup now returns an error if any symbols are not found.Lang Hames2018-05-212-2/+49
| | | | | | | | | | | Also tightens the behavior of ExecutionSession::failQuery. Queries can usually only be failed by marking a symbol as failed-to-materialize, but ExecutionSession::failQuery provides a second route, and both routes may be executed from different threads. In the case that a query has already been failed due to a materialization error, ExecutionSession::failQuery will direct the error to ExecutionSession::reportError instead. llvm-svn: 332898
* [ORC] Remove the optional MaterializationResponsibility argument from lookup.Lang Hames2018-05-213-28/+14
| | | | | | | | The lookup function provides blocking symbol resolution for JIT clients (not layers themselves) so it does not need to track symbol dependencies via a MaterializationResponsibility. llvm-svn: 332897
* [ORC] Add IRLayer and ObjectLayer interfaces and related MaterializationUnits.Lang Hames2018-05-213-0/+210
| | | | llvm-svn: 332896
* [DAGCombiner] Use computeKnownBits to match rotate patterns that have had ↵Craig Topper2018-05-213-57/+30
| | | | | | | | | | | | | | | | their amount masking modified by simplifyDemandedBits SimplifyDemandedBits can remove bits from the masks for the shift amounts we need to see to detect rotates. This patch uses zeroes from computeKnownBits to fill in some of these mask bits to make the match work. As currently written this calls computeKnownBits even when the mask hasn't been simplified because it made the code simpler. If we're worried about compile time performance we can improve this. I know we're talking about making a rotate intrinsic, but hopefully we can go ahead and do this change and just make sure the rotate intrinsic also handles it. Differential Revision: https://reviews.llvm.org/D47116 llvm-svn: 332895
* [InstCombine] regenerate checks; NFCSanjay Patel2018-05-211-35/+54
| | | | llvm-svn: 332894
* [X86] Simplify some X86 address mode folding code, NFCIReid Kleckner2018-05-211-83/+52
| | | | | | | | This code should really do exactly the same thing for 32-bit x86 and 64-bit small code models, with the exception that RIP-relative addressing can't use base and index registers. llvm-svn: 332893
* [X86] Remove some unneeded check lines that I copy and pasted when I made ↵Craig Topper2018-05-211-22/+0
| | | | | | vector tests from some scalar test cases. llvm-svn: 332892
* [X86] Remove masking from pternlog llvm intrinsics and use a select ↵Craig Topper2018-05-213-18/+77
| | | | | | | | | | | | instruction instead. Because the intrinsics in the headers are implemented as macros, we can't just use a select builtin and pternlog builtin. This would require one of the macro arguments to be used twice. Depending on what was passed to the macro we could expand an expression twice leading to weird behavior. We could maybe declare our local variable in the macro, but that would need to worry about name collisions. To avoid that just generate IR directly in CGBuiltin.cpp. Differential Revision: https://reviews.llvm.org/D47125 llvm-svn: 332891
* [X86] Remove masking from vpternlog intrinsics. Use a select in IR instead.Craig Topper2018-05-2112-356/+1030
| | | | | | | | This removes 6 intrinsics since we no longer need separate mask and maskz intrinsics. Differential Revision: https://reviews.llvm.org/D47124 llvm-svn: 332890
* Fix a make_unique ambiguity.Peter Collingbourne2018-05-211-1/+1
| | | | llvm-svn: 332889
* [asan] Make GetCurrentThread RTEMS-friendlyWalter Lee2018-05-212-0/+6
| | | | | | | | | | | | | | | | | On RTEMS, system and user code all live in a single binary and address space. There is no clean separation, and instrumented code may execute before the ASan run-time is initialized (or after it has been destroyed). Currently, GetCurrentThread() may crash if it's called before ASan run-time is initialized. Make it return nullptr instead. Similarly, fix __asan_handle_no_return so that it gives up rather than try something that may crash. Differential Revision: https://reviews.llvm.org/D46459 llvm-svn: 332888
* [InstCombine] remove fptrunc (select) code; NFCISanjay Patel2018-05-211-17/+0
| | | | | | | This pattern is handled within commonCastTransforms(), so the code here is dead AFAICT. llvm-svn: 332887
* Revert r332847; it caused us to miscompile certain forms of reference ↵Richard Smith2018-05-2110-77/+47
| | | | | | initialization. llvm-svn: 332886
* CodeGen, Driver: Start using direct split dwarf emission in clang.Peter Collingbourne2018-05-218-60/+112
| | | | | | | | Fixes PR37466. Differential Revision: https://reviews.llvm.org/D47093 llvm-svn: 332885
* LTO: Replace split dwarf implementation that uses objcopy with one that uses ↵Peter Collingbourne2018-05-214-78/+23
| | | | | | | | | | direct emission. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47091 llvm-svn: 332884
* [InstCombine] add tests for cast-of-select; NFCSanjay Patel2018-05-211-0/+133
| | | | | | | | | In all cases, we're pulling the cast above the select. That's not a good canonicalization if we're creating a select that then mismatches the operand size of its condition. llvm-svn: 332883
* [X86] Use __builtin_convertvector to implement some of the packed integer to ↵Craig Topper2018-05-2114-152/+128
| | | | | | | | | | | | packed float conversion intrinsics. I believe this is safe assuming default default FP environment. The conversion might be inexact, but it can never overflow the FP type so this shouldn't be undefined behavior for the uitofp/sitofp instructions. We already do something similar for scalar conversions. Differential Revision: https://reviews.llvm.org/D46863 llvm-svn: 332882
* CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it ↵Peter Collingbourne2018-05-2114-48/+83
| | | | | | | | | | up to dwo output. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47089 llvm-svn: 332881
* Remove CMake workaround for LLD PR24476 which is no longer neededReid Kleckner2018-05-211-8/+0
| | | | llvm-svn: 332880
* Revert r332028; see PR37545 for details.Richard Smith2018-05-212-97/+80
| | | | llvm-svn: 332879
* [DebugInfo] Fix typo "DWARG" in test comment (NFC)Brian Gesiak2018-05-211-1/+1
| | | | | | | | | | | Summary: The correct spelling is "DWARF", the debugging format, not "DWARG". The typo is in a (not executed by lit) comment in a test file, so fixing it does not result in any functional change. Test Plan: check-llvm, just in case llvm-svn: 332878
* Enable Python API for OpenBSD.Zachary Turner2018-05-211-0/+3
| | | | | | Patch by David Carlier llvm-svn: 332877
* [libFuzzer] reinstate -dump_coverage, which is still in use (reverts r332036)Kostya Serebryany2018-05-217-1/+38
| | | | llvm-svn: 332876
* MC: Introduce an ELF dwo object writer and teach llvm-mc about it.Peter Collingbourne2018-05-217-28/+179
| | | | | | | | Part of PR37466. Differential Revision: https://reviews.llvm.org/D47051 llvm-svn: 332875
* AMDGPU: Update GCCBuiltin names for DS FP atomic intrinsicsMatt Arsenault2018-05-211-3/+3
| | | | llvm-svn: 332874
* [DebugInfo] Use absolute addresses in location listsJonas Devlieghere2018-05-218-23/+35
| | | | | | | | | | | Rather than relying on the user to do the address calculating in DW_AT_location we should just dump the absolute address. rdar://problem/38513870 Differential revision: https://reviews.llvm.org/D47152 llvm-svn: 332873
* [X86] Add test cases for D47012.Craig Topper2018-05-212-0/+702
| | | | | | Patch by Thomasz Krupa. llvm-svn: 332872
* Revert "[CMake] Reland "Make simple source used for CMake checks a C file""Petr Hosek2018-05-213-6/+1
| | | | | | | This reverts commit rCRT332679 which doesn't quite work and will be replaced by D47100 and D47115 which is a cleaner solution. llvm-svn: 332871
* MC: Extract a derived class from ELFObjectWriter. NFCI.Peter Collingbourne2018-05-211-13/+19
| | | | | | | | | | This class will be used to create regular, non-split ELF files. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47049 llvm-svn: 332870
* [X86] Add test cases for missed vector rotate matching due to ↵Craig Topper2018-05-211-0/+114
| | | | | | | | SimplifyDemandedBits interfering with the AND masks As requested in D47116 llvm-svn: 332869
* MC: Separate creating a generic object writer from creating a target object ↵Peter Collingbourne2018-05-2165-313/+296
| | | | | | | | | | | | | writer. NFCI. With this we gain a little flexibility in how the generic object writer is created. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47045 llvm-svn: 332868
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