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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-21 19:43:02 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-21 19:43:02 +0000 |
| commit | 16fcc5b6db544b2d552dacdab62c9e1ec243a415 (patch) | |
| tree | 219d36e107f647850c4ee85e42dc8580bf79e05b | |
| parent | c111382aa8b39c68e32382448c28a8528d775700 (diff) | |
| download | bcm5719-llvm-16fcc5b6db544b2d552dacdab62c9e1ec243a415.tar.gz bcm5719-llvm-16fcc5b6db544b2d552dacdab62c9e1ec243a415.zip | |
AMDGPU: Update GCCBuiltin names for DS FP atomic intrinsics
llvm-svn: 332874
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td index f51df9f16bf..1fcb4fff98a 100644 --- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td +++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td @@ -337,9 +337,9 @@ class AMDGPULDSF32Intrin<string clang_builtin> : [IntrArgMemOnly, NoCapture<0>] >; -def int_amdgcn_ds_fadd : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_fadd">; -def int_amdgcn_ds_fmin : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_fmin">; -def int_amdgcn_ds_fmax : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_fmax">; +def int_amdgcn_ds_fadd : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_faddf">; +def int_amdgcn_ds_fmin : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_fminf">; +def int_amdgcn_ds_fmax : AMDGPULDSF32Intrin<"__builtin_amdgcn_ds_fmaxf">; defset list<AMDGPURsrcIntrinsic> AMDGPUImageIntrinsics = { |
