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* [profile] add runtime variable documentationXinliang David Li2016-05-181-0/+29
| | | | llvm-svn: 269964
* [AArch64] Minor refactoring. NFC.Chad Rosier2016-05-181-4/+5
| | | | llvm-svn: 269963
* clean up; NFCISanjay Patel2016-05-181-5/+4
| | | | llvm-svn: 269962
* [Driver] Fix the case when use -fembed-bitcode and -flto= togetherSteven Wu2016-05-182-3/+5
| | | | | | | | | | | | | | | | | Summary: -fembed-bitcode was only checking for old style LTO flag (-flto) but not considering the new -flto= style option. That makes clang output bitcode embedded in bitcode object when using -flto= and -fembed-bitcode= together. Now clang should output normal bitcode file when using LTO and ignores -fembed-bitcode option. Reviewers: joker.eph Subscribers: joker.eph, cfe-commits Differential Revision: http://reviews.llvm.org/D20374 llvm-svn: 269961
* [ASTMacther] A follow-up on unresolvedLookupExpr test fixing.Haojian Wu2016-05-181-1/+4
| | | | llvm-svn: 269957
* [include-fixer] Also look up prefixes of queries.Benjamin Kramer2016-05-182-43/+48
| | | | | | | | | | | | This is used to find nested classes. For a nested name foo::bar::qux we will first look up foo::bar::qux, then foo::bar, then foo unless we find a result. This is used to support nested classes which are not part of the index but can only be used if the header for the parent context is included. Differential Revision: http://reviews.llvm.org/D20372 llvm-svn: 269956
* pdbdump: Print out section offsets in the publics stream.Rui Ueyama2016-05-184-2/+10
| | | | llvm-svn: 269955
* Delete dead code. Reloc::Default is the default.Rafael Espindola2016-05-181-3/+0
| | | | llvm-svn: 269954
* Re-apply: [obj2yaml] [yaml2obj] Support MachO section and section_64Chris Bieneman2016-05-186-8/+427
| | | | | | This re-applies r269845, r269846, and r269850 with an included fix for a crash reported by zturner. llvm-svn: 269953
* clang-rename: handle non-inline ctor definitions when renaming classesMiklos Vajna2016-05-182-0/+20
| | | | | | | | | | The result of the test was C::D(), not D::D(). Reviewers: cfe-commits, klimek Differential Revision: http://reviews.llvm.org/D20356 llvm-svn: 269952
* AMDGPU: Error if branch distance exceeds limitMatt Arsenault2016-05-181-1/+5
| | | | llvm-svn: 269951
* AMDGPU: Other sizes of popcnt are fastMatt Arsenault2016-05-183-2/+77
| | | | | | | We can chain bcnt instructions together, so any width popcnt is pretty fast. llvm-svn: 269950
* Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA ↵Hans Wennborg2016-05-1818-54/+508
| | | | | | | | | | | | instructions" with an additional fix to make RegAllocFast ignore undef physreg uses. It would previously get confused about the "push %eax" instruction's use of eax. That method for adjusting the stack pointer is used in X86FrameLowering::emitSPUpdate as well, but since that runs after register-allocation, we didn't run into the RegAllocFast issue before. llvm-svn: 269949
* AMDGPU: Fix assert when erroring on a callMatt Arsenault2016-05-182-4/+20
| | | | | | | For some reason an assert is now hit when a valid chain is not returned, so return the entry chain. llvm-svn: 269948
* [sanitizer] Allow dlopen/dlclose interception to be disabled from cmakeFrancis Ricci2016-05-181-0/+4
| | | | | | | | | | | | | | Summary: dlopen and dlclose interception are broken when RUNPATH is used: https://llvm.org/bugs/show_bug.cgi?id=27790 Reviewers: kutuzov.viktor.84, samsonov, dvyukov, eugenis, kcc Subscribers: kcc, filcab, kubabrecka, compnerd, llvm-commits Differential Revision: http://reviews.llvm.org/D20333 llvm-svn: 269947
* Trivial cleanups.Rafael Espindola2016-05-1813-37/+35
| | | | | | | This just clang formats and cleans comments in an area I am about to post a patch for review. llvm-svn: 269946
* AMDGPU: Handle alloca promoting with null operandsMatt Arsenault2016-05-184-2/+128
| | | | | | | If the second pointer in a multi-pointer instruction is a constant, we can replace the type. llvm-svn: 269945
* AMDGPU: Fix a few slightly broken testsMatt Arsenault2016-05-189-65/+72
| | | | | | | Fix minor bugs and uses of undef which break when pointer related optimization passes are run. llvm-svn: 269944
* AMDGPU: Don't run passes that aren't usefulMatt Arsenault2016-05-181-0/+5
| | | | llvm-svn: 269943
* [PS4] Clean up some test commentary. NFCPaul Robinson2016-05-181-5/+5
| | | | llvm-svn: 269941
* [Clang][AVX512] completing missing intrinsics [pandnd].Michael Zuckerman2016-05-182-0/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D20101 llvm-svn: 269939
* AMDGPU: Fix assert on ttmp registersMatt Arsenault2016-05-181-2/+2
| | | | | | | | | | | Use register class that does not include them when looking for unallocated registers. This is hit by the udiv v8i64 test in the opencl integer conformance test, and takes a few seconds to compile in a debug build so no test included. llvm-svn: 269938
* [PM] Port per-function SCCP to the new pass manager.Davide Italiano2016-05-187-46/+92
| | | | llvm-svn: 269937
* [ASTMatcher] Fix a ASTMatcher test failure on Windows.Haojian Wu2016-05-181-7/+8
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: thakis, cfe-commits, klimek Differential Revision: http://reviews.llvm.org/D20369 llvm-svn: 269936
* Teach Sema::MergeFunctionDecl to properly check for an out-of-line ↵Vassil Vassilev2016-05-182-1/+9
| | | | | | | | | | | | definition of a function that is declared as =default in its class definition. First part of PR27699. Patch by Cristina Cristescu! Reviewed by Richard Smith and me. llvm-svn: 269935
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-182-1/+21
| | | | | | Clang follow-up to r269933. llvm-svn: 269934
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-183-2/+35
| | | | llvm-svn: 269933
* Removed duplicate SSE42 builtin tests from avx-builtins.cSimon Pilgrim2016-05-181-70/+0
| | | | llvm-svn: 269932
* [X86][SSE42] Sync with llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-42/+26
| | | | llvm-svn: 269931
* [WebAssembly] Don't expand divisions by constants.Dan Gohman2016-05-183-0/+69
| | | | | | | Don't expand divisions by constants if it would require multiple instructions. The current assumption is that engines will perform the desired optimizations. llvm-svn: 269930
* [X86][SSE42] Added fast-isel tests to sync with ↵Simon Pilgrim2016-05-182-0/+411
| | | | | | clang/test/CodeGen/sse42-builtins.c llvm-svn: 269929
* [clang-tidy] Use unresolvedLookupExpr node matcher from ASTMatcher.Haojian Wu2016-05-181-7/+0
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: aaron.ballman, cfe-commits Differential Revision: http://reviews.llvm.org/D20367 llvm-svn: 269928
* [clang-include-fixer] Added Vim integration for clang-include-fixer.Eric Liu2016-05-183-0/+117
| | | | | | | | | | | | Summary: [clang-include-fixer] Added Vim integration for clang-include-fixer. Reviewers: hokein, bkramer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D20329 llvm-svn: 269927
* [X86][SSE41] Sync with llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-20/+20
| | | | llvm-svn: 269926
* [X86][SSE41] Sync with clang/test/CodeGen/sse41-builtins.cSimon Pilgrim2016-05-181-39/+39
| | | | llvm-svn: 269925
* [clang-format] Make formatReplacements() also sort #includes.Eric Liu2016-05-182-1/+36
| | | | | | | | | | | | Summary: [clang-format] Make formatReplacements() also sort #includes. Reviewers: bkramer, djasper Subscribers: klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D20362 llvm-svn: 269924
* [include-fixer] Don't insert #includes if a fatal error occurred.Benjamin Kramer2016-05-183-3/+23
| | | | | | | | | This typically happens when the user didn't setup include paths correctly and the fixer starts adding garbage includes. Avoid that. Disable the error limit though, as we might hit that easily with missing includes and still want to fix those cases. llvm-svn: 269923
* [SystemZ] Fix register ordering for BinaryRRF instructionsBryan Chan2016-05-182-11/+11
| | | | | | | | | | | | | | | | | Summary: The ordering of registers in BinaryRRF instructions are wrong, and affects the copysign instruction (CPSDR). This results in the wrong magnitude and sign being set. Author: zhanjunl Reviewers: kbarton, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20308 llvm-svn: 269922
* [X86][SSE3] Sync with llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.llSimon Pilgrim2016-05-181-0/+2
| | | | llvm-svn: 269921
* [X86][SSE3] Sync with clang/test/CodeGen/sse3-builtins.cSimon Pilgrim2016-05-181-2/+3
| | | | llvm-svn: 269920
* White space cleanup.Rafael Espindola2016-05-181-2/+2
| | | | llvm-svn: 269919
* [clang-tidy] Fix misc-unused-using-decls test failure in windowsHaojian Wu2016-05-181-1/+1
| | | | | | buildbot. llvm-svn: 269918
* [sanitizer] Fix a crash when demangling Swift symbols, take 3Kuba Brecka2016-05-182-4/+9
| | | | | | | | | | The previous patch (r269291) was reverted (commented out) because the patch caused leaks that were detected by LSan and they broke some lit tests. The actual reason was that dlsym allocates an error string buffer in TLS, and some LSan lit tests are intentionally not scanning TLS for root pointers. This patch simply makes LSan ignore the allocation from dlsym, because it's not interesting anyway. llvm-svn: 269917
* [ASTMatcher] Add a node matcher for UnresolvedLookupExpr.Haojian Wu2016-05-184-0/+43
| | | | | | | | | | Reviewers: alexfh, aaron.ballman Subscribers: aaron.ballman, klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D20360 llvm-svn: 269916
* Removing an unused variable introduced in r269911; NFC.Aaron Ballman2016-05-181-1/+0
| | | | llvm-svn: 269915
* [Mips] Finetuning MIPS32 Android default variantsPetar Jovanovic2016-05-183-3/+30
| | | | | | | | | MIPS32 Android defaults to FPXX ("-fpxx"). MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg"). Differential Revision: http://reviews.llvm.org/D20345 llvm-svn: 269914
* Try again to fix pdbdump-headers.test on big-endian hosts after r269861.Daniel Sanders2016-05-181-5/+9
| | | | | | | r269898 fixed the problem with HashBuckets but the same issue occurred with AddressMap and ThunkMap too. llvm-svn: 269913
* Add new flag and intrinsic support for MWAITX and MONITORX instructionsAshutosh Nema2016-05-1812-15/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper, RKSimon Subscribers: RKSimon, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19795 llvm-svn: 269911
* Update for llvm change.Rafael Espindola2016-05-182-8/+7
| | | | llvm-svn: 269910
* Don't pass a Reloc::Model to MC.Rafael Espindola2016-05-1817-71/+59
| | | | | | | | | | | | MC only needs to know if the output is PIC or not. It never has to decide about creating GOTs and PLTs for example. The only thing that MC itself uses this information for is expanding "macros" in sparc and mips. The rest I am pretty sure could be moved to CodeGen. This is a cleanup and isolates the code from future changes to Reloc::Model. llvm-svn: 269909
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