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* [Lanai] Create a TargetInfo header. NFCRichard Trieu2019-05-149-7/+27
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360726
* [lit/Register] Fix matching of the output.Davide Italiano2019-05-141-32/+32
| | | | llvm-svn: 360725
* [Hexagon] Create a TargetInfo header. NFCRichard Trieu2019-05-148-3/+26
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360724
* [polly] Fix non-determinism in IslNodeBuilder.Eli Friedman2019-05-141-1/+1
| | | | | | | | | The iteration order of OutsideLoopIterations matters for IslNodeBuilder::getReferencesInSubtree, which inserts the values from the map into a SetVector, which is eventually used to construct the type of the context for parallel loops. llvm-svn: 360723
* [BPF] Create a TargetInfo header. NFCRichard Trieu2019-05-148-10/+32
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360722
* [AVR] Create a TargetInfo header. NFCRichard Trieu2019-05-148-3/+24
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360721
* Fix bots by adding target triple to test.Leonard Chan2019-05-141-12/+12
| | | | llvm-svn: 360720
* Use an offset from TOS for idempotent rmw locked op loweringPhilip Reames2019-05-143-12/+22
| | | | | | | | This was the portion split off D58632 so that it could follow the redzone API cleanup. Note that I changed the offset preferred from -8 to -64. The difference should be very minor, but I thought it might help address one concern which had been previously raised. Differential Revision: https://reviews.llvm.org/D61862 llvm-svn: 360719
* [ARM] Create a TargetInfo header. NFCRichard Trieu2019-05-148-6/+29
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360718
* [libFuzzer] replace string_view with string to fix the bots. This is NFC, ↵Kostya Serebryany2019-05-141-6/+7
| | | | | | just slower. llvm-svn: 360717
* [ARC] Create a TargetInfo header. NFCRichard Trieu2019-05-147-3/+25
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360716
* [libFuzzer] #include <string_view>, hopefully should fix the windows build Kostya Serebryany2019-05-141-0/+1
| | | | llvm-svn: 360715
* [AMDGPU] Create a TargetInfo header. NFCRichard Trieu2019-05-149-8/+35
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360713
* [libFuzzer] reimplement DFT's collect_data_flow inside libFuzzer so that we ↵Kostya Serebryany2019-05-144-43/+170
| | | | | | don't need external python scripts llvm-svn: 360712
* [OpenMP][AArch64] Fix compile with LLVM trunk.Eli Friedman2019-05-141-1/+1
| | | | | | | | | | | | | | | | The code is currently using the ambiguous instruction "sub sp, sp, w9, lsl #4". The ARM reference manual says this isn't valid, and it's not clear whether it's supposed to mean uxtw or uxtx. It doesn't matter which instruction we use here, since the high bits of the operand are zero anyway, so I arbitrarily choose uxtw, to preserve the register name. See https://reviews.llvm.org/D60840 for the LLVM patch. Differential Revision: https://reviews.llvm.org/D61770 llvm-svn: 360711
* [GWP-ASan] Initial build files, implementation of PRNG [1].Mitch Phillips2019-05-145-1/+93
| | | | | | | | | | | | | | | | | | Summary: See D60593 for further information. This patch slices off the PRNG implementation and the initial build files for GWP-ASan. Reviewers: vlad.tsyrklevich, morehouse, vitalybuka Reviewed By: morehouse Subscribers: srhines, kubamracek, mgorny, #sanitizers, llvm-commits, cryptoad, eugenis Tags: #sanitizers, #llvm Differential Revision: https://reviews.llvm.org/D61867 llvm-svn: 360710
* [AArch64] Create a TargetInfo header. NFCRichard Trieu2019-05-148-14/+36
| | | | | | | | Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem. llvm-svn: 360709
* [Polly] Don't crash on invalid delinearization result.Eli Friedman2019-05-142-1/+30
| | | | | | | | | | | | | | | | | | | In certain cases, it's possible for delinearization to decide one of the array dimensions should be some function of an induction variable inside the scop. Make sure if this happens, we refuse to use those dimensions for delinearization. Usually, we end up rejecting the scop before it actually crashes, but it looks like it's possible to slip past other checks in certain cases involving smax expressions. Fixes a crash that started showing up this week on the polly AOSP builder. As far as I can tell, this is a longstanding issue, though; it was just exposed by better SCEV analysis of smin expressions. Differential Revision: https://reviews.llvm.org/D61807 llvm-svn: 360708
* [NewPM] Port HWASan and Kernel HWASanLeonard Chan2019-05-1410-53/+205
| | | | | | | | | | | | | | | Port hardware assisted address sanitizer to new PM following the same guidelines as msan and tsan. Changes: - Separate HWAddressSanitizer into a pass class and a sanitizer class. - Create new PM wrapper pass for the sanitizer class. - Use the getOrINsert pattern for some module level initialization declarations. - Also enable kernel-kwasan in new PM - Update llvm tests and add clang test. Differential Revision: https://reviews.llvm.org/D61709 llvm-svn: 360707
* [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern testsRoman Lebedev2019-05-144-0/+8005
| | | | | | | | | | | | | Unlike instcombine, we currently don't turn and+shift into shift+and. We probably should, likely unconditionally. While i'm adding only all-ones (potentially shifted) mask, this obviously isn't limited to any particular mask pattern: https://rise4fun.com/Alive/kmX Related to https://bugs.llvm.org/show_bug.cgi?id=41874 llvm-svn: 360706
* Fix ASTMerge/namespace/test.cpp after r360701Reid Kleckner2019-05-141-1/+1
| | | | llvm-svn: 360705
* [LICM] Allow AliasSetMap to contain top-level loops.Florian Hahn2019-05-142-1/+55
| | | | | | | | | | | | | | | When an outer loop gets deleted by a different pass, before LICM visits it, we cannot clean up its sub-loops in AliasSetMap, because at the point we receive the deleteAnalysisLoop callback for the outer loop, the loop object is already invalid and we cannot access its sub-loops any longer. Reviewers: asbirlea, sanjoy, chandlerc Reviewed By: asbirlea Differential Revision: https://reviews.llvm.org/D61904 llvm-svn: 360704
* Temporarily revert "Change -gz and -Wa,--compress-debug-sections to use gABI ↵Eric Christopher2019-05-143-6/+5
| | | | | | | | | | | | | compression (SHF_COMPRESSED)" This affects users of older (pre 2.26) binutils in such a way that they can't necessarily work around it as it doesn't support the compress option on the command line. Reverting to unblock them and we can revisit whether to make this change now or fix how we want to express the option. This reverts commit bdb21337e6e1732c9895966449c33c408336d295/r360403. llvm-svn: 360703
* [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliasesDmitry Preobrazhensky2019-05-142-1/+30
| | | | | | | | Reviewers: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D61905 llvm-svn: 360702
* Update ASTMerge FileCheck test expectationsReid Kleckner2019-05-1411-84/+64
| | | | | | | | | I belive many of these diagnostics changed from errors to warnings in r357394. I've simply mechanically updated the tests, but whoever owns this code should probably audit for unintented behavior changes. I wasn't able to find a flag to make these warnings errors again. llvm-svn: 360701
* [LVI][CVP] Add support for abs/nabs select pattern flavorNikita Popov2019-05-142-9/+26
| | | | | | | | | Based on ConstantRange support added in D61084, we can now handle abs and nabs select pattern flavors in LVI. Differential Revision: https://reviews.llvm.org/D61794 llvm-svn: 360700
* Restore test files accidentally deleted in r354839Reid Kleckner2019-05-1475-0/+1963
| | | | | | | | | | | | I think there must be a bug in git-llvm causing parent directories to be deleted when the diff deletes files in a subdirectory. Perhaps it is Windows-only. There has been a behavior change, so some of these tests now fail. I have marked them XFAIL and will fix them in a follow-up to separate the changes. llvm-svn: 360699
* [clang-tidy] Fix invalid fixit for ↵Matthias Gehre2019-05-142-0/+29
| | | | | | | | | | | | | | | | | | | readability-static-accessed-through-instance (bug 40544) Summary: Fixed https://bugs.llvm.org/show_bug.cgi?id=40544 Before, we would generate a fixit like `(anonymous namespace)::Foo::fun();` for the added test case. Reviewers: aaron.ballman, alexfh, xazax.hun Subscribers: rnkovacs, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D61874 llvm-svn: 360698
* [MemorySSA] LoopSimplify preserves MemorySSA only when flag is flipped.Alina Sbirlea2019-05-142-1/+18
| | | | | | | | | | | LoopSimplify can preserve MemorySSA after r360270. But the MemorySSA analysis is retrieved and preserved only when the EnableMSSALoopDependency is set to true. Use the same conditional to mark the pass as preserved, otherwise subsequent passes will get an invalid analysis. Resolves PR41853. llvm-svn: 360697
* Fix a release mode warning introduced in r360694Philip Reames2019-05-141-3/+1
| | | | llvm-svn: 360696
* build: use the correct variableSaleem Abdulrasool2019-05-141-1/+1
| | | | | | | Adjust the variable that controls whether the unit tests use `lldb-server`. This should repair the default build on Windows. llvm-svn: 360695
* [IndVars] Extend reasoning about loop invariant exits to non-header blocksPhilip Reames2019-05-143-8/+75
| | | | | | Noticed while glancing through the code for other reasons. The extension is trivial enough, decided to just do it. llvm-svn: 360694
* lldb-server: rename `llgs::terminate` (NFC)Saleem Abdulrasool2019-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | `terminate` overlaps with a C function on Windows: ``` D:\a\1\s\lldb\tools\lldb-server\lldb-server.cpp(45,13): warning: 'terminate' redeclared without 'dllimport' attribute: 'dllexport' attribute added [-Winconsistent-dllimport] static void terminate() { g_debugger_lifetime->Terminate(); } ^ C:\Program Files (x86)\Windows Kits\10\include\10.0.17763.0\ucrt\corecrt_terminate.h(29,48): note: previous declaration is here _ACRTIMP __declspec(noreturn) void __cdecl terminate() throw(); ^ D:\a\1\s\lldb\tools\lldb-server\lldb-server.cpp(45,61): warning: function declared 'noreturn' should not return [-Winvalid-noreturn] static void terminate() { g_debugger_lifetime->Terminate(); } ^ ``` Rename the function to `terminate_debugger` to avoid the errant match. llvm-svn: 360693
* Support FNeg in SpeculativeExecution passCameron McInally2019-05-142-2/+17
| | | | | | Differential Revision: https://reviews.llvm.org/D61910 llvm-svn: 360692
* Rename MacOS X -> macOS where applicable.Adrian Prantl2019-05-1412-31/+30
| | | | llvm-svn: 360691
* [Test] Autogen a test for ease of later changingPhilip Reames2019-05-141-28/+61
| | | | llvm-svn: 360690
* [AMDGPU] Fixed handling of imemdiate i1 literalsStanislav Mekhanoshin2019-05-142-0/+26
| | | | | | | | This bug was exposed by the rL360395. Differential Revision: https://reviews.llvm.org/D61812 llvm-svn: 360689
* [AMDGPU] Fixed +DumpCodeTim Renouf2019-05-143-12/+24
| | | | | | | | | | | | | | | | | | The +DumpCode attribute is a horrible hack in AMDGPU to embed the disassembly of the generated code into the elf file. It is used by LLPC to implement an extension that allows the application to read back the disassembly of the code. Longer term, we should re-implement that by using the LLVM disassembler from the Vulkan driver. Recent LLVM changes broke +DumpCode. With -filetype=asm it crashed, and with -filetype=obj I think it did not include any instructions, only the labels. Fixed with this commit: now it has no effect with -filetype=asm, and works as intended with -filetype=obj. Differential Revision: https://reviews.llvm.org/D60682 Change-Id: I6436d86fe2ea220d74a643a85e64753747c9366b llvm-svn: 360688
* [ARM][CMSE] Add cmse intrinsics for TT instructionsJaved Absar2019-05-141-0/+12
| | | | | | | | | Defines intrinsics cmse_TT, cmse_TTT, cmse_TTA, cmse_TTAT. No tests here as the tests are in patches that uses these. Reviewed By: Todd Snider, Dave Green Differential Revision: https://reviews.llvm.org/D59888 llvm-svn: 360687
* [AMDGPU] gfx1010 Strengthen some SMEM WAR hazard unit tests. NFC.Stanislav Mekhanoshin2019-05-141-2/+19
| | | | | | | | | Tighten conditions on SMEM WAR hazard unit tests to ensure rejection of workaround insertion where a s_waitcnt is present in dependency chain. The current workaround code already conforms to these revise tests. llvm-svn: 360686
* [LLD][ELF] Add the -z ifunc-noplt optionFangrui Song2019-05-147-3/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Mark Johnston! Summary: When the option is configured, ifunc calls do not go through the PLT; rather, they appear as regular function calls with relocations referencing the ifunc symbol, and the resolver is invoked when applying the relocation. This is intended for use in freestanding environments where text relocations are permissible and is incompatible with the -z text option. The option is motivated by ifunc usage in the FreeBSD kernel, where ifuncs are used to elide CPU feature flag bit checks in hot paths. Instead of replacing the cost of a branch with that of an indirect function call, the -z ifunc-noplt option is used to ensure that ifunc calls carry no hidden overhead relative to normal function calls. Test Plan: I added a couple of regression tests and tested the FreeBSD kernel build using the latest lld sources. To demonstrate the effects of the change, I used a micro-benchmark which results in frequent invocations of a FreeBSD kernel ifunc. The benchmark was run with and without IBRS enabled, and with and without -zifunc-noplt configured. The observed speedup is small and consistent, and is significantly larger with IBRS enabled: https://people.freebsd.org/~markj/ifunc-noplt/noibrs.txt https://people.freebsd.org/~markj/ifunc-noplt/ibrs.txt Reviewed By: ruiu, MaskRay Differential Revision: https://reviews.llvm.org/D61613 llvm-svn: 360685
* [X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD ↵Simon Pilgrim2019-05-144-58/+132
| | | | | | | | | | | | | | targets (PR40758) D61068 handled vector shifts, this patch does the same for scalars where there are similar number of pipes for shifts as bit ops - this is true almost entirely for AMD targets where the scalar ALUs are well balanced. This combine avoids AND immediate mask which usually means we reduce encoding size. Some tests show use of (slow, scaled) LEA instead of SHL in some cases, but thats due to particular shift immediates - shift+mask generate these just as easily. Differential Revision: https://reviews.llvm.org/D61830 llvm-svn: 360684
* [AArch64][SVE2] Asm: add SQRDMLAH/SQRDMLSH instructionsCullen Rhodes2019-05-146-0/+337
| | | | | | | | | | | | | | | Summary: This patch adds support for the indexed and unpredicated vectors forms of the SQRDMLAH and SQRDMLSH instructions. The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D61515 llvm-svn: 360683
* [AArch64][SVE2] Asm: add integer multiply-add/subtract (indexed) instructionsCullen Rhodes2019-05-146-0/+264
| | | | | | | | | | | | | | | | | | | Summary: This patch adds support for the following instructions: MLA mul-add, writing addend (Zda = Zda + Zn * Zm[idx]) MLS mul-sub, writing addend (Zda = Zda + -Zn * Zm[idx]) Predicated forms of these instructions were added in SVE. The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D61514 llvm-svn: 360682
* [Sema] CodeSynthesisContext - add missing variable initialization to ↵Simon Pilgrim2019-05-141-2/+4
| | | | | | | | constructor. NFCI. SavedInNonInstantiationSFINAEContext isn't used outside of specific contexts but this fixes cppcheck and scan-build warnings. llvm-svn: 360681
* Replace lit feature keyword 'not_COFF' with 'uses_COFF'.Paul Robinson2019-05-143-5/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D61791 llvm-svn: 360680
* [ELF] --gdb-index: fix SIGSEGV when a DWARFAddressRange has invalid SectionIndexFangrui Song2019-05-142-0/+142
| | | | | | | | | | See D61891: llvm had a bug that might create invalid (DW_AT_low_pc,DW_AT_high_pc) pairs or range list entries due to missing DW_AT_addr_base. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D61889 llvm-svn: 360679
* DWARF v5: emit DW_AT_addr_base if DW_AT_low_pc references .debug_addrFangrui Song2019-05-144-8/+31
| | | | | | | | | | | | | | | | The condition !AddrPool.empty() is tested before attachRangesOrLowHighPC(), which may add an entry to AddrPool. We emit DW_AT_low_pc (DW_FORM_addrx) but may incorrectly omit DW_AT_addr_base for LineTablesOnly. This can be easily reproduced: clang -gdwarf-5 -gmlt -c a.cc Fix this by moving !AddrPool.empty() below. This was discovered while investigating an lld crash (fixed by D61889) on such object files: ld.lld --gdb-index a.o Reviewed By: probinson Differential Revision: https://reviews.llvm.org/D61891 llvm-svn: 360678
* [PowerPC] Custom lower known CR bit spillsLei Huang2019-05-142-16/+186
| | | | | | | | | | | | | | | | | | | For known CRBit spills, CRSET/CRUNSET, it is more efficient to load and spill the known value instead of extracting the bit. eg. This sequence is currently used to spill a CRUNSET: crclr 4*cr5+lt mfocrf r3,4 rlwinm r3,r3,20,0,0 stw r3,132(r1) This patch custom lower it to: li r3,0 stw r3,132(r1) Differential Revision: https://reviews.llvm.org/D61754 llvm-svn: 360677
* [llvm-readobj] - Apply clang format. NFC.George Rimar2019-05-141-587/+564
| | | | | | I am a bit tired of the formatting issues. llvm-svn: 360676
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