| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
|
|
|
|
|
|
| |
It caused a crash in MultiSource/Benchmarks/Bullet.
Opt hit an assertion with "opt -std-compile-opts" because
Constant::getAllOnesValue doesn't know how to handle floats.
This patch added a test to reproduce the problem and a check that the
destination vector is of integer type.
Thank you Benjamin!
llvm-svn: 125459
|
| |
|
|
|
|
|
|
|
| |
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
llvm-svn: 125458
|
| |
|
|
|
|
|
| |
is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
llvm-svn: 125457
|
| |
|
|
| |
llvm-svn: 125456
|
| |
|
|
| |
llvm-svn: 125455
|
| |
|
|
|
|
| |
We were previously simplifying divisions, but not right shifts!
llvm-svn: 125454
|
| |
|
|
| |
llvm-svn: 125453
|
| |
|
|
| |
llvm-svn: 125452
|
| |
|
|
| |
llvm-svn: 125451
|
| |
|
|
|
|
|
| |
Stmt::const_child_range, then make a bunch of places use them instead
of the individual iterator accessors.
llvm-svn: 125450
|
| |
|
|
|
|
|
| |
This fixes a FIXME in scev-aa.ll (allowing a new no-alias result) and
generally makes things more precise.
llvm-svn: 125449
|
| |
|
|
|
|
| |
destruction in the destructor-aliases logic. Fixes PR 9197.
llvm-svn: 125447
|
| |
|
|
|
|
|
|
| |
These are just FXSAVE and FXRSTOR with REX.W prefixes. These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.
llvm-svn: 125446
|
| |
|
|
|
|
|
| |
types which are contravariance in argument types and covariance
in return types. // rdar://8979379.
llvm-svn: 125445
|
| |
|
|
| |
llvm-svn: 125444
|
| |
|
|
| |
llvm-svn: 125443
|
| |
|
|
|
|
| |
putchar transforms, their return values are not compatible.
llvm-svn: 125442
|
| |
|
|
| |
llvm-svn: 125441
|
| |
|
|
| |
llvm-svn: 125439
|
| |
|
|
| |
llvm-svn: 125438
|
| |
|
|
|
|
|
|
| |
The DAGCombiner created illegal BUILD_VECTOR operations.
The patch added a check that either illegal operations are
allowed or that the created operation is legal.
llvm-svn: 125435
|
| |
|
|
|
|
|
|
|
|
|
| |
deeply nested calls.
Temporarily set the first (canonical) declaration as the previous one, which is the one that
matters, and mark the real previous DeclID to be loaded & attached later on.
Fixes rdar://8956193.
llvm-svn: 125434
|
| |
|
|
|
|
|
|
|
| |
are supported by the remote GDB target. We can also now deal with the lack of
vCont support and send packets that the remote GDB stub can use. We also error
out of the continue if LLDB tries to do something too complex when vCont isn't
supported.
llvm-svn: 125433
|
| |
|
|
| |
llvm-svn: 125432
|
| |
|
|
|
|
| |
within an 'init' method. This is a temporary stop gap to avoid false positives while we investigate how to make it smarter.
llvm-svn: 125427
|
| |
|
|
|
|
|
|
|
|
|
| |
Teach the AsmMatcher handling to distinguish between an error custom-parsing
an operand and a failure to match. The former should propogate the error
upwards, while the latter should continue attempting to parse with
alternative matchers.
Update the ARM asm parser accordingly.
llvm-svn: 125426
|
| |
|
|
|
|
|
|
| |
and g_thumb_opcodes
tables. The corresponding EmulateMvnRdImm() method impl is empty for now.
llvm-svn: 125425
|
| |
|
|
| |
llvm-svn: 125424
|
| |
|
|
| |
llvm-svn: 125423
|
| |
|
|
|
|
|
|
| |
message expression, just as we do with parameters.
Fixes <rdar://problem/8725041>.
llvm-svn: 125422
|
| |
|
|
|
|
|
|
|
| |
class
instead of calling out to m_it_session.InITBlock()/LastInITBlock(), which simplifies
the coding a bit.
llvm-svn: 125421
|
| |
|
|
| |
llvm-svn: 125420
|
| |
|
|
|
|
|
|
| |
statement. We've never seen any other cases that were real bugs.
Fixes <rdar://problem/6962292>.
llvm-svn: 125419
|
| |
|
|
|
|
| |
g_thumb_opcodes table.
llvm-svn: 125418
|
| |
|
|
|
|
|
| |
I also sorted the tools/driver dependencies since their order no
longer matters.
llvm-svn: 125417
|
| |
|
|
| |
llvm-svn: 125416
|
| |
|
|
|
|
| |
<rdar://problem/8405222>.
llvm-svn: 125415
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
eContextAdjustBaseRegister, eContextRegisterStore and
eContextWriteMemoryRandomBits.
- Implement a version of WriteBits32UnknownToMemory for writing to memory.
- Modify EmulateLDM, EmulateLDMDA, EmulateLDMDB and EmulateLDMIB to use the
eContextAdjustBaseRegister context when appropriate.
- Add code to emulate the STM/STMIA/STMEA Arm instruction.
llvm-svn: 125414
|
| |
|
|
|
|
|
|
| |
emulate
CMP (register) operations.
llvm-svn: 125413
|
| |
|
|
| |
llvm-svn: 125412
|
| |
|
|
| |
llvm-svn: 125411
|
| |
|
|
|
|
|
|
|
|
|
| |
unsigned overflow (e.g. "gep P, -1"), and while they can have
signed wrap in theoretical situations, modelling an AddRec as
not having signed wrap is going enough for any case we can
think of today. In the future if this isn't enough, we can
revisit this. Modeling them as having NUW isn't causing any
known problems either FWIW.
llvm-svn: 125410
|
| |
|
|
|
|
|
|
| |
unsigned overflow (e.g. due to a negative array index), but
the scales on array size multiplications are known to not
sign wrap.
llvm-svn: 125409
|
| |
|
|
| |
llvm-svn: 125408
|
| |
|
|
|
|
| |
Reviewed by dgregor.
llvm-svn: 125407
|
| |
|
|
|
|
| |
on the host OS. Reviewed by dgregor.
llvm-svn: 125406
|
| |
|
|
| |
llvm-svn: 125405
|
| |
|
|
|
|
| |
This avoids moving each element to the integer register file and calling __divsi3 etc. on it.
llvm-svn: 125402
|
| |
|
|
| |
llvm-svn: 125401
|
| |
|
|
|
|
| |
checks that the process is stopped due to breakpoint at the specified line no.
llvm-svn: 125400
|