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* [InstCombine][NFC] Regenerate checks in or-xor.llRoman Lebedev2018-04-261-29/+29
| | | | llvm-svn: 330996
* Fix WAsm dwarfdump.ll test on WindowsReid Kleckner2018-04-261-3/+3
| | | | llvm-svn: 330995
* [InstCombine][NFC] Regenerate checks in and-or-not.llRoman Lebedev2018-04-261-49/+49
| | | | llvm-svn: 330994
* Revert "Fix a bug that prevents global variables from having a DW_OP_deref."Adrian Prantl2018-04-262-41/+2
| | | | | | This reverts commit r3309704 while investigating bot breakage. llvm-svn: 330993
* [InstCombine] Simplify Add with remainder expressions as operands.Sanjoy Das2018-04-263-18/+150
| | | | | | | | | | | | | | | | | | | | | Summary: Simplify integer add expression X % C0 + (( X / C0 ) % C1) * C0 to X % (C0 * C1). This is a common pattern seen in code generated by the XLA GPU backend. Add test cases for this new optimization. Patch by Bixia Zheng! Reviewers: sanjoy Reviewed By: sanjoy Subscribers: efriedma, craig.topper, lebedev.ri, llvm-commits, jlebar Differential Revision: https://reviews.llvm.org/D45976 llvm-svn: 330992
* Add test cases to prepare for the optimization that simplifies Add withSanjoy Das2018-04-261-0/+78
| | | | | | | | | | | | | | | | | | | | remainder expressions as operands. Summary: Add test cases to prepare for the new optimization that Simplifies integer add expression X % C0 + (( X / C0 ) % C1) * C0 to X % (C0 * C1). Patch by Bixia Zheng! Reviewers: sanjoy Reviewed By: sanjoy Subscribers: jlebar, llvm-commits Differential Revision: https://reviews.llvm.org/D46017 llvm-svn: 330991
* [asan] Align __asan_global_start so that it works with LLDReid Kleckner2018-04-262-2/+20
| | | | | | | | | | | Otherwise LLD will not align the .ASAN$GA section start, and &__asan_globals + 1 will not be the start of the next real ASan global metadata in .ASAN$GL. We discovered this issue when attempting to use LLD on Windows in Chromium: https://crbug.com/837090 llvm-svn: 330990
* Enable full debug info in the ASan runtime on WindowsReid Kleckner2018-04-261-5/+5
| | | | | | | | Clang-cl supports the -gline-tables-only flag, so we were going down that path. Honestly, we should just go ahead and enable full codeview support. llvm-svn: 330989
* [GlobalISel] Reporting rules covered as part of the InstructionSelect's ↵Roman Tereshin2018-04-263-3/+17
| | | | | | | | | | | | | debug-only printing The main goal of this change is to make it much easier to track which rules are actually covered by Testgen'erated regression tests. Reviewers: aemerson, dsanders Differential Revision: https://reviews.llvm.org/D46095 llvm-svn: 330988
* [X86] Make __builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32 ↵Craig Topper2018-04-263-0/+24
| | | | | | | | | | | | only available on 32-bit targets. These builtins can't be handled by the backend on 64-bit targets. So error up front instead of throwing an isel error. Fixes PR37225 Differential Revision: https://reviews.llvm.org/D46132 llvm-svn: 330987
* [InstCombine][NFC] add2.ll: add a few commutative checks.Roman Lebedev2018-04-261-0/+33
| | | | | | Fixes some missing test coverage in InstCombineAddSub.cpp, visitAdd() llvm-svn: 330986
* [InstCombine][NFC] Autogenerate checks in add2.llRoman Lebedev2018-04-261-135/+178
| | | | llvm-svn: 330985
* [LLD][WASM] Handle WASM_SYMBOL_TYPE_SECTION in toString().Roman Lebedev2018-04-261-0/+2
| | | | | | | Fixes build. If this is not the desired solution, please revert. WasmSymbolType was changed in rL330982 / D44184 llvm-svn: 330984
* [mips] Accept 32-bit offsets for lb and lbu commandsSimon Atanasyan2018-04-269-26/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | `lb` and `lbu` commands accepts 16-bit signed offsets. But GAS accepts larger offsets for these commands. If an offset does not fit in 16-bit range, `lb` command is translated into lui/lb or lui/addu/lb series. It's interesting that initially LLVM assembler supported this feature, but later it was broken. This patch restores support for 32-bit offsets. It replaces `mem_simm16` operand for `LB` and `LBu` definitions by the new `mem_simmptr` operand. This operand is intended to check that offset fits to the same size as using for pointers. Later we will be able to extend this rule and accepts 64-bit offsets when it is possible. Some issues remain: - The regression also affects LD, SD, LH, LHU commands. I'm going to fix them by a separate patch. - GAS accepts any 32-bit values as an offset. Now LLVM accepts signed 16-bit values and this patch extends the range to signed 32-bit offsets. In other words, the following code accepted by GAS and still triggers an error by LLVM: ``` lb $4, 0x80000004 # gas lui a0, 0x8000 lb a0, 4(a0) ``` - In case of 64-bit pointers GAS accepts a 64-bit offset and translates it to the li/dsll/lb series of commands. LLVM still rejects it. Probably this feature has never been implemented in LLVM. This issue is for a separate patch. ``` lb $4, 0x800000001 # gas li a0, 0x8000 dsll a0, a0, 0x14 lb a0, 4(a0) ``` Differential Revision: https://reviews.llvm.org/D45020 llvm-svn: 330983
* [WebAssembly] Write DWARF data into wasm object fileSam Clegg2018-04-2613-36/+544
| | | | | | | | | | | - Writes ".debug_XXX" into corresponding custom sections. - Writes relocation records into "reloc.debug_XXX" sections. Patch by Yury Delendik! Differential Revision: https://reviews.llvm.org/D44184 llvm-svn: 330982
* DAG: Fix not legalizing vector fcanonicalizesMatt Arsenault2018-04-263-0/+15
| | | | | | If an fcanoncialize was done on a vector type that was legal, llvm-svn: 330981
* AMDGPU: Extend extract_vector_elt fneg combine to fabsMatt Arsenault2018-04-263-8/+48
| | | | | | Fixes a regression in a future commit. llvm-svn: 330980
* AMDGPU: Consolidate SubtargetPredicate definitionsMatt Arsenault2018-04-262-7/+7
| | | | llvm-svn: 330979
* Delete unused variable.Rafael Espindola2018-04-261-1/+1
| | | | llvm-svn: 330978
* Specify REQUIRES: default_triple in a few testsJustin Bogner2018-04-264-0/+4
| | | | | | These were all failing when specifying LLVM_DEFAULT_TARGET_TRIPLE=''. llvm-svn: 330977
* [AArch64] Fix scavenged spill slot base when stack realignment required.Geoff Berry2018-04-262-2/+45
| | | | | | | | | | | | | | | | | | Summary: Use the FP for scavenged spill slot accesses to prevent corruption of the callee-save region when the SP is re-aligned. Based on problem and patch reported by @paulwalker-arm This is an alternative to solution proposed in D45770 Reviewers: t.p.northover, paulwalker-arm, thegameg, javed.absar Subscribers: qcolombet, mcrosier, paulwalker-arm, kristof.beyls, rengolin, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D46063 llvm-svn: 330976
* [NFC][InstCombine] rem.ll: add a few commutative tests.Roman Lebedev2018-04-261-0/+54
| | | | | | | This closes a gap in missing test coverage in isKnownToBeAPowerOfTwo() from ValueTracking.cpp llvm-svn: 330975
* [NFC][InstCombine] Regenerate rem.ll testRoman Lebedev2018-04-261-71/+71
| | | | llvm-svn: 330974
* [llvm-objcopy] Implement --redefine-sym optionAlexander Shaposhnikov2018-04-265-39/+119
| | | | | | | | | | | This diff implements --redefine-sym option for changing the name of a symbol. Test plan: make check-all Differential revision: https://reviews.llvm.org/D46029 llvm-svn: 330973
* augmenting description for fcmp fmf - NFCMichael Berg2018-04-261-1/+1
| | | | llvm-svn: 330972
* [WebAssembly] Add version to linking section (to match llvm-side change)Sam Clegg2018-04-2610-7/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D46070 llvm-svn: 330971
* Fix a bug that prevents global variables from having a DW_OP_deref.Adrian Prantl2018-04-262-2/+41
| | | | | | | | | | | For local variables the first DW_OP_deref is consumed by turning the location kind into a memeory location, but that only makes sense for values that are in a register to begin with, which cannot happen for global variables that are attached to a symbol. rdar://problem/39741860 llvm-svn: 330970
* [WebAssembly] Add version to object file metadataSam Clegg2018-04-2631-22/+57
| | | | | | | | | | Summary: See https://github.com/WebAssembly/tool-conventions/issues/54 Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46069 llvm-svn: 330969
* [Tablegen] SubtargetEmitter: move the logic that prints predicates for ↵Andrea Di Biagio2018-04-261-21/+47
| | | | | | variant scheduling classes to helper functions. NFC llvm-svn: 330968
* Add a comment. NFC.Rafael Espindola2018-04-261-0/+5
| | | | llvm-svn: 330967
* Replace SharedSymbols with Defined when creating copy relocations.Rafael Espindola2018-04-269-83/+65
| | | | | | | | | | | | | This is slightly simpler to read IMHO. Now if a symbol has a position in the file, it is Defined. The main motivation is that with this a SharedSymbol doesn't need a section, which reduces the size of SymbolUnion. With this the peak allocation when linking chromium goes from 568.1 to 564.2 MB. llvm-svn: 330966
* [GlobalMerge] Fix a typoHaicheng Wu2018-04-261-1/+1
| | | | | | now => know llvm-svn: 330965
* Revert "Enable EliminateAvailableExternally pass for -O1"Vlad Tsyrklevich2018-04-262-281/+1
| | | | | | This reverts commit r330961 because it breaks a handful of clang tests. llvm-svn: 330964
* [llvm-objcopy] Add --localize-symbol optionPaul Semel2018-04-263-2/+105
| | | | llvm-svn: 330963
* Update stale comment in AsmWriter.cppVlad Tsyrklevich2018-04-261-1/+3
| | | | | | | | | | | | | | | | | | Summary: The old comment referred to llvm/IR/Writer.h which doesn't longer exist. This patch replaces it with an up-to-date description of AsmWriter library. Patch by Alex Yursha. Reviewers: gribozavr, vlad.tsyrklevich Reviewed By: vlad.tsyrklevich Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45895 llvm-svn: 330962
* Enable EliminateAvailableExternally pass for -O1Vlad Tsyrklevich2018-04-262-1/+281
| | | | | | | | | | | | | | | | | | Summary: Follow-up to D43690, the EliminateAvailableExternally pass currently runs under -O0 and -O2 and up. Under -O1 we would still want to drop available_externally symbols to reduce space without inlining having run. Reviewers: tejohnson Reviewed By: tejohnson Subscribers: mehdi_amini, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D46093 llvm-svn: 330961
* Simplify processRelocAux.Rafael Espindola2018-04-262-19/+21
| | | | | | | | | | | It returns a different Expr only in the case of creating a function symbol pointing to its plt entry. We can just add a call to addPltEntry to avoid that and return void. With this patch further simplifications of how we handle copy relocations are possible. llvm-svn: 330960
* [WebAssembly] objdump: Don't assume all relocations have symbolsSam Clegg2018-04-262-6/+18
| | | | | | | | Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46134 llvm-svn: 330959
* [docs] provide the specific sanitizer option to detect junk-in-the-ftruncSanjay Patel2018-04-261-2/+3
| | | | llvm-svn: 330958
* [WebAssembly] Implement getRelocationValueString()Sam Clegg2018-04-264-9/+21
| | | | | | | | And use it in llvm-objdump. Differential Revision: https://reviews.llvm.org/D46092 llvm-svn: 330957
* [mips] Fix a test case which is keeping the expensive checks bot win red (NFC)Simon Dardis2018-04-261-3/+0
| | | | llvm-svn: 330956
* Move old test into test/libcxx, and implement new version of test for ↵Marshall Clow2018-04-262-2/+47
| | | | | | ostreambuf_iterator::failed. Fixes PR#37245. Thanks to Billy O'Neill for the bug report. llvm-svn: 330955
* [AMDGPU][Waitcnt] As of gfx7, VMEM operations do not increment the export ↵Mark Searles2018-04-267-10/+14
| | | | | | | | counter and the input registers are available in the next instruction; update the waitcnt pass to take this into account. Differential Revision: https://reviews.llvm.org/D46067 llvm-svn: 330954
* Delete GotPltIndex.Rafael Espindola2018-04-263-4/+5
| | | | | | | | | It was always an offset of PltIndex. This doesn't reduce the size of the structures, but makes it easier to do so in a followup patch. llvm-svn: 330953
* [mips] Correct the definitions of some control instructionsSimon Dardis2018-04-265-49/+65
| | | | | | | | | | | | | | Correct the definitions of ei, di, eret, deret, wait, syscall and break. Also provide microMIPS specific aliases to match the MIPS aliases. Additionally correct the definition of the wait instruction so that it is present in the instruction mapping tables. Reviewers: smaksimovic, abeserminji, atanasyan Differential Revision: https://reviews.llvm.org/D45939 llvm-svn: 330952
* [DAGCombiner] limit ftrunc optimizations with function attributeSanjay Patel2018-04-262-5/+21
| | | | | | | | | | As noted, the attribute name is subject to change once we have the clang side implemented, but it's clear that we need some kind of attribute-based predication here based on the discussion for: rL330437 llvm-svn: 330951
* [x86] add tests to show potential opt-out of ftrunc optimization; NFCSanjay Patel2018-04-261-0/+51
| | | | | | | | | | | This is another preliminary step for disabling this transform as discussed in the post-commit thread for: rL330437 I'm using one of the names suggested there for the attribute, but we can fix that up as needed once the clang side of this is sorted out. llvm-svn: 330950
* [RISCV] Implement isLoadFromStackSlot and isStoreToStackSlotAlex Bradbury2018-04-262-0/+54
| | | | | | | | | This causes some slight shuffling but no meaningful codegen differences on the corpus I used for testing, but it has a larger impact when combined with e.g. rematerialisation. Regardless, it makes sense to report as accurate target-specific information as possible. llvm-svn: 330949
* [NVPTX] Make the legalizer expand shufflevector of <2 x half>Benjamin Kramer2018-04-262-0/+9
| | | | | | | | | | There's no direct instruction for this, but it's trivially implemented with two movs. Without this the code generator just dies when encountering a shufflevector. Differential Revision: https://reviews.llvm.org/D46116 llvm-svn: 330948
* [DAGCombiner] refactor FP->int->FP folds; NFCSanjay Patel2018-04-261-16/+26
| | | | | | | | | | | | As discussed in the post-review comments for rL330437, we need to guard this fold to allow existing code to keep working with the undefined behavior that they've come to rely on. That would mean duplicating more code than we already have, so let's fix that first. llvm-svn: 330947
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