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* [mir] Fix uninitialized variable in r349035 noticed by ↵Daniel Sanders2018-12-131-1/+1
| | | | | | clang-atom-d525-fedora-rel and 3 other bots llvm-svn: 349043
* [Sanitizer] capsicum further support of the APIDavid Carlier2018-12-132-32/+99
| | | | | | | | | | Reviewers: vitalybuka, krytarowski, emaste Reviewed By: emaste Differential Revision: https://reviews.llvm.org/D55622 llvm-svn: 349042
* [tblgen][disasm] Separate encodings from instructionsDaniel Sanders2018-12-131-37/+51
| | | | | | | | | | | | | | | | | | | | Summary: Separate the concept of an encoding from an instruction. This will enable the definition of additional encodings for the same instruction which can be used to support variable length instruction sets in the disassembler (and potentially assembler but I'm not working towards that right now) without causing an explosion in the number of Instruction records that CodeGen then has to pick between. Reviewers: bogner, charukcs Reviewed By: bogner Subscribers: kparzysz, llvm-commits Differential Revision: https://reviews.llvm.org/D52366 llvm-svn: 349041
* [X86][SSE] Merge the vXi16/vXi32 vector rotation expansion cases. NFCI.Simon Pilgrim2018-12-131-13/+3
| | | | | | Merged the repeated code into a single if(). llvm-svn: 349040
* [clang-tidy] Share the forced linking code between clang-tidy tool and pluginIvan Donchevskii2018-12-133-185/+110
| | | | | | | | Extract code that forces linking to the separate header and include it in both plugin and standalone tool Differential Revision: https://reviews.llvm.org/D55595 llvm-svn: 349038
* [SystemZ] Pass copy-hinted regs first from getRegAllocationHints().Jonas Paulsson2018-12-132-3/+296
| | | | | | | | | When computing register allocation hints for a GRX32Bit register, make sure that any of the hinted registers that are also copy hints are returned first in the list. Review: Ulrich Weigand. llvm-svn: 349037
* Add missing Initialize/Terminate for Architecture pluginsTatyana Krasnukha2018-12-131-0/+6
| | | | llvm-svn: 349036
* [mir] Serialize DILocation inline when not possible to use a metadata referenceDaniel Sanders2018-12-136-8/+166
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Sometimes MIR-level passes create DILocations that were not present in the LLVM-IR. For example, it may merge two DILocations together to produce a DILocation that points to line 0. Previously, the address of these DILocations were printed which prevented the MIR from being read back into LLVM. With this patch, DILocations will use metadata references where possible and fall back on serializing them inline like so: MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15) Reviewers: aprantl, vsk, arphaman Reviewed By: aprantl Subscribers: probinson, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D55243 llvm-svn: 349035
* [X86][BWI] Don't custom lower vXi8 rotations.Simon Pilgrim2018-12-133-126/+232
| | | | | | We always expand to shifts anyhow - test changes are just different scheduling only. llvm-svn: 349034
* [clangd] Refine the way of checking a declaration is referenced by the ↵Haojian Wu2018-12-132-12/+57
| | | | | | | | | | | | | | | | | written code. Summary: The previous solution (checking the AST) is not a reliable way to determine whether a declaration is explicitly referenced by the source code, we are still missing a few cases. Reviewers: ilya-biryukov Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D55191 llvm-svn: 349033
* [clangd] Avoid emitting Queued status when we are able to acquire the Barrier.Haojian Wu2018-12-134-5/+15
| | | | | | | | | | Reviewers: ilya-biryukov Subscribers: javed.absar, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D55359 llvm-svn: 349032
* [clangd] Move the utility function to anonymous namespace, NFC.Haojian Wu2018-12-131-32/+33
| | | | llvm-svn: 349031
* [NFC][PowerPC] add verify-machineinstrs checkChen Zheng2018-12-131-1/+1
| | | | | | After rL349029 and rL348566, sj-ctr-loop.ll is ok for verify-machineinstrs check. llvm-svn: 349030
* [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier.Chen Zheng2018-12-133-4/+33
| | | | | | Differential Revision: https://reviews.llvm.org/D55499 llvm-svn: 349029
* [DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombinerSimon Pilgrim2018-12-132-8/+8
| | | | | | Remove common code from custom lowering (code is still safe if somehow a zero value gets used). llvm-svn: 349028
* Classify tests in lit/ModulesPavel Labath2018-12-139-0/+0
| | | | | | | | We've recently developed a convention where the tests are placed into subfolders according to the object file type. This applies that convention to existing tests too. llvm-svn: 349027
* [ARM GlobalISel] Support exts and truncs for Thumb2Diana Picus2018-12-134-15/+385
| | | | | | | | | | | Mark G_SEXT, G_ZEXT and G_ANYEXT to 32 bits as legal and add support for them in the instruction selector. This uses handwritten code again because the patterns that are generated with TableGen are tuned for what the DAG combiner would produce and not for simple sext/zext nodes. Luckily, we only need to update the opcodes to use the Thumb2 variants, everything else can be reused from ARM. llvm-svn: 349026
* [TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim2018-12-135-48/+70
| | | | | | | | | | Move existing rotation expansion code into TargetLowering and set it up for vectors as well. Ideally this would share more of the funnel shift expansion, but we handle the shift amount modulo quite differently at the moment. Begun removing x86 vector rotate custom lowering to use the expansion. llvm-svn: 349025
* [ELF][AArch64] Fix adrp to undefined weak reference.Peter Smith2018-12-132-3/+3
| | | | | | | | | | | | | | | | | | In the ABI for the 64-bit Arm architecture the section on weak references states: During linking, the symbol value of an undefined weak reference is: - Zero if the relocation type is absolute - The address of the place if the relocation type is pc-relative. The relocations associated with an ADRP are relative so we should resolve the undefined weak reference to the place instead of 0. This matches GNU ld.bfd behaviour. fixes pr34928 Differential Revision: https://reviews.llvm.org/D55599 llvm-svn: 349024
* [RISCV] Add support for the various RISC-V FMA instruction variantsAlex Bradbury2018-12-138-92/+372
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for the various RISC-V FMA instructions (fmadd, fmsub, fnmsub, fnmadd). The criteria for choosing whether a fused add or subtract is used, as well as whether the product is negated or not, is whether some of the arguments to the llvm.fma.* intrinsic are negated or not. In the tests, extraneous fadd instructions were added to avoid the negation being performed using a xor trick, which prevented the proper FMA forms from being selected and thus tested. The FMA instruction patterns might seem incorrect (e.g., fnmadd: -rs1 * rs2 - rs3), but they should be correct. The misleading names were inherited from MIPS, where the negation happens after computing the sum. The llvm.fmuladd.* intrinsics still do not generate RISC-V FMA instructions, as that depends on TargetLowering::isFMAFasterthanFMulAndFAdd. Some comments in the test files about what type of instructions are there tested were updated, to better reflect the current content of those test files. Differential Revision: https://reviews.llvm.org/D54205 Patch by Luís Marques. llvm-svn: 349023
* [AArch64] Catch some more CMN opportunities.Arnaud A. de Grandmaison2018-12-132-0/+404
| | | | | | Fixes https://bugs.llvm.org/show_bug.cgi?id=33486 llvm-svn: 349022
* Add a new interceptors for cdbr(3) and cdbw(3) API from NetBSDKamil Rytarowski2018-12-134-0/+354
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: cdb - formats of the constant database. cdbr, cdbr_open, cdbr_open_mem, cdbr_entries, cdbr_get, cdbr_find, cdbr_close - constant database access methods. cdbw_open, cdbw_put, cdbw_put_data, cdbw_put_key, cdbw_stable_seeder, cdbw_output, cdbw_close - creates constant databases. Add a dedicated test for this API. Reviewers: vitalybuka, joerg Reviewed By: vitalybuka Subscribers: kubamracek, llvm-commits, mgorny, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D55167 llvm-svn: 349021
* Fix for clang interface updateMikael Nilsson2018-12-131-1/+1
| | | | | | | | | FunctionProtoType.TypeQuals is now a Qualifiers object instead of an integer. The related clang commit: r349019 llvm-svn: 349020
* [OpenCL] Add generic AS to 'this' pointerMikael Nilsson2018-12-1340-143/+390
| | | | | | | | | | | | | Address spaces are cast into generic before invoking the constructor. Added support for a trailing Qualifiers object in FunctionProtoType. Note: This recommits the previously reverted patch, but now it is commited together with a fix for lldb. Differential Revision: https://reviews.llvm.org/D54862 llvm-svn: 349019
* Add new interceptors for vis(3) API in NetBSDKamil Rytarowski2018-12-135-0/+518
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Add interceptors for the NetBSD style of vis(3) present inside libc: - vis - nvis - strvis - stravis - strnvis - strvisx - strnvisx - strenvisx - svis - snvis - strsvis - strsnvis - strsvisx - strsnvisx - strsenvisx - unvis - strunvis - strnunvis - strunvisx - strnunvisx Add a dedicated test verifying the installed interceptors. Based on original work by Yang Zheng. Reviewers: vitalybuka, joerg Reviewed By: vitalybuka Subscribers: tomsun.0.7, kubamracek, llvm-commits, mgorny, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D54594 llvm-svn: 349018
* Fix for bugzilla https://bugs.llvm.org/show_bug.cgi?id=39970Andrey Churbanov2018-12-1310-4/+27
| | | | | | | | Broken tests fixed Differential Revision: https://reviews.llvm.org/D55598 llvm-svn: 349017
* [CodeGen] Allow mempcy/memset to generate small overlapping stores.Clement Courbet2018-12-1311-71/+103
| | | | | | | | | | | | | Summary: All targets either just return false here or properly model `Fast`, so I don't think there is any reason to prevent CodeGen from doing the right thing here. Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D55365 llvm-svn: 349016
* [asan] Don't check ODR violations for particular types of globalsVitaly Buka2018-12-139-9/+89
| | | | | | | | | | | | | | | | | Summary: private and internal: should not trigger ODR at all. unnamed_addr: current ODR checking approach fail and rereport false violation if a linker merges such globals linkonce_odr, weak_odr: could cause similar problems and they are already not instrumented for ELF. Reviewers: eugenis, kcc Subscribers: kubamracek, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D55621 llvm-svn: 349015
* AMDGPU/GlobalISel: Legalize f64 fadd/fmulMatt Arsenault2018-12-133-5/+31
| | | | llvm-svn: 349014
* Fix missing C++ mode comment in headerMatt Arsenault2018-12-131-1/+1
| | | | llvm-svn: 349013
* AMDGPU/GlobalISel: RegBankSelect some simple operationsMatt Arsenault2018-12-1311-2/+308
| | | | llvm-svn: 349012
* AMDGPU/GlobalISel: Test cleanupsMatt Arsenault2018-12-1312-138/+41
| | | | | | Remove IR and registers sections llvm-svn: 349011
* Portable Python script across Python versionSerge Guelton2018-12-131-2/+5
| | | | | | | | SocketServer has been renamed socketserver in Python3. Differential Revision: https://reviews.llvm.org/D55258 llvm-svn: 349010
* Portable Python script across Python versionSerge Guelton2018-12-131-2/+5
| | | | | | | | Queue module as been renamed into queue in Python3 Differential Revision: https://reviews.llvm.org/D55202 llvm-svn: 349009
* Portable Python script across Python versionSerge Guelton2018-12-131-2/+2
| | | | | | | | Use higher-level and more compatible threading module to start a new thread. Differential Revision: https://reviews.llvm.org/D55259 llvm-svn: 349008
* [X86] Remove assert leftover from when i1 was a legal type. Add more ↵Craig Topper2018-12-131-3/+1
| | | | | | accurate assert. NFC llvm-svn: 349007
* [AMDGPU] Fix build failure, second attemptStanislav Mekhanoshin2018-12-131-1/+1
| | | | | | | Some compilers complain that variable is captured and some complain when it is not. Switch to [&]. llvm-svn: 349006
* [AMDGPU] Fix build failureStanislav Mekhanoshin2018-12-131-1/+1
| | | | | | | Fixed error 'lambda capture 'CondReg' is not required to be captured for this use'. llvm-svn: 349005
* [clang] Add AST matcher for block expressions 🔍Stephane Moore2018-12-135-0/+22
| | | | | | | | | | | | | | | | | | Summary: This change adds a new AST matcher for block expressions. Test Notes: Ran the clang unit tests. Reviewers: aaron.ballman Reviewed By: aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D55546 llvm-svn: 349004
* [AMDGPU] Simplify negated conditionStanislav Mekhanoshin2018-12-135-0/+727
| | | | | | | | | | | | | | | | | | | Optimize sequence: %sel = V_CNDMASK_B32_e64 0, 1, %cc %cmp = V_CMP_NE_U32 1, %1 $vcc = S_AND_B64 $exec, %cmp S_CBRANCH_VCC[N]Z => $vcc = S_ANDN2_B64 $exec, %cc S_CBRANCH_VCC[N]Z It is the negation pattern inserted by DAGCombiner::visitBRCOND() in the rebuildSetCC(). Differential Revision: https://reviews.llvm.org/D55402 llvm-svn: 349003
* Revert r348645 - "[MemCpyOpt] memset->memcpy forwarding with undef tail"David L. Jones2018-12-133-40/+20
| | | | | | | This revision caused trucated memsets for structs with padding. See: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20181210/610520.html llvm-svn: 349002
* Remove unused Args parameter from EmitFunctionBody, NFCReid Kleckner2018-12-132-4/+3
| | | | llvm-svn: 349001
* [analyzer] RunLoopAutoreleaseLeakChecker: Come up with a test for r348822.Artem Dergachev2018-12-131-6/+43
| | | | | | | | | | | | | Statement memoization was removed in r348822 because it was noticed to cause memory corruption. This was happening because a reference to an object in a DenseMap was used after being invalidated by inserting a new key into the map. This test case crashes reliably under ASan (i.e., when Clang is built with -DLLVM_USE_SANITIZER="Address") on at least some machines before r348822 and doesn't crash after it. llvm-svn: 349000
* [LoopUtils] Prefer a set over a map. NFCI.Davide Italiano2018-12-131-6/+4
| | | | llvm-svn: 348999
* [test] Add a set of test for constant folding deopt operands with CVPPhilip Reames2018-12-131-0/+142
| | | | | | For anyone curious, the first test example is illustrative of a real code idiom produced by branching on the result of a three way comparison. llvm-svn: 348997
* [NFC] Small code cleanups in utility.Jonas Devlieghere2018-12-136-11/+9
| | | | | | Fix a few small annoyances in Utility I ran into. llvm-svn: 348996
* [Support] Fix FileNameLength passed to SetFileInformationByHandleShoaib Meenai2018-12-131-1/+1
| | | | | | | | | | | | | | | | The rename_internal function used for Windows has a minor bug where the filename length is passed as a character count instead of a byte count. Windows internally ignores this field, but other tools that hook NT api's may use the documented behavior: MSDN documentation specifying the size should be in bytes: https://docs.microsoft.com/en-us/windows/desktop/api/winbase/ns-winbase-_file_rename_info Patch by Ben Hillis. Differential Revision: https://reviews.llvm.org/D55624 llvm-svn: 348995
* [libcxx] Add assertion in deque::pop_back when popping from an empty dequeLouis Dionne2018-12-123-4/+55
| | | | | | | | Also, add tests making sure that vector and deque both catch the problem when assertions are enabled. Otherwise, deque would segfault and vector would never terminate. llvm-svn: 348994
* [gn build] Fix defines define on WindowsShoaib Meenai2018-12-121-1/+3
| | | | | | | | | | | On Windows, we won't go into the `host_os != "win"` block, so `defines` won't have been defined, and we'll run into an undefined identifier error when we try to later append to it. Unconditionally define it at the start and append to it everywhere else. Differential Revision: https://reviews.llvm.org/D55617 llvm-svn: 348993
* [globalisel] Add GISelChangeObserver::changingInstr()Daniel Sanders2018-12-125-6/+40
| | | | | | | | | | | | | | | | | | | | | Summary: In addition to knowing that an instruction is changed. It's also useful to know when it's about to change. For example, it might print the instruction so you can track the changes in a debug log, it might remove it from some queue while it's being worked on, or it might want to change several instructions as a single transaction and act on all the changes at once. Added changingInstr() to all existing uses of changedInstr() Reviewers: aditya_nandakumar Reviewed By: aditya_nandakumar Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D55623 llvm-svn: 348992
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