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* [WebAssembly] SIMD sqrtThomas Lively2018-09-253-0/+39
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52387 llvm-svn: 342937
* Remove redundant null pointer check in operator deleteFangrui Song2018-09-251-5/+3
| | | | | | | | | | | | | | | | | | | | C89 4.10.3.2 The free function C99 7.20.3.2 The free function C11 7.22.3.3 The free function If ptr is a null pointer, no action shall occur. _aligned_free on MSDN: If memblock is a NULL pointer, this function simply performs no actions. Reviewers: EricWF, mclow.lists Subscribers: christof, ldionne, cfe-commits, libcxx-commits Differential Revision: https://reviews.llvm.org/D52401 llvm-svn: 342936
* [AMDGPU] Remove useless check from test. NFC.Stanislav Mekhanoshin2018-09-251-1/+0
| | | | | | | The check for assignment of zero is practically useless while the assignment moves around with different scheduling. llvm-svn: 342935
* [X86] Don't create FILD ISD nodes when X87 is disabled.Craig Topper2018-09-252-1/+28
| | | | | | | | The included test case previously asserted because the type legalizer tried to soften the FILD ISD node. Fixes PR38819. llvm-svn: 342934
* [X86] Remove superfluous curly braces. NFCCraig Topper2018-09-251-2/+1
| | | | llvm-svn: 342933
* [X86] Update comment. Use 'glued' instead of 'flagged' NFCCraig Topper2018-09-251-1/+1
| | | | llvm-svn: 342932
* [WebAssembly] Move .debug_line section address of dead function outside ↵Yury Delendik2018-09-242-2/+47
| | | | | | | | | | | | | | | | | | | | | | section range Summary: Currently we are pointing all debug information that refer removed function code to the beginning of the code section (offset = 0). A debugger may want to resolve code offset to the debug information, which will collide with offsets of the live functions. Moving offsets of dead functions outside code section range. Reviewers: sbc100 Reviewed By: sbc100 Subscribers: dblaikie, ruiu, alexcrichton, dschuff, aprantl, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D49446 llvm-svn: 342930
* Driver: render arguments for the embedded bitcode correctlySaleem Abdulrasool2018-09-243-14/+161
| | | | | | | | | | When embedding bitcode, only a subset of the arguments should be recorded into the bitcode compilation commandline. The frontend job is split into two jobs, one which will generate the bitcode. Ensure that the arguments for the compilation to bitcode is properly stripped so that the embedded arguments are the permitted subset. llvm-svn: 342929
* [WebAssembly][NFC] Fix hardcoded stack indices in testsThomas Lively2018-09-241-4/+4
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52388 llvm-svn: 342928
* [www] Change 'Clang 7' items from yellow to green now Clang 7 isRichard Smith2018-09-243-14/+11
| | | | | | released. llvm-svn: 342927
* [www] Update cxx_status to mark P0962R1 as done.Richard Smith2018-09-241-1/+1
| | | | llvm-svn: 342926
* P0962R1: only use the member form of 'begin' and 'end' in a range-basedRichard Smith2018-09-244-58/+157
| | | | | | | | | | for loop if both members exist. This resolves a DR whereby an errant 'begin' or 'end' member in a base class could result in a derived class not being usable as a range with non-member 'begin' and 'end'. llvm-svn: 342925
* [CUDA] Added basic support for compiling with CUDA-10.0Artem Belevich2018-09-246-3/+36
| | | | llvm-svn: 342924
* [hwasan] Record and display stack history in stack-based reports.Evgeniy Stepanov2018-09-2421-228/+908
| | | | | | | | | | | | | | | | | | | | | Summary: Display a list of recent stack frames (not a stack trace!) when tag-mismatch is detected on a stack address. The implementation uses alignment tricks to get both the address of the history buffer, and the base address of the shadow with a single 8-byte load. See the comment in hwasan_thread_list.h for more details. Developed in collaboration with Kostya Serebryany. Reviewers: kcc Subscribers: srhines, kubamracek, mgorny, hiraditya, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D52249 llvm-svn: 342923
* Revert "[hwasan] Record and display stack history in stack-based reports."Evgeniy Stepanov2018-09-2421-908/+228
| | | | | | This reverts commit r342921: test failures on clang-cmake-arm* bots. llvm-svn: 342922
* [hwasan] Record and display stack history in stack-based reports.Evgeniy Stepanov2018-09-2421-228/+908
| | | | | | | | | | | | | | | | | | | | | Summary: Display a list of recent stack frames (not a stack trace!) when tag-mismatch is detected on a stack address. The implementation uses alignment tricks to get both the address of the history buffer, and the base address of the shadow with a single 8-byte load. See the comment in hwasan_thread_list.h for more details. Developed in collaboration with Kostya Serebryany. Reviewers: kcc Subscribers: srhines, kubamracek, mgorny, hiraditya, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D52249 llvm-svn: 342921
* [analyzer] Prevent crashes in FindLastStoreBRVisitorGeorge Karpenkov2018-09-243-4/+32
| | | | | | | | | | This patch is a band-aid. A proper solution would be too change trackNullOrUndefValue to only try to dereference the pointer when it is relevant to the problem. Differential Revision: https://reviews.llvm.org/D52435 llvm-svn: 342920
* Re-submitting changes in D51550 because it failed to patch.Christy Lee2018-09-245-38/+75
| | | | | | | | | | | | Reviewers: javed.absar, trentxintong, courbet Reviewed By: trentxintong Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52433 llvm-svn: 342919
* [InstCombine] add bitcast+extelt helper function; NFCSanjay Patel2018-09-241-14/+26
| | | | | | | | We can handle patterns where the elements have different sizes, so refactoring ahead of trying to add another blob within these clauses. llvm-svn: 342918
* [compiler-rt] [builtins] Add logb/logbf/logbl methods to compiler-rt to ↵Jordan Rupprecht2018-09-249-10/+282
| | | | | | | | | | | | | | | | | | | | | | | avoid libm dependencies when possible. Summary: The complex division builtins (div?c3) use logb methods from libm to scale numbers during division and avoid rounding issues. However, these come from libm, meaning anyone that uses --rtlib=compiler-rt also has to include -lm. Implement logb* methods for standard ieee 754 floats so we can avoid -lm on those platforms, falling back to the old behavior (using either logb() or `__builtin_logb()`) when not supported. These new methods are defined internally as `__compiler_rt_logb` so as not to conflict with the libm definitions in any way. This fixes just the libm methods mentioned in PR32279 and PR28652. libc is still required, although that seems to not be an issue. Note: this is proposed as an alternative to just adding -lm: D49330. Reviewers: efriedma, compnerd, scanon, echristo Reviewed By: echristo Subscribers: jsji, echristo, nemanjai, dberris, mgorny, kbarton, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D49514 llvm-svn: 342917
* [X86] Remove shift/rotate by CL memory (RMW) overridesSimon Pilgrim2018-09-247-97/+43
| | | | | | The uops are slightly different to the register variant, so requires a +1uop tweak llvm-svn: 342916
* [lldb-mi] Fix hanging of target-select-so-path.testAlexander Polyakov2018-09-241-13/+21
| | | | | | | | | | | | | | | | | | | | | | | Summary: The target-select-so-path test might hang on some platforms. The reason of that behavior was in incorrect usage of Filecheck and lldb-mi processes. Instead of redirecting lldb-mi's output to Filecheck, we should run lldb-mi session, finish the session, collect its output and then pass it to Filecheck. Also, this patch adds a timer to the test to prevent it from hanging in the future. Reviewers: tatyana-krasnukha, aprantl, teemperor Reviewed By: tatyana-krasnukha, teemperor Subscribers: apolyakov, aprantl, teemperor, ki.stfu, abidh, lldb-commits Differential Revision: https://reviews.llvm.org/D52139 llvm-svn: 342915
* [X86] Infer 64bit feature support from the CPUID results in getHostCPUFeatures.Craig Topper2018-09-241-0/+2
| | | | | | After r341022, we more strictly check the 64bit feature in X86Subtargets constructor when a 64-bit triple is used. If we don't infer this feature for autodetected CPUs we might incorrectly report an error if the CPU name wasn't autodetected to a CPU that supports 64-bit. llvm-svn: 342914
* [profile] Revert commit https://reviews.llvm.org/rL342718Calixte Denizet2018-09-2416-19/+20
| | | | llvm-svn: 342913
* [CodeGen] Revert commit https://reviews.llvm.org/rL342717Calixte Denizet2018-09-2410-43/+32
| | | | llvm-svn: 342912
* [Power9] [CLANG] Add __float128 exponent GET and SET builtinsStefan Pintilie2018-09-242-0/+14
| | | | | | | | | | | | | Added __builtin_vsx_scalar_extract_expq __builtin_vsx_scalar_insert_exp_qp Builtins should behave the same way as in GCC. Differential Revision: https://reviews.llvm.org/D48184 llvm-svn: 342911
* [Power9] [LLVM] Add __float128 exponent GET and SET builtinsStefan Pintilie2018-09-243-0/+49
| | | | | | | | | | | | | Added __builtin_vsx_scalar_extract_expq __builtin_vsx_scalar_insert_exp_qp Builtins should behave the same way as in GCC. Differential Revision: https://reviews.llvm.org/D48185 llvm-svn: 342910
* Fix the type of 1<<31 integer constants.Benjamin Kramer2018-09-242-3/+3
| | | | | | | Shifting into the sign bit is technically undefined behavior. No known compiler exploits it though. llvm-svn: 342909
* [X86][AVX] Add truncation as shuffle test for PR31451Simon Pilgrim2018-09-241-0/+17
| | | | llvm-svn: 342908
* Reland r342494 after fixing LIT checks.Christy Lee2018-09-241-0/+60
| | | | llvm-svn: 342907
* [Analysis] add comment to generalize finding a scalar op from vector; NFCSanjay Patel2018-09-241-3/+4
| | | | llvm-svn: 342906
* [InstCombine] add/move tests for extractelement; NFCSanjay Patel2018-09-242-26/+82
| | | | llvm-svn: 342905
* [X86] Remove WriteDiv/WriteIDiv schedule overrides - use classes directly. NFCI.Simon Pilgrim2018-09-244-125/+70
| | | | | | | | We're missing quite a bit of data for these instruction, removing the overrides makes this obvious - inconsistent reg/mem variants is a concern as well. Also, we have Divider resources (HWDivider etc.) but they aren't actually used consistently. llvm-svn: 342904
* [clangd] Fix uninit bool in r342888Sam McCall2018-09-241-1/+1
| | | | llvm-svn: 342903
* [InstCombine] improve variable name and use 'match'; NFCSanjay Patel2018-09-241-13/+15
| | | | | | | | | | | 'width' of a vector usually refers to the bit-width. https://bugs.llvm.org/show_bug.cgi?id=39016 shows a case where we could extend this fold to handle a case where the number of elements in the bitcasted vector is not equal to the resulting value. llvm-svn: 342902
* Reverting r342895Luke Cheeseman2018-09-245-43/+2
| | | | | | - The used builtins do not compile for pre arm v8.3a targets with gcc llvm-svn: 342901
* [ARM] Adjust the cost model for ExynosEvandro Menezes2018-09-241-2/+2
| | | | | | | Tune `MaxInterleaveFactor` and `LdStMultipleTiming`and remove `PartialUpdateClearance` for the Exynos processors. llvm-svn: 342900
* [ARM] Adjust the feature set for ExynosEvandro Menezes2018-09-241-0/+2
| | | | | | Enable crypto and literals fusion for the Exynos processors. llvm-svn: 342899
* [Thumb1] Any imm8 should have cost of 1Zhaoshi Zheng2018-09-242-2/+41
| | | | | | | | | A simple MOVS rd, imm8 can materialize [-128, 127] in signed i8 type or [0, 255] in unsigned i8 type on Thumb1. Differential Revision: https://reviews.llvm.org/D52257 llvm-svn: 342898
* [python] [tests] Update test_code_completionMichal Gorny2018-09-241-4/+4
| | | | | | | | Update expected completions to match output generated by clang-7.0. Differential Revision: https://reviews.llvm.org/D50171 llvm-svn: 342897
* [New PM][PassInstrumentation] IR printing support for New Pass ManagerFedor Sergeev2018-09-2413-43/+236
| | | | | | | | | | | | | | | | Implementing -print-before-all/-print-after-all/-filter-print-func support through PassInstrumentation callbacks. - PrintIR routines implement printing callbacks. - StandardInstrumentations class provides a central place to manage all the "standard" in-tree pass instrumentations. Currently it registers PrintIR callbacks. Reviewers: chandlerc, paquette, philip.pfaffe Differential Revision: https://reviews.llvm.org/D50923 llvm-svn: 342896
* [AArch64] Unwinding support for return address signingLuke Cheeseman2018-09-245-2/+43
| | | | | | | | | | - When return address signing is enabled, the LR may be signed on function entry - When an exception is thrown the return address is inspected used to unwind the call stack - Before this happens, the return address must be correctly authenticated to avoid causing an abort by dereferencing the signed pointer Differential Revision: https://reviews.llvm.org/D51432 llvm-svn: 342895
* [lld-link] Generalize handling of /debug and ↵Will Wilson2018-09-246-30/+92
| | | | | | | | | | | | | /debug:{none,full,fastlink,ghash,symtab} Implement final argument precedence if multiple /debug arguments are passed on the command-line to match expected link.exe behavior. Support /debug:none and emit warning for /debug:fastlink with automatic fallback to /debug:full. Emit error if last /debug:option is unknown. Emit warning if last /debugtype:option is unknown. https://reviews.llvm.org/D50404 llvm-svn: 342894
* Revert "rL342883: [Clang][CodeGen][ObjC]: Fix CoreFoundation on ELF with ↵Kristina Brooks2018-09-243-75/+26
| | | | | | | | `-fconstant-cfstrings`." Seems to be causing buildbot failures, need to look into it. llvm-svn: 342893
* [X86] Split WriteIMul into 8/16/32/64 implementations (PR36931)Simon Pilgrim2018-09-2417-402/+212
| | | | | | | | Split WriteIMul by size and also by IMUL multiply-by-imm and multiply-by-reg cases. This removes all the scheduler overrides for gpr multiplies and stops WriteMULH being ignored for BMI2 MULX instructions. llvm-svn: 342892
* [Arm][AsmParser] Restrict register list size for VSTM/VLDMLuke Cheeseman2018-09-242-0/+24
| | | | | | | | | | - The assembler accepts VSTM/VLDM with register lists (specifically double registers lists) with more than 16 registers specified - The Arm architecture reference manual says this instruction must not contain more than 16 registers when the registers are doubleword registers - This addresses one of the concerns in https://bugs.llvm.org/show_bug.cgi?id=38389 Differential Revision: https://reviews.llvm.org/D52082 llvm-svn: 342891
* [CFString][ELF] Fix a missed test causing buildbot failures from 342883.Kristina Brooks2018-09-241-2/+2
| | | | | | Accidetanlly forgot to update it, big sorry. llvm-svn: 342890
* [VFS] Use llvm::StringMap instead of std::map. NFCEric Liu2018-09-241-1/+1
| | | | llvm-svn: 342889
* [clangd] Do bounds checks while reading data, otherwise var-length records ↵Sam McCall2018-09-241-139/+138
| | | | | | are too painful. NFC llvm-svn: 342888
* Correct RISC-V link in release notesEd Maste2018-09-241-1/+1
| | | | llvm-svn: 342887
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