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* ReleaseNotes.rst: Bump version to 3.8Hans Wennborg2015-07-141-21/+7
| | | | | | The notes for 3.7 are on the 3.7 branch. llvm-svn: 242238
* ReleaseNotes.rst: Bump version to 3.8Hans Wennborg2015-07-141-17/+5
| | | | | | The notes for 3.7 are on the 3.7 branch. llvm-svn: 242237
* Accept lower case to handle windows error messages.Rafael Espindola2015-07-141-1/+1
| | | | llvm-svn: 242236
* [InstCombine] Generalize sub of selects optimization to all BinaryOperatorsDavid Majnemer2015-07-143-26/+37
| | | | | | | This exposes further optimization opportunities if the selects are correlated. llvm-svn: 242235
* Driver: Delete dead codeJustin Bogner2015-07-142-8/+0
| | | | | | VerifyJobActions never have multiple inputs. llvm-svn: 242223
* Update the trunk version to 3.8.0svn.Hans Wennborg2015-07-144-15/+15
| | | | llvm-svn: 242222
* Sema.h: Just prune a redundant \brief introduced in r242133, for now. ↵NAKAMURA Takumi2015-07-141-1/+1
| | | | | | [-Wdocumentation] llvm-svn: 242221
* [LAA] Turn RuntimePointerChecking into a class, start hiding things, NFCAdam Nemet2015-07-141-12/+14
| | | | | | The goal is to start hiding internal APIs. llvm-svn: 242220
* [LAA] Introduce RuntimePointerChecking::PointerInfo, NFCAdam Nemet2015-07-143-54/+67
| | | | | | | Turn this structure-of-arrays (i.e. the various pointer attributes) into array-of-structures. llvm-svn: 242219
* [LAA] Lift RuntimePointerCheck out of LoopAccessInfo, NFCAdam Nemet2015-07-145-176/+173
| | | | | | | | | I am planning to add more nested classes inside RuntimePointerCheck so all these triple-nesting would be hard to follow. Also rename it to RuntimePointerChecking (i.e. append 'ing'). llvm-svn: 242218
* [PowerPC] Use the ABI indirect-call protocol for patchpointsHal Finkel2015-07-145-26/+78
| | | | | | | | | | | | We used to take the address specified as the direct target of the patchpoint and did no TOC-pointer handling. This, however, as not all that useful, because MCJIT tends to create a lot of modules, and they have their own TOC sections. Thus, to call from the generated code to other generated code, you really need to switch TOC pointers. Make this work as expected, and under ELFv1, tread the address as the function descriptor address so that the correct TOC pointer can be loaded. llvm-svn: 242217
* Update for llvm api change.Rafael Espindola2015-07-141-3/+9
| | | | llvm-svn: 242216
* Add support for reading members out of thin archives.Rafael Espindola2015-07-144-7/+39
| | | | | | | | | | For now the Archive owns the buffers of the thin archive members. This makes for a simple API, but all the buffers are destructed only when the archive is destructed. This should be fine since we close the files after mmap so we should not hit an open file limit. llvm-svn: 242215
* Cleanup; remove trailing spaces.Dawn Perchik2015-07-141-35/+35
| | | | llvm-svn: 242214
* [ExecutionEngine] Re-apply r241962 with fixes for ARM.Lang Hames2015-07-142-3/+88
| | | | | | Patch by Pierre-Andre Saulais. Thanks Pierre-Andre! llvm-svn: 242213
* Add allnodes() iterator range to SelectionDAG. NFC.Pete Cooper2015-07-145-20/+20
| | | | | | | | | | | SelectionDAG already had begin/end methods for iterating over all the nodes, but didn't define an iterator_range for us in foreach loops. This adds such a method and uses it in some of the eligible places throughout the backends. llvm-svn: 242212
* Move SDNode::IROrder in to padding to save space. NFC.Pete Cooper2015-07-141-5/+5
| | | | | | | | There was a 32-bit padding gap between 'unsigned short NumOperands, NumValues;' and 'DebugLoc debugLoc. Move 'unsigned IROrder' in to that gap. This trims the size of SDNode's from 76 bytes (really 80 due to alignment) to 72 bytes. llvm-svn: 242211
* Constify parameters in SelectionDAG methods. NFCPete Cooper2015-07-142-6/+6
| | | | llvm-svn: 242210
* Remove unnecessary .getNode() in SelectionDAG. NFC.Pete Cooper2015-07-141-22/+20
| | | | | | | | The simplify_type specialisation allows us to cast directly from SDValue to an SDNode* subclass so we don't need to pass a SDNode* to cast<>. llvm-svn: 242209
* Use more foreach loops in SelectionDAG. NFCPete Cooper2015-07-141-7/+6
| | | | llvm-svn: 242208
* Use getChildOffset instead of getBuffer for identifying a member.Rafael Espindola2015-07-142-4/+3
| | | | | | | | | I am adding support for thin archives. On those, getting the buffer involves reading another file. Since we only need an id in here, use the member offset in the archive. llvm-svn: 242205
* MIR Serialization: Serialize the machine basic block live in registers.Alex Lorenz2015-07-147-3/+93
| | | | llvm-svn: 242204
* MIR Printer: move the function 'printReg'. NFC.Alex Lorenz2015-07-141-13/+13
| | | | | | | | This commit moves the function 'printReg' towards the start of the file so that it can be used by the conversion methods in MIRPrinter and not just the printing methods in MIPrinter. llvm-svn: 242203
* GVN: use a static array instead of regenerating it each time. NFC.Tim Northover2015-07-141-1/+1
| | | | llvm-svn: 242202
* WebAssembly: add basic int/fp instruction codegen.JF Bastien2015-07-143-28/+63
| | | | | | | | | | | | Summary: This patch has the most basic instruction codegen for 32 and 64 bit int/fp. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11193 llvm-svn: 242201
* Fix NDEBUG build warningKrzysztof Parzyszek2015-07-141-0/+2
| | | | llvm-svn: 242200
* GVN: tolerate an instruction being replaced without existing in the leaderboardTim Northover2015-07-142-1/+33
| | | | | | | | | | | | | | Sometimes an incidentally created instruction can duplicate a Value used elsewhere. It then often doesn't end up in the leader table. If it's later removed, we attempt to remove it from the leader table and segfault. Instead we should just ignore the removal request, which won't cause any problems. The reverse situation, where the original instruction is replaced by the new one (which you might think could leave the leader table empty) cannot occur, because the incidental instruction will never be found in the first place. llvm-svn: 242199
* Add a "maximum TLS alignment" characteristic to the target info, so itPaul Robinson2015-07-147-5/+138
| | | | | | | | | | can be different from the normal variable maximum. Add an error diagnostic for when TLS variables exceed maximum TLS alignment. Currenty only PS4 sets an explicit maximum TLS alignment. Patch by Charles Li! llvm-svn: 242198
* Remove non-ascii charactersEric Fiselier2015-07-141-5/+5
| | | | llvm-svn: 242197
* [Makefiles] Align library names with CMake buildKeno Fischer2015-07-1423-186/+88
| | | | | | | | | | | | Summary: This aligns the library names used by the Makefile build to be the same as those create by the CMake build to make switching between the two easier. The only major difficulty was lldbHost which was one library in the CMake system and several in the Makefile system. Most of the other changes are trivial renames. Reviewers: labath Subscribers: emaste, tberghammer, lldb-commits Differential Revision: http://reviews.llvm.org/D11154 llvm-svn: 242196
* Implement n4169 - Add invoke function templateEric Fiselier2015-07-143-1/+278
| | | | llvm-svn: 242195
* test-release.sh: Remove the InstallDir parameter from configure_llvmCoreHans Wennborg2015-07-141-16/+5
| | | | | | After r242187, it's never set. llvm-svn: 242194
* [Sanitizer] Fix fopencookie() interceptor to work with null hook functions.Alexey Samsonov2015-07-142-7/+15
| | | | llvm-svn: 242193
* Fix Windows build: replace __func__ with LLVM_FUNCTION_NAMEKrzysztof Parzyszek2015-07-141-4/+5
| | | | llvm-svn: 242192
* [MMX] Use the appropriate instructions for GR64 <-> VR64 copies.Bruno Cardoso Lopes2015-07-141-2/+2
| | | | | | | | | | | | | | | MOVSDto64rr and MOV64toSDrr are defined to convert between FR64 (%xmm) <-> GR64 registers, not VR64 (%mm) <-> GR64. This is wrong. I found this by inspection and could not find a suitable testcase for it since (1) we don't handle MMX bitcasts in Peephole optimizer as to generate COPYs that (2) could be expanded back to the appropriate x86 instruction in ExpandPostRA. Switch to use the appropriate instructions: MMX_MOVD64from64rr and MMX_MOVD64to64rr here. llvm-svn: 242191
* [Sema] Emit a better diagnostic when variable redeclarations disagreeDavid Majnemer2015-07-1419-68/+77
| | | | | | | | | | | We referred to all declaration in definitions in our diagnostic messages which is can be inaccurate. Instead, classify the declaration and emit an appropriate diagnostic for the new declaration and an appropriate note pointing to the old one. This fixes PR24116. llvm-svn: 242190
* Mark LWG2308 as complete; fix link. No code change necessary.Marshall Clow2015-07-141-1/+1
| | | | llvm-svn: 242189
* [PowerPC] Fix the PPCInstrInfo::getInstrLatency implementationHal Finkel2015-07-1412-34/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PowerPC uses itineraries to describe processor pipelines (and dispatch-group restrictions for P7/P8 cores). Unfortunately, the target-independent implementation of TII.getInstrLatency calls ItinData->getStageLatency, and that looks for the largest cycle count in the pipeline for any given instruction. This, however, yields the wrong answer for the PPC itineraries, because we don't encode the full pipeline. Because the functional units are fully pipelined, we only model the initial stages (there are no relevant hazards in the later stages to model), and so the technique employed by getStageLatency does not really work. Instead, we should take the maximum output operand latency, and that's what PPCInstrInfo::getInstrLatency now does. This caused some test-case churn, including two unfortunate side effects. First, the new arrangement of copies we get from function parameters now sometimes blocks VSX FMA mutation (a FIXME has been added to the code and the test cases), and we have one significant test-suite regression: SingleSource/Benchmarks/BenchmarkGame/spectral-norm 56.4185% +/- 18.9398% In this benchmark we have a loop with a vectorized FP divide, and it with the new scheduling both divides end up in the same dispatch group (which in this case seems to cause a problem, although why is not exactly clear). The grouping structure is hard to predict from the bottom of the loop, and there may not be much we can do to fix this. Very few other test-suite performance effects were really significant, but almost all weakly favor this change. However, in light of the issues highlighted above, I've left the old behavior available via a command-line flag. llvm-svn: 242188
* Fix several issues with the test-release.sh scriptDan Liew2015-07-141-68/+63
| | | | | | | | | | | | | | | | | | | * Use the default install prefix (/usr/local) and use DESTDIR instead to set a temporary install location for tarballing. This is the correct way to package binary releases (otherwise the temporary install path ends up in files in the binary release). * Remove ``-disable-clang`` option. It did not work correctly (tarballing assumed phase 3 was run) and when doing a release we should always be doing a three-phased build and test. Note: Technically we should only be using DESTDIR for the third phase and use --prefix for the first and second phase because we run the built clang from phase 1 and 2 (and in general an application's behaviour may depend on the install prefix). However in the case of clang it seems to not care what the install prefix was so to simplify the script we use DESTDIR for all three stages. llvm-svn: 242187
* [Hexagon] Generate instructions for operations on predicate registersKrzysztof Parzyszek2015-07-145-0/+580
| | | | | | | Convert logical operations on general-purpose registers to the correspon- ding operations on predicate registers. llvm-svn: 242186
* [CodeGen] Force emission of personality directive if explicitly specifiedKeno Fischer2015-07-148-22/+82
| | | | | | | | | | | | | | | | | | | Summary: Before this change, personality directives were not emitted if there was no invoke left in the function (of course until recently this also meant that we couldn't know what the personality actually was). This patch forces personality directives to still be emitted, unless it is known to be a noop in the absence of invokes, or the user explicitly specified `nounwind` (and not `uwtable`) on the function. Reviewers: majnemer, rnk Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D10884 llvm-svn: 242185
* Add comment explaning sanity check on packet size in the packet ↵Jason Molenda2015-07-141-0/+4
| | | | | | decompression method. llvm-svn: 242184
* Use target.exec-search-paths setting when resolving executable path for ↵Oleksiy Vyalov2015-07-143-5/+8
| | | | | | | | remote target. http://reviews.llvm.org/D11163 llvm-svn: 242183
* Fix temp port file path generation in lldb-platform.Oleksiy Vyalov2015-07-141-6/+5
| | | | | | http://reviews.llvm.org/D11152 llvm-svn: 242182
* Run cuda options test only with specific target.Artem Belevich2015-07-141-7/+9
| | | | | | For now it's only x86_64-linux-gnu. llvm-svn: 242181
* [modules] Avoid repeatedly hashing the same name when looking it up in ↵Richard Smith2015-07-142-47/+57
| | | | | | multiple module files. llvm-svn: 242180
* Add support for on-disk hash table lookup with a known hash, for situations ↵Richard Smith2015-07-141-5/+11
| | | | | | where the same key will be looked up in multiple tables. llvm-svn: 242179
* Teach config.guess that MSYS exists.Yaron Keren2015-07-141-0/+3
| | | | | | | We might not want to upgrade config.guess to the current version due to the license change from GPL2 to GPL3. llvm-svn: 242178
* AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)Matt Arsenault2015-07-146-16/+117
| | | | | | | | | | | | | | | | | This can be done only with moves which theoretically will optimize better later. Although this transform increases the instruction count, it should be code size / cycle count neutral in the worst VALU case. It also seems to slightly improve a couple of testcases due to other DAG combines this exposes. This is probably slightly worse for the SALU case, so it might be better to handle this during moveToVALU, although then you lose some simplifications like the load width reducing in the simple testcase. llvm-svn: 242177
* [clang-cl] Disable C++ exceptions a different wayReid Kleckner2015-07-143-18/+12
| | | | | | | | | | Rather than making -fexceptions a core option that enables C++ EH in clang-cl, users can use the '-Xclang -fexceptions -Xclang -fcxx-exceptions' flag set. We weren't going to expose -fexceptions in clang-cl in the long run, so this way we don't add and then remove a flag. llvm-svn: 242176
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