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llvm-svn: 369876
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llvm-svn: 369875
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More coverage for D66687
(assuming we make this a generic combine with TLI hook).
llvm-svn: 369874
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Based on @davezarzycki remarks in D64696 improved the wording of the warning
message.
Differential Revision: https://reviews.llvm.org/D66700
Patch by Mark de Wever.
llvm-svn: 369873
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inserting into undef
Summary:
Concat_vectors is more canonical during early DAG combine. For example, its what's used by SelectionDAGBuilder when converting IR shuffles into SelectionDAG shuffles when element counts between inputs and mask don't match. We also have combines in DAGCombiner than can pull concat_vectors through a shuffle. See partitionShuffleOfConcats. So it seems like concat_vectors is a better operation to use here. I had to teach DAGCombiner's SimplifyVBinOp to also handle concat_vectors with undef. I haven't checked yet if we can remove the INSERT_SUBVECTOR version in there or not.
I didn't want to mess with the other caller of getShuffleHalfVectors that's used during shuffle lowering where insert_subvector probably is what we want to produce so I've enabled this via a boolean passed to the function.
Reviewers: spatel, RKSimon
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66504
llvm-svn: 369872
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llvm-svn: 369871
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llvm-svn: 369870
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Summary:
Adds support for generating the .data section in assembly files for global variables with a non-zero initialization. The support for writing the .data section in XCOFF object files will be added in a follow-on patch. Any relocations are not included in this patch.
Reviewers: hubert.reinterpretcast, sfertile, jasonliu, daltenty, Xiangling_L
Reviewed by: hubert.reinterpretcast
Subscribers: nemanjai, hiraditya, kbarton, MaskRay, jsji, wuzish, shchenz, DiggerLin, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66154
llvm-svn: 369869
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llvm-svn: 369868
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GCC 5 happy
llvm-svn: 369867
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The test case used invalid source operands as input
to BTS64rr instructions (feeding register operands with
immediates). This patch changes those instruction into
using BTS64ri8 instead, which seems to better match the
operand types.
Fixes problems seen in https://reviews.llvm.org/D63973.
llvm-svn: 369866
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Summary:
Update end-of-namespace comments generated by
tablegen emitters to fulfill the rules setup by
clang-tidy's llvm-namespace-comment checker.
Fixed a few end-of-namespace comments in the
tablegen source code as well.
Reviewers: craig.topper
Reviewed By: craig.topper
Subscribers: craig.topper, stoklund, dschuff, sbc100, jgravelle-google, aheejin, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66396
llvm-svn: 369865
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These can turn up during multiplication legalization. In principle
these should also apply to smul_lohi, but I wasn't able to figure
out how to produce those with the necessary operands.
Differential Revision: https://reviews.llvm.org/D66380
llvm-svn: 369864
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become INC/DEC.
INC/DEC don't use an immediate so we don't need to count it. We
also shouldn't use the custom isel for it.
Fixes PR42998.
llvm-svn: 369863
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llvm-svn: 369862
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Incidentally, this also unifies the two versions (removing an
unnecessary call to `SmallString::c_str`).
llvm-svn: 369861
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code cleanup
llvm-svn: 369860
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add+pmaddwd nodes.
llvm-svn: 369859
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llvm-svn: 369858
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llvm-svn: 369857
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llvm-svn: 369856
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Checking all the instructions will help catch LICM changes when passes
are reordered. Also switch to using gfx9 since global stores make the
relevant instructions more obvious.
llvm-svn: 369855
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llvm-svn: 369854
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llvm-svn: 369853
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lib/Target/X86/AsmParser/X86AsmParser.cpp: In member function ‘void {anonymous}::X86AsmParser::SwitchMode(unsigned int)’:
lib/Target/X86/AsmParser/X86AsmParser.cpp:927:76: in constexpr expansion of ‘AllModes.llvm::FeatureBitset::FeatureBitset(std::initializer_list<unsigned int>{((const unsigned int*)(& ._157)), 3u})’
include/llvm/MC/SubtargetFeature.h:56:12: in constexpr expansion of ‘llvm::FeatureBitset::set(I)’
lib/Target/X86/AsmParser/X86AsmParser.cpp:927:76: internal compiler error: in fold_binary_loc, at fold-const.c:9921
FeatureBitset AllModes({X86::Mode64Bit, X86::Mode32Bit, X86::Mode16Bit});
^
llvm-svn: 369852
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AArch64BaseInfo.h(316): error C3615: constexpr function 'llvm::SysAlias::SysAlias' cannot result in a constant expression
AArch64BaseInfo.h(316): note: failure was caused by call of undefined function or one not declared 'constexpr'
AArch64BaseInfo.h(316): note: see usage of 'llvm::FeatureBitset::FeatureBitset'
llvm-svn: 369851
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StringRef
llvm-svn: 369850
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llvm-svn: 369849
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ReduceGlobalVars.cpp:17:6: warning: '@returns' command used in a comment that is attached to a function returning void
llvm-svn: 369848
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This requires std::intializer_list to be a literal type, which it is
starting with C++14. The downside is that std::bitset is still not
constexpr-friendly so this change contains a re-implementation of most
of it.
Shrinks clang by ~60k.
llvm-svn: 369847
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Still not optimal, but makes clang 25k smaller.
llvm-svn: 369846
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llvm-svn: 369845
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llvm-svn: 369844
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llvm-svn: 369843
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Promoting it from InstCombine's tryToReuseConstantFromSelectInComparison().
Return true if this constant and a constant 'Y' are element-wise equal.
This is identical to just comparing the pointers, with the exception that
for vectors, if only one of the constants has an `undef` element in some
lane, the constants still match.
llvm-svn: 369842
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Summary:
`matchThreeWayIntCompare()` looks for
```
select i1 (a == b),
i32 Equal,
i32 (select i1 (a < b), i32 Less, i32 Greater)
```
but both of these selects/compares can be in it's commuted form,
so out of 8 variants, only the two most basic ones is handled.
This fixes regression being introduced in D66232.
Reviewers: spatel, nikic, efriedma, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66607
llvm-svn: 369841
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Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
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llvm-svn: 369839
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llvm-svn: 369838
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vector widening legalization switch is removed again.
llvm-svn: 369837
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llvm-svn: 369836
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llvm-svn: 369835
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default template argument expression.
We already did this for type template parameters and template template
parameters, but apparently forgot to do so for non-type template
parameters. This causes the substituted default argument expression to
be substituted in the proper context, and in particular to properly mark
its subexpressions as odr-used.
llvm-svn: 369834
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This just adds the opcode and verifier, it will be used to replace existing
dynamic alloca handling in a subsequent patch.
Differential Revision: https://reviews.llvm.org/D66677
llvm-svn: 369833
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It should now pass.
llvm-svn: 369832
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llvm-svn: 369831
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llvm-svn: 369830
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tuple-like decomposition that produces value-dependent reference
bindings.
llvm-svn: 369829
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Reported at https://reviews.llvm.org/D64930#1642223
If the only section of a PT_LOAD is a SHT_NOBITS section (e.g. .bss), we
may not align its sh_offset. p_offset of the PT_LOAD will be set to
sh_offset, and we will get p_offset!=p_vaddr (mod p_align). If such
executable is mapped by the Linux kernel, it will segfault.
After D64906, this may happen the non-linker script case.
The linker script case has had this issue for a long time.
This was fixed by rL321657 (but the test linkerscript/nobits-offset.s
failed to test a SHT_NOBITS section), but broken by rL345154.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D66658
llvm-svn: 369828
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llvm-svn: 369827
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